[clang] [llvm] [DXIL][SPIRV] Lower `WaveActiveCountBits` intrinsic (PR #113382)

[Sarah Spall via cfe-commits]

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@@ -1762,6 +1765,37 @@ bool SPIRVInstructionSelector::selectSign(Register ResVReg,
   return Result;
 }
 
+bool SPIRVInstructionSelector::selectWaveActiveCountBits(
+    Register ResVReg, const SPIRVType *ResType, MachineInstr &I) const {
+  assert(I.getNumOperands() == 3);
+  assert(I.getOperand(2).isReg());
+  MachineBasicBlock &BB = *I.getParent();
+
+  Register BallotReg = MRI->createVirtualRegister(&SPIRV::IDRegClass);
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spall wrote:

Is SPIRV::IDRegClass just a register class for all types? Because there are others like SPIRV::vIDRegClass, which is for vectors. 

https://github.com/llvm/llvm-project/pull/113382