[clang] 4fb953a - [AMDGPU] Make `__GCC_DESTRUCTIVE_SIZE` 128 on AMDGPU (#115241)

via cfe-commits cfe-commits at lists.llvm.org
Thu Nov 7 05:00:05 PST 2024


Author: Joseph Huber
Date: 2024-11-07T04:59:58-08:00
New Revision: 4fb953ac348d888541efe515439e0d844cdd7fbf

URL: https://github.com/llvm/llvm-project/commit/4fb953ac348d888541efe515439e0d844cdd7fbf
DIFF: https://github.com/llvm/llvm-project/commit/4fb953ac348d888541efe515439e0d844cdd7fbf.diff

LOG: [AMDGPU] Make `__GCC_DESTRUCTIVE_SIZE` 128 on AMDGPU (#115241)

Summary:
The cache line size on AMDGPU varies between 64 and 128 (The lowest L2
cache also goes to 256 on some architectures.) This macro is intended to
present a size that will not cause destructive interference, so we
choose the larger of those values.

Added: 
    

Modified: 
    clang/lib/Basic/Targets/AMDGPU.h
    clang/test/Driver/amdgpu-macros.cl

Removed: 
    


################################################################################
diff  --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h
index 6edd3474d4edae..fac46f215a3736 100644
--- a/clang/lib/Basic/Targets/AMDGPU.h
+++ b/clang/lib/Basic/Targets/AMDGPU.h
@@ -462,6 +462,14 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
   }
 
   bool hasHIPImageSupport() const override { return HasImage; }
+
+  std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
+    // This is imprecise as the value can vary between 64, 128 (even 256!) bytes
+    // depending on the level of cache and the target architecture. We select
+    // the size that corresponds to the largest L1 cache line for all
+    // architectures.
+    return std::make_pair(128, 128);
+  }
 };
 
 } // namespace targets

diff  --git a/clang/test/Driver/amdgpu-macros.cl b/clang/test/Driver/amdgpu-macros.cl
index dd5a4483e4d607..2fedd10bb53445 100644
--- a/clang/test/Driver/amdgpu-macros.cl
+++ b/clang/test/Driver/amdgpu-macros.cl
@@ -153,6 +153,8 @@
 // ARCH-GCN-DAG: #define __[[FAMILY]]__ 1
 // ARCH-GCN-DAG: #define __amdgcn_processor__ "[[CPU]]"
 // ARCH-GCN-DAG: #define __AMDGCN_WAVEFRONT_SIZE [[WAVEFRONT_SIZE]]
+// ARCH-GCN-DAG: #define __GCC_DESTRUCTIVE_SIZE 128
+// ARCH-GCN-DAG: #define __GCC_CONSTRUCTIVE_SIZE 128
 // UNSAFEFPATOMIC-DAG: #define __AMDGCN_UNSAFE_FP_ATOMICS__ 1
 
 // RUN: %clang -E -dM -target amdgcn -mcpu=gfx906 -mwavefrontsize64 \


        


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