[clang] [llvm] [LoongArch] Support amcas[_db].{b/h/w/d} instructions. (PR #114189)

[via cfe-commits]

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@@ -0,0 +1,5025 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 -mattr=+d,-lamcas < %s | FileCheck %s --check-prefix=LA64
+; RUN: llc --mtriple=loongarch64 -mattr=+d,+lamcas < %s | FileCheck %s --check-prefix=LA64-LAMCAS
+
+define i8 @atomicrmw_xchg_i8_acquire(ptr %a, i8 %b) nounwind {
+; LA64-LABEL: atomicrmw_xchg_i8_acquire:
+; LA64:       # %bb.0:
+; LA64-NEXT:    slli.d $a2, $a0, 3
+; LA64-NEXT:    bstrins.d $a0, $zero, 1, 0
+; LA64-NEXT:    ori $a3, $zero, 255
+; LA64-NEXT:    sll.w $a3, $a3, $a2
+; LA64-NEXT:    andi $a1, $a1, 255
+; LA64-NEXT:    sll.w $a1, $a1, $a2
+; LA64-NEXT:  .LBB0_1: # =>This Inner Loop Header: Depth=1
+; LA64-NEXT:    ll.w $a4, $a0, 0
+; LA64-NEXT:    addi.w $a5, $a1, 0
+; LA64-NEXT:    xor $a5, $a4, $a5
+; LA64-NEXT:    and $a5, $a5, $a3
+; LA64-NEXT:    xor $a5, $a4, $a5
+; LA64-NEXT:    sc.w $a5, $a0, 0
+; LA64-NEXT:    beqz $a5, .LBB0_1
+; LA64-NEXT:  # %bb.2:
+; LA64-NEXT:    srl.w $a0, $a4, $a2
+; LA64-NEXT:    ret
+;
+; LA64-LAMCAS-LABEL: atomicrmw_xchg_i8_acquire:
+; LA64-LAMCAS:       # %bb.0:
+; LA64-LAMCAS-NEXT:    ld.bu $a2, $a0, 0
+; LA64-LAMCAS-NEXT:    .p2align 4, , 16
+; LA64-LAMCAS-NEXT:  .LBB0_1: # %atomicrmw.start
+; LA64-LAMCAS-NEXT:    # =>This Inner Loop Header: Depth=1
+; LA64-LAMCAS-NEXT:    ext.w.b $a3, $a2
----------------
tangaac wrote:

No, the reason for this sign extension is because ld.bu.
All i8, i16 use ld.bu / ld.hu to load the value, and use  ext.w.b / ext.w.h  later
i32, i64 use ld.w / ld.d to load the value, and use move later
So the number of insts is the same.

```llvm
; LA64-LAMCAS-LABEL: atomicrmw_nand_i8_acquire:
; LA64-LAMCAS:       # %bb.0:
; LA64-LAMCAS-NEXT:    move $a2, $a0
; LA64-LAMCAS-NEXT:    ld.bu $a0, $a0, 0
; LA64-LAMCAS-NEXT:    .p2align 4, , 16
; LA64-LAMCAS-NEXT:  .LBB18_1: # %atomicrmw.start
; LA64-LAMCAS-NEXT:    # =>This Inner Loop Header: Depth=1
; LA64-LAMCAS-NEXT:    and $a3, $a0, $a1
; LA64-LAMCAS-NEXT:    nor $a3, $a3, $zero
; LA64-LAMCAS-NEXT:    ext.w.b $a4, $a0
; LA64-LAMCAS-NEXT:    amcas_db.b $a0, $a3, $a2
; LA64-LAMCAS-NEXT:    bne $a0, $a4, .LBB18_1
; LA64-LAMCAS-NEXT:  # %bb.2: # %atomicrmw.end
; LA64-LAMCAS-NEXT:    ret

; LA64-LAMCAS-LABEL: atomicrmw_nand_i32_acquire:
; LA64-LAMCAS:       # %bb.0:
; LA64-LAMCAS-NEXT:    move $a2, $a0
; LA64-LAMCAS-NEXT:    ld.w $a0, $a0, 0
; LA64-LAMCAS-NEXT:    .p2align 4, , 16
; LA64-LAMCAS-NEXT:  .LBB20_1: # %atomicrmw.start
; LA64-LAMCAS-NEXT:    # =>This Inner Loop Header: Depth=1
; LA64-LAMCAS-NEXT:    move $a3, $a0
; LA64-LAMCAS-NEXT:    and $a4, $a0, $a1
; LA64-LAMCAS-NEXT:    nor $a4, $a4, $zero
; LA64-LAMCAS-NEXT:    amcas_db.w $a0, $a4, $a2
; LA64-LAMCAS-NEXT:    bne $a0, $a3, .LBB20_1
; LA64-LAMCAS-NEXT:  # %bb.2: # %atomicrmw.end
; LA64-LAMCAS-NEXT:    ret
```

https://github.com/llvm/llvm-project/pull/114189