[clang] [llvm] [X86][AMX] Support AMX-TRANSPOSE (PR #113532)

[Feng Zou via cfe-commits]

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@@ -623,6 +623,37 @@ struct X86Operand final : public MCParsedAsmOperand {
     Inst.addOperand(MCOperand::createReg(Reg));
   }
 
+  bool isTILEPair() const {
+    return Kind == Register &&
+           X86MCRegisterClasses[X86::TILERegClassID].contains(getReg());
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fzou1 wrote:

Should X86::TILERegClassID be X86::TILEPAIRRegClassID?

https://github.com/llvm/llvm-project/pull/113532