[clang] [llvm] [AArch64] Reduce +sve2-aes to an alias of +sve-aes+sve2 (PR #114293)

via cfe-commits cfe-commits at lists.llvm.org
Thu Oct 31 05:18:36 PDT 2024


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@@ -369,9 +369,12 @@ def FeatureSVE2 : ExtensionWithMArch<"sve2", "SVE2", "FEAT_SVE2",
   "Enable Scalable Vector Extension 2 (SVE2) instructions",
   [FeatureSVE, FeatureUseScalarIncVL]>;
 
-def FeatureSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES",
+def FeatureSVEAES : ExtensionWithMArch<"sve-aes", "SVEAES",
   "FEAT_SVE_AES, FEAT_SVE_PMULL128",
-  "Enable AES SVE2 instructions", [FeatureSVE2, FeatureAES]>;
+  "Enable SVE AES and 128-bit PMULL instructions", [FeatureAES]>;
+
+def FeatureSVE2AES : ExtensionWithMArch<"sve2-aes", "SVE2AES", "",
----------------
SpencerAbson wrote:

I planned on doing this in a separate patch to make this easier to review - but I'm realizing now that my changes to `arm_sve.td` actually require me to do this (so that the IR intrinsics can select the instructions based on +sve-aes+sve2).

Thanks!

https://github.com/llvm/llvm-project/pull/114293


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