[clang] [llvm] [RISCV] Inline Assembly Support for GPR Pairs ('Pr') (PR #112983)
Pengcheng Wang via cfe-commits
cfe-commits at lists.llvm.org
Tue Oct 29 06:09:52 PDT 2024
https://github.com/wangpc-pp commented:
Thanks! I just had a detailed look. Given that you have explained almost all the code detailedly, I think this PR looks great to me!
Just some overall comments:
1. I personally like your proposal of adding new constraints, but we still need the agreement between community members.
2. I saw all the comments above and I know reason why we choose to add new MVT types. My question is, maybe we can make it less target-specific? I don't think this is a RISC-V only problem.
3. We should be able to use `Pr` for Zacas now? So maybe we should add some tests for it.
https://github.com/llvm/llvm-project/pull/112983
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