[clang] e3b22dc - [clang][RISCV] Extend intrinsic size check variable from 16 -> 32 bits. NFC (#111481)
via cfe-commits
cfe-commits at lists.llvm.org
Fri Oct 18 11:36:23 PDT 2024
Author: Brandon Wu
Date: 2024-10-18T11:36:19-07:00
New Revision: e3b22dcedb53386d7ed4db0e013365ebfe67571c
URL: https://github.com/llvm/llvm-project/commit/e3b22dcedb53386d7ed4db0e013365ebfe67571c
DIFF: https://github.com/llvm/llvm-project/commit/e3b22dcedb53386d7ed4db0e013365ebfe67571c.diff
LOG: [clang][RISCV] Extend intrinsic size check variable from 16 -> 32 bits. NFC (#111481)
We currently have over 67000 intrinsics, uint16_t will overflow.
Added:
Modified:
clang/lib/Sema/SemaRISCV.cpp
Removed:
################################################################################
diff --git a/clang/lib/Sema/SemaRISCV.cpp b/clang/lib/Sema/SemaRISCV.cpp
index d1ccc2774152b1..e63d605349e060 100644
--- a/clang/lib/Sema/SemaRISCV.cpp
+++ b/clang/lib/Sema/SemaRISCV.cpp
@@ -50,7 +50,7 @@ struct RVVIntrinsicDef {
struct RVVOverloadIntrinsicDef {
// Indexes of RISCVIntrinsicManagerImpl::IntrinsicList.
- SmallVector<uint16_t, 8> Indexes;
+ SmallVector<uint32_t, 8> Indexes;
};
} // namespace
@@ -169,7 +169,7 @@ class RISCVIntrinsicManagerImpl : public sema::RISCVIntrinsicManager {
// List of all RVV intrinsic.
std::vector<RVVIntrinsicDef> IntrinsicList;
// Mapping function name to index of IntrinsicList.
- StringMap<uint16_t> Intrinsics;
+ StringMap<uint32_t> Intrinsics;
// Mapping function name to RVVOverloadIntrinsicDef.
StringMap<RVVOverloadIntrinsicDef> OverloadIntrinsics;
@@ -399,7 +399,7 @@ void RISCVIntrinsicManagerImpl::InitRVVIntrinsic(
Record.HasFRMRoundModeOp);
// Put into IntrinsicList.
- uint16_t Index = IntrinsicList.size();
+ uint32_t Index = IntrinsicList.size();
assert(IntrinsicList.size() == (size_t)Index &&
"Intrinsics indices overflow.");
IntrinsicList.push_back({BuiltinName, Signature});
More information about the cfe-commits
mailing list