[clang] [llvm] [RISCV] Inline Assembly: RVC constraint and N modifier (PR #112561)

[Craig Topper via cfe-commits]

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@@ -348,6 +349,14 @@ bool RISCVAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
       if (!MO.isReg())
         OS << 'i';
       return false;
+    case 'N': // Print the register encoding as an integer (0-31, or 0-7 when
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topperc wrote:

8-15 for 'c*'?

https://github.com/llvm/llvm-project/pull/112561