[clang] [CLANG]Add Scalable vectors for mfloat8_t (PR #101644)

via cfe-commits cfe-commits at lists.llvm.org
Mon Oct 14 09:35:42 PDT 2024


https://github.com/CarolineConcatto updated https://github.com/llvm/llvm-project/pull/101644

>From 7134302c7e1054021af36a207dbfd0c40c9e8c51 Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Fri, 2 Aug 2024 08:47:18 +0000
Subject: [PATCH 1/3] [CLANG]Add Scalable vectors for mfloat8_t

This patch adds these new vector sizes for sve:
svmfloat8_t

According to the ARM ACLE PR#323[1].

[1] ARM-software/acle#323
---
 .../clang/Basic/AArch64SVEACLETypes.def       |  7 ++++
 clang/include/clang/Basic/arm_sve_sme_incl.td |  1 +
 .../include/clang/Serialization/ASTBitCodes.h |  2 +-
 clang/lib/AST/ASTContext.cpp                  | 14 ++++++--
 clang/test/CodeGen/arm-mfp8.c                 | 28 ++++++++++++++++
 clang/test/Modules/no-external-type-id.cppm   |  2 +-
 clang/test/Sema/arm-mfp8.cpp                  | 13 ++++++++
 clang/utils/TableGen/SveEmitter.cpp           | 33 ++++++++++++++++---
 8 files changed, 91 insertions(+), 9 deletions(-)
 create mode 100644 clang/test/CodeGen/arm-mfp8.c
 create mode 100644 clang/test/Sema/arm-mfp8.cpp

diff --git a/clang/include/clang/Basic/AArch64SVEACLETypes.def b/clang/include/clang/Basic/AArch64SVEACLETypes.def
index 55ed9c36f6c5cd..b72327af61844a 100644
--- a/clang/include/clang/Basic/AArch64SVEACLETypes.def
+++ b/clang/include/clang/Basic/AArch64SVEACLETypes.def
@@ -69,6 +69,11 @@
 
 #ifndef SVE_VECTOR_TYPE_BFLOAT
 #define SVE_VECTOR_TYPE_BFLOAT(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF) \
+  SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, true, false, true)
+#endif
+
+#ifndef SVE_VECTOR_TYPE_MFLOAT
+#define SVE_VECTOR_TYPE_MFLOAT(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF) \
   SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, false, false, true)
 #endif
 
@@ -114,6 +119,7 @@ SVE_VECTOR_TYPE_FLOAT("__SVFloat32_t", "__SVFloat32_t", SveFloat32, SveFloat32Ty
 SVE_VECTOR_TYPE_FLOAT("__SVFloat64_t", "__SVFloat64_t", SveFloat64, SveFloat64Ty, 2, 64, 1)
 
 SVE_VECTOR_TYPE_BFLOAT("__SVBfloat16_t", "__SVBfloat16_t", SveBFloat16, SveBFloat16Ty, 8, 16, 1)
+SVE_VECTOR_TYPE_MFLOAT("__SVMfloat8_t", "__SVMfloat8_t",  SveMFloat8, SveMFloat8Ty, 16, 8, 1)
 
 //
 // x2
@@ -183,6 +189,7 @@ SVE_OPAQUE_TYPE("__SVCount_t", "__SVCount_t", SveCount, SveCountTy)
 
 #undef SVE_VECTOR_TYPE
 #undef SVE_VECTOR_TYPE_BFLOAT
+#undef SVE_VECTOR_TYPE_MFLOAT
 #undef SVE_VECTOR_TYPE_FLOAT
 #undef SVE_VECTOR_TYPE_INT
 #undef SVE_PREDICATE_TYPE
diff --git a/clang/include/clang/Basic/arm_sve_sme_incl.td b/clang/include/clang/Basic/arm_sve_sme_incl.td
index fdf4ba55fe9382..50911fb63e818e 100644
--- a/clang/include/clang/Basic/arm_sve_sme_incl.td
+++ b/clang/include/clang/Basic/arm_sve_sme_incl.td
@@ -162,6 +162,7 @@ def EltTyBool16  : EltType<10>;
 def EltTyBool32  : EltType<11>;
 def EltTyBool64  : EltType<12>;
 def EltTyBFloat16 : EltType<13>;
+def EltTyMFloat8  : EltType<14>;
 
 class MemEltType<int val> {
   int Value = val;
diff --git a/clang/include/clang/Serialization/ASTBitCodes.h b/clang/include/clang/Serialization/ASTBitCodes.h
index 5be33ae0ed1b98..d468d49e1e632f 100644
--- a/clang/include/clang/Serialization/ASTBitCodes.h
+++ b/clang/include/clang/Serialization/ASTBitCodes.h
@@ -1145,7 +1145,7 @@ enum PredefinedTypeIDs {
 ///
 /// Type IDs for non-predefined types will start at
 /// NUM_PREDEF_TYPE_IDs.
-const unsigned NUM_PREDEF_TYPE_IDS = 505;
+const unsigned NUM_PREDEF_TYPE_IDS = 506;
 
 // Ensure we do not overrun the predefined types we reserved
 // in the enum PredefinedTypeIDs above.
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index fd8aa8de79b49f..7c11fec02a3f60 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -4304,7 +4304,6 @@ ASTContext::getBuiltinVectorTypeInfo(const BuiltinType *Ty) const {
   switch (Ty->getKind()) {
   default:
     llvm_unreachable("Unsupported builtin vector type");
-
 #define SVE_VECTOR_TYPE_INT(Name, MangledName, Id, SingletonId, NumEls,        \
                             ElBits, NF, IsSigned)                              \
   case BuiltinType::Id:                                                        \
@@ -4319,12 +4318,16 @@ ASTContext::getBuiltinVectorTypeInfo(const BuiltinType *Ty) const {
                                ElBits, NF)                                     \
   case BuiltinType::Id:                                                        \
     return {BFloat16Ty, llvm::ElementCount::getScalable(NumEls), NF};
+#define SVE_VECTOR_TYPE_MFLOAT(Name, MangledName, Id, SingletonId, NumEls,     \
+                               ElBits, NF)                                     \
+  case BuiltinType::Id:                                                        \
+    return {getIntTypeForBitwidth(ElBits, false),                              \
+            llvm::ElementCount::getScalable(NumEls), NF};
 #define SVE_PREDICATE_TYPE_ALL(Name, MangledName, Id, SingletonId, NumEls, NF) \
   case BuiltinType::Id:                                                        \
     return {BoolTy, llvm::ElementCount::getScalable(NumEls), NF};
 #define SVE_OPAQUE_TYPE(Name, MangledName, Id, SingletonId)
 #include "clang/Basic/AArch64SVEACLETypes.def"
-
 #define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF,         \
                             IsSigned)                                          \
   case BuiltinType::Id:                                                        \
@@ -4384,6 +4387,13 @@ QualType ASTContext::getScalableVectorType(QualType EltTy, unsigned NumElts,
       EltTySize == ElBits && NumElts == (NumEls * NF) && NumFields == 1) {     \
     return SingletonId;                                                        \
   }
+#define SVE_VECTOR_TYPE_MFLOAT(Name, MangledName, Id, SingletonId, NumEls,     \
+                               ElBits, NF)                                     \
+  if (EltTy->hasIntegerRepresentation() && !EltTy->isBooleanType() &&          \
+      !EltTy->hasSignedIntegerRepresentation() && EltTySize == ElBits &&       \
+      NumElts == (NumEls * NF) && NumFields == 1) {                            \
+    return SingletonId;                                                        \
+  }
 #define SVE_PREDICATE_TYPE_ALL(Name, MangledName, Id, SingletonId, NumEls, NF) \
   if (EltTy->isBooleanType() && NumElts == (NumEls * NF) && NumFields == 1)    \
     return SingletonId;
diff --git a/clang/test/CodeGen/arm-mfp8.c b/clang/test/CodeGen/arm-mfp8.c
new file mode 100644
index 00000000000000..5206b1f600aa58
--- /dev/null
+++ b/clang/test/CodeGen/arm-mfp8.c
@@ -0,0 +1,28 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
+// RUN: %clang_cc1 -emit-llvm -triple aarch64-arm-none-eabi -target-feature -fp8  -target-feature +sve -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-C
+// RUN: %clang_cc1 -emit-llvm -triple aarch64-arm-none-eabi -target-feature -fp8  -target-feature +sve  -o -  -x c++ %s | FileCheck %s --check-prefixes=CHECK,CHECK-CXX
+
+// REQUIRES: aarch64-registered-target
+
+#include <arm_sve.h>
+// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_ret_svmfloat8_t(
+// CHECK-C-SAME: <vscale x 16 x i8> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-C-NEXT:  [[ENTRY:.*:]]
+// CHECK-C-NEXT:    [[V_ADDR:%.*]] = alloca <vscale x 16 x i8>, align 16
+// CHECK-C-NEXT:    store <vscale x 16 x i8> [[V]], ptr [[V_ADDR]], align 16
+// CHECK-C-NEXT:    [[TMP0:%.*]] = load <vscale x 16 x i8>, ptr [[V_ADDR]], align 16
+// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
+//
+// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z20test_ret_svmfloat8_tu13__SVMfloat8_t(
+// CHECK-CXX-SAME: <vscale x 16 x i8> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
+// CHECK-CXX-NEXT:  [[ENTRY:.*:]]
+// CHECK-CXX-NEXT:    [[V_ADDR:%.*]] = alloca <vscale x 16 x i8>, align 16
+// CHECK-CXX-NEXT:    store <vscale x 16 x i8> [[V]], ptr [[V_ADDR]], align 16
+// CHECK-CXX-NEXT:    [[TMP0:%.*]] = load <vscale x 16 x i8>, ptr [[V_ADDR]], align 16
+// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
+//
+svmfloat8_t test_ret_svmfloat8_t(svmfloat8_t v) {
+  return v;
+}
+//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+// CHECK: {{.*}}
diff --git a/clang/test/Modules/no-external-type-id.cppm b/clang/test/Modules/no-external-type-id.cppm
index 068e52646dcc1c..a4ca389739fbb5 100644
--- a/clang/test/Modules/no-external-type-id.cppm
+++ b/clang/test/Modules/no-external-type-id.cppm
@@ -23,7 +23,7 @@ export module b;
 import a;
 export int b();
 
-// CHECK: <DECL_FUNCTION {{.*}} op8=4056
+// CHECK: <DECL_FUNCTION {{.*}} op8=4064
 // CHECK: <TYPE_FUNCTION_PROTO
 
 //--- a.v1.cppm
diff --git a/clang/test/Sema/arm-mfp8.cpp b/clang/test/Sema/arm-mfp8.cpp
new file mode 100644
index 00000000000000..7b70b75728d248
--- /dev/null
+++ b/clang/test/Sema/arm-mfp8.cpp
@@ -0,0 +1,13 @@
+// RUN: %clang_cc1 -fsyntax-only -verify=sve -triple aarch64-arm-none-eabi \
+// RUN: -target-feature -fp8 -target-feature +sve %s
+
+// REQUIRES: aarch64-registered-target
+
+#include <arm_sve.h>
+void test_vector_sve(svmfloat8_t a, svuint8_t c) {
+  a + c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
+  a - c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
+  a * c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
+  a / c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
+}
+
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index 2f9747e7de3de2..d195b0d94149c0 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -51,7 +51,7 @@ using TypeSpec = std::string;
 
 namespace {
 class SVEType {
-  bool Float, Signed, Immediate, Void, Constant, Pointer, BFloat;
+  bool Float, Signed, Immediate, Void, Constant, Pointer, BFloat, MFloat;
   bool DefaultType, IsScalable, Predicate, PredicatePattern, PrefetchOp,
       Svcount;
   unsigned Bitwidth, ElementBitwidth, NumVectors;
@@ -61,10 +61,10 @@ class SVEType {
 
   SVEType(StringRef TS, char CharMod, unsigned NumVectors = 1)
       : Float(false), Signed(true), Immediate(false), Void(false),
-        Constant(false), Pointer(false), BFloat(false), DefaultType(false),
-        IsScalable(true), Predicate(false), PredicatePattern(false),
-        PrefetchOp(false), Svcount(false), Bitwidth(128), ElementBitwidth(~0U),
-        NumVectors(NumVectors) {
+        Constant(false), Pointer(false), BFloat(false), MFloat(false),
+        DefaultType(false), IsScalable(true), Predicate(false),
+        PredicatePattern(false), PrefetchOp(false), Svcount(false),
+        Bitwidth(128), ElementBitwidth(~0U), NumVectors(NumVectors) {
     if (!TS.empty())
       applyTypespec(TS);
     applyModifier(CharMod);
@@ -87,6 +87,10 @@ class SVEType {
   bool isDefault() const { return DefaultType; }
   bool isFloat() const { return Float && !BFloat; }
   bool isBFloat() const { return BFloat && !Float; }
+  bool isMFloat() const {
+    return MFloat && !BFloat && !Float;
+    ;
+  }
   bool isFloatingPoint() const { return Float || BFloat; }
   bool isInteger() const {
     return !isFloatingPoint() && !Predicate && !Svcount;
@@ -454,6 +458,8 @@ std::string SVEType::builtin_str() const {
   else if (isBFloat()) {
     assert(ElementBitwidth == 16 && "Not a valid BFloat.");
     S += "y";
+  } else if (isMFloat()) {
+    S += "m";
   }
 
   if (!isFloatingPoint()) {
@@ -509,6 +515,8 @@ std::string SVEType::str() const {
       S += "bool";
     else if (isBFloat())
       S += "bfloat";
+    else if (isMFloat())
+      S += "mfloat";
     else
       S += "int";
 
@@ -574,6 +582,12 @@ void SVEType::applyTypespec(StringRef TS) {
       Float = false;
       ElementBitwidth = 16;
       break;
+    case 'm':
+      MFloat = true;
+      Float = false;
+      BFloat = false;
+      ElementBitwidth = 8;
+      break;
     default:
       llvm_unreachable("Unhandled type code!");
     }
@@ -1026,6 +1040,8 @@ std::string Intrinsic::replaceTemplatedArgs(std::string Name, TypeSpec TS,
       TypeCode = 'b';
     else if (T.isBFloat())
       TypeCode = "bf";
+    else if (T.isMFloat())
+      TypeCode = "mfp";
     else
       TypeCode = 'f';
     Ret.replace(Pos, NumChars, TypeCode + utostr(T.getElementSizeInBits()));
@@ -1119,6 +1135,11 @@ uint64_t SVEEmitter::encodeTypeFlags(const SVEType &T) {
     return encodeEltType("EltTyBFloat16");
   }
 
+  if (T.isMFloat()) {
+    assert(T.getElementSizeInBits() == 8 && "Not a valid MFloat.");
+    return encodeEltType("EltTyMFloat8");
+  }
+
   if (T.isPredicateVector() || T.isSvcount()) {
     switch (T.getElementSizeInBits()) {
     case 8:
@@ -1296,6 +1317,8 @@ void SVEEmitter::createHeader(raw_ostream &OS) {
   OS << "#include <arm_bf16.h>\n";
   OS << "#include <arm_vector_types.h>\n";
 
+  OS << "typedef __SVMfloat8_t svmfloat8_t;\n\n";
+
   OS << "typedef __SVFloat32_t svfloat32_t;\n";
   OS << "typedef __SVFloat64_t svfloat64_t;\n";
   OS << "typedef __clang_svint8x2_t svint8x2_t;\n";

>From 111faea1619953a76a1acda070c61559c00678ca Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Thu, 10 Oct 2024 13:24:54 +0000
Subject: [PATCH 2/3] Address comments review

---
 .../clang/Basic/AArch64SVEACLETypes.def       | 10 ++-----
 clang/lib/AST/ASTContext.cpp                  |  7 ++---
 clang/lib/AST/Type.cpp                        |  1 +
 clang/test/AST/ast-dump-aarch64-sve-types.c   |  3 ++
 clang/test/CodeGen/aarch64-sve.c              |  2 ++
 clang/test/CodeGen/arm-mfp8.c                 | 28 -------------------
 .../CodeGenCXX/aarch64-mangle-sve-vectors.cpp |  4 +++
 .../test/CodeGenCXX/aarch64-sve-typeinfo.cpp  |  5 ++++
 .../CodeGenCXX/aarch64-sve-vector-init.cpp    | 17 +++++++++++
 clang/test/CodeGenObjC/aarch64-sve-types.m    |  3 ++
 clang/test/Sema/aarch64-sve-types.c           |  3 ++
 clang/test/Sema/arm-mfp8.cpp                  |  8 +++---
 clang/test/SemaObjC/aarch64-sve-types.m       |  2 ++
 clang/utils/TableGen/SveEmitter.cpp           | 10 ++++---
 14 files changed, 55 insertions(+), 48 deletions(-)
 delete mode 100644 clang/test/CodeGen/arm-mfp8.c

diff --git a/clang/include/clang/Basic/AArch64SVEACLETypes.def b/clang/include/clang/Basic/AArch64SVEACLETypes.def
index b72327af61844a..a84f404153f956 100644
--- a/clang/include/clang/Basic/AArch64SVEACLETypes.def
+++ b/clang/include/clang/Basic/AArch64SVEACLETypes.def
@@ -72,11 +72,6 @@
   SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, true, false, true)
 #endif
 
-#ifndef SVE_VECTOR_TYPE_MFLOAT
-#define SVE_VECTOR_TYPE_MFLOAT(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF) \
-  SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, false, false, true)
-#endif
-
 #ifndef SVE_VECTOR_TYPE_FLOAT
 #define SVE_VECTOR_TYPE_FLOAT(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF) \
   SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, false, true, false)
@@ -119,7 +114,9 @@ SVE_VECTOR_TYPE_FLOAT("__SVFloat32_t", "__SVFloat32_t", SveFloat32, SveFloat32Ty
 SVE_VECTOR_TYPE_FLOAT("__SVFloat64_t", "__SVFloat64_t", SveFloat64, SveFloat64Ty, 2, 64, 1)
 
 SVE_VECTOR_TYPE_BFLOAT("__SVBfloat16_t", "__SVBfloat16_t", SveBFloat16, SveBFloat16Ty, 8, 16, 1)
-SVE_VECTOR_TYPE_MFLOAT("__SVMfloat8_t", "__SVMfloat8_t",  SveMFloat8, SveMFloat8Ty, 16, 8, 1)
+
+// This is a 8 bits opaque type.
+SVE_VECTOR_TYPE_INT("__SVMfloat8_t", "__SVMfloat8_t",  SveMFloat8, SveMFloat8Ty, 16, 8, 1, false)
 
 //
 // x2
@@ -189,7 +186,6 @@ SVE_OPAQUE_TYPE("__SVCount_t", "__SVCount_t", SveCount, SveCountTy)
 
 #undef SVE_VECTOR_TYPE
 #undef SVE_VECTOR_TYPE_BFLOAT
-#undef SVE_VECTOR_TYPE_MFLOAT
 #undef SVE_VECTOR_TYPE_FLOAT
 #undef SVE_VECTOR_TYPE_INT
 #undef SVE_PREDICATE_TYPE
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index c7dcbb871cd26b..2aa7cfeb0fd32b 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -4339,6 +4339,7 @@ ASTContext::getBuiltinVectorTypeInfo(const BuiltinType *Ty) const {
   switch (Ty->getKind()) {
   default:
     llvm_unreachable("Unsupported builtin vector type");
+
 #define SVE_VECTOR_TYPE_INT(Name, MangledName, Id, SingletonId, NumEls,        \
                             ElBits, NF, IsSigned)                              \
   case BuiltinType::Id:                                                        \
@@ -4353,16 +4354,12 @@ ASTContext::getBuiltinVectorTypeInfo(const BuiltinType *Ty) const {
                                ElBits, NF)                                     \
   case BuiltinType::Id:                                                        \
     return {BFloat16Ty, llvm::ElementCount::getScalable(NumEls), NF};
-#define SVE_VECTOR_TYPE_MFLOAT(Name, MangledName, Id, SingletonId, NumEls,     \
-                               ElBits, NF)                                     \
-  case BuiltinType::Id:                                                        \
-    return {getIntTypeForBitwidth(ElBits, false),                              \
-            llvm::ElementCount::getScalable(NumEls), NF};
 #define SVE_PREDICATE_TYPE_ALL(Name, MangledName, Id, SingletonId, NumEls, NF) \
   case BuiltinType::Id:                                                        \
     return {BoolTy, llvm::ElementCount::getScalable(NumEls), NF};
 #define SVE_OPAQUE_TYPE(Name, MangledName, Id, SingletonId)
 #include "clang/Basic/AArch64SVEACLETypes.def"
+
 #define RVV_VECTOR_TYPE_INT(Name, Id, SingletonId, NumEls, ElBits, NF,         \
                             IsSigned)                                          \
   case BuiltinType::Id:                                                        \
diff --git a/clang/lib/AST/Type.cpp b/clang/lib/AST/Type.cpp
index 6f4958801cfe82..5646f7d1b5dd21 100644
--- a/clang/lib/AST/Type.cpp
+++ b/clang/lib/AST/Type.cpp
@@ -2525,6 +2525,7 @@ bool Type::isSveVLSBuiltinType() const {
     case BuiltinType::SveBool:
     case BuiltinType::SveBoolx2:
     case BuiltinType::SveBoolx4:
+    case BuiltinType::SveMFloat8:
       return true;
     default:
       return false;
diff --git a/clang/test/AST/ast-dump-aarch64-sve-types.c b/clang/test/AST/ast-dump-aarch64-sve-types.c
index b5a0b00b492803..386133e05b1d13 100644
--- a/clang/test/AST/ast-dump-aarch64-sve-types.c
+++ b/clang/test/AST/ast-dump-aarch64-sve-types.c
@@ -45,6 +45,9 @@
 // CHECK: TypedefDecl {{.*}} implicit __SVBfloat16_t '__SVBfloat16_t'
 // CHECK-NEXT: -BuiltinType {{.*}} '__SVBfloat16_t'
 
+// CHECK: TypedefDecl {{.*}} implicit __SVMfloat8_t '__SVMfloat8_t'
+// CHECK-NEXT: -BuiltinType {{.*}} '__SVMfloat8_t'
+
 // CHECK: TypedefDecl {{.*}} implicit __SVBool_t '__SVBool_t'
 // CHECK-NEXT: -BuiltinType {{.*}} '__SVBool_t'
 
diff --git a/clang/test/CodeGen/aarch64-sve.c b/clang/test/CodeGen/aarch64-sve.c
index 5f6a0178aa4425..690b010e967ad7 100644
--- a/clang/test/CodeGen/aarch64-sve.c
+++ b/clang/test/CodeGen/aarch64-sve.c
@@ -13,6 +13,7 @@
 // CHECK: %f16 = alloca <vscale x 8 x half>, align 16
 // CHECK: %f32 = alloca <vscale x 4 x float>, align 16
 // CHECK: %f64 = alloca <vscale x 2 x double>, align 16
+// CHECK: %mf8 = alloca <vscale x 16 x i8>, align 16
 // CHECK: %bf16 = alloca <vscale x 8 x bfloat>, align 16
 // CHECK: %b8 = alloca <vscale x 16 x i1>, align 2
 
@@ -33,6 +34,7 @@ void test_locals(void) {
   __SVFloat32_t f32;
   __SVFloat64_t f64;
 
+  __SVMfloat8_t mf8;
   __SVBfloat16_t bf16;
 
   __SVBool_t b8;
diff --git a/clang/test/CodeGen/arm-mfp8.c b/clang/test/CodeGen/arm-mfp8.c
deleted file mode 100644
index 5206b1f600aa58..00000000000000
--- a/clang/test/CodeGen/arm-mfp8.c
+++ /dev/null
@@ -1,28 +0,0 @@
-// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
-// RUN: %clang_cc1 -emit-llvm -triple aarch64-arm-none-eabi -target-feature -fp8  -target-feature +sve -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-C
-// RUN: %clang_cc1 -emit-llvm -triple aarch64-arm-none-eabi -target-feature -fp8  -target-feature +sve  -o -  -x c++ %s | FileCheck %s --check-prefixes=CHECK,CHECK-CXX
-
-// REQUIRES: aarch64-registered-target
-
-#include <arm_sve.h>
-// CHECK-C-LABEL: define dso_local <vscale x 16 x i8> @test_ret_svmfloat8_t(
-// CHECK-C-SAME: <vscale x 16 x i8> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-C-NEXT:  [[ENTRY:.*:]]
-// CHECK-C-NEXT:    [[V_ADDR:%.*]] = alloca <vscale x 16 x i8>, align 16
-// CHECK-C-NEXT:    store <vscale x 16 x i8> [[V]], ptr [[V_ADDR]], align 16
-// CHECK-C-NEXT:    [[TMP0:%.*]] = load <vscale x 16 x i8>, ptr [[V_ADDR]], align 16
-// CHECK-C-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
-//
-// CHECK-CXX-LABEL: define dso_local <vscale x 16 x i8> @_Z20test_ret_svmfloat8_tu13__SVMfloat8_t(
-// CHECK-CXX-SAME: <vscale x 16 x i8> [[V:%.*]]) #[[ATTR0:[0-9]+]] {
-// CHECK-CXX-NEXT:  [[ENTRY:.*:]]
-// CHECK-CXX-NEXT:    [[V_ADDR:%.*]] = alloca <vscale x 16 x i8>, align 16
-// CHECK-CXX-NEXT:    store <vscale x 16 x i8> [[V]], ptr [[V_ADDR]], align 16
-// CHECK-CXX-NEXT:    [[TMP0:%.*]] = load <vscale x 16 x i8>, ptr [[V_ADDR]], align 16
-// CHECK-CXX-NEXT:    ret <vscale x 16 x i8> [[TMP0]]
-//
-svmfloat8_t test_ret_svmfloat8_t(svmfloat8_t v) {
-  return v;
-}
-//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
-// CHECK: {{.*}}
diff --git a/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp b/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
index dfe31ff2ce25fb..3f2b0622d55162 100644
--- a/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
+++ b/clang/test/CodeGenCXX/aarch64-mangle-sve-vectors.cpp
@@ -17,6 +17,7 @@ void f(__SVFloat16_t, __SVFloat16_t);
 void f(__SVFloat32_t, __SVFloat32_t);
 void f(__SVFloat64_t, __SVFloat64_t);
 void f(__SVBfloat16_t, __SVBfloat16_t);
+void f(__SVMfloat8_t, __SVMfloat8_t);
 void f(__SVBool_t, __SVBool_t);
 void f(__SVCount_t, __SVCount_t);
 
@@ -150,6 +151,7 @@ void f(__clang_svboolx4_t, __clang_svboolx4_t);
 // CHECK-NEXT:    call void @_Z1fu13__SVFloat16_tS_(<vscale x 8 x half> zeroinitializer, <vscale x 8 x half> zeroinitializer)
 // CHECK-NEXT:    call void @_Z1fu13__SVFloat32_tS_(<vscale x 4 x float> zeroinitializer, <vscale x 4 x float> zeroinitializer)
 // CHECK-NEXT:    call void @_Z1fu13__SVFloat64_tS_(<vscale x 2 x double> zeroinitializer, <vscale x 2 x double> zeroinitializer)
+// CHECK-NEXT:     call void @_Z1fu13__SVMfloat8_tS_(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i8> zeroinitializer)
 // CHECK-NEXT:    call void @_Z1fu14__SVBfloat16_tS_(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x bfloat> zeroinitializer)
 // CHECK-NEXT:    call void @_Z1fu10__SVBool_tS_(<vscale x 16 x i1> zeroinitializer, <vscale x 16 x i1> zeroinitializer)
 // CHECK-NEXT:    call void @_Z1fu11__SVCount_tS_(target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") zeroinitializer)
@@ -664,6 +666,7 @@ void f(__clang_svboolx4_t, __clang_svboolx4_t);
 // COMPAT_17-NEXT:    call void @_Z1fu13__SVFloat16_tu13__SVFloat16_t(<vscale x 8 x half> zeroinitializer, <vscale x 8 x half> zeroinitializer)
 // COMPAT_17-NEXT:    call void @_Z1fu13__SVFloat32_tu13__SVFloat32_t(<vscale x 4 x float> zeroinitializer, <vscale x 4 x float> zeroinitializer)
 // COMPAT_17-NEXT:    call void @_Z1fu13__SVFloat64_tu13__SVFloat64_t(<vscale x 2 x double> zeroinitializer, <vscale x 2 x double> zeroinitializer)
+// COMPAT_17-NEXT:    call void @_Z1fu13__SVMfloat8_tu13__SVMfloat8_t(<vscale x 16 x i8> zeroinitializer, <vscale x 16 x i8> zeroinitializer)
 // COMPAT_17-NEXT:    call void @_Z1fu14__SVBFloat16_tu14__SVBFloat16_t(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x bfloat> zeroinitializer)
 // COMPAT_17-NEXT:    call void @_Z1fu10__SVBool_tu10__SVBool_t(<vscale x 16 x i1> zeroinitializer, <vscale x 16 x i1> zeroinitializer)
 // COMPAT_17-NEXT:    call void @_Z1fu11__SVCount_tu11__SVCount_t(target("aarch64.svcount") zeroinitializer, target("aarch64.svcount") zeroinitializer)
@@ -1100,6 +1103,7 @@ void foo() {
   f(__SVFloat16_t(), __SVFloat16_t());
   f(__SVFloat32_t(), __SVFloat32_t());
   f(__SVFloat64_t(), __SVFloat64_t());
+  f(__SVMfloat8_t(), __SVMfloat8_t());
   f(__SVBfloat16_t(), __SVBfloat16_t());
   f(__SVBool_t(), __SVBool_t());
   f(__SVCount_t(), __SVCount_t());
diff --git a/clang/test/CodeGenCXX/aarch64-sve-typeinfo.cpp b/clang/test/CodeGenCXX/aarch64-sve-typeinfo.cpp
index 7f6b2a9caae6b8..beab9f9078a773 100644
--- a/clang/test/CodeGenCXX/aarch64-sve-typeinfo.cpp
+++ b/clang/test/CodeGenCXX/aarch64-sve-typeinfo.cpp
@@ -21,6 +21,8 @@ auto &f64 = typeid(__SVFloat64_t);
 
 auto &bf16 = typeid(__SVBfloat16_t);
 
+auto &mf8 = typeid(__SVMfloat8_t);
+
 auto &b8 = typeid(__SVBool_t);
 auto &c8 = typeid(__SVCount_t);
 
@@ -60,6 +62,9 @@ auto &c8 = typeid(__SVCount_t);
 // CHECK-DAG: @_ZTSu14__SVBfloat16_t = {{.*}} c"u14__SVBfloat16_t\00"
 // CHECK-DAG: @_ZTIu14__SVBfloat16_t = {{.*}} @_ZTVN10__cxxabiv123__fundamental_type_infoE, {{.*}} @_ZTSu14__SVBfloat16_t
 
+// CHECK-DAG: @_ZTSu13__SVMfloat8_t = {{.*}} c"u13__SVMfloat8_t\00"
+// CHECK-DAG: @_ZTIu13__SVMfloat8_t = {{.*}} @_ZTVN10__cxxabiv123__fundamental_type_infoE, {{.*}} @_ZTSu13__SVMfloat8_t
+
 // CHECK-DAG: @_ZTSu10__SVBool_t = {{.*}} c"u10__SVBool_t\00"
 // CHECK-DAG: @_ZTIu10__SVBool_t = {{.*}} @_ZTVN10__cxxabiv123__fundamental_type_infoE, {{.*}} @_ZTSu10__SVBool_t
 
diff --git a/clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp b/clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp
index 503d77a1822a4b..45cf8081eb3a4d 100644
--- a/clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp
+++ b/clang/test/CodeGenCXX/aarch64-sve-vector-init.cpp
@@ -12,6 +12,7 @@
 // CHECK-NEXT:    [[U16:%.*]] = alloca <vscale x 8 x i16>, align 16
 // CHECK-NEXT:    [[U32:%.*]] = alloca <vscale x 4 x i32>, align 16
 // CHECK-NEXT:    [[U64:%.*]] = alloca <vscale x 2 x i64>, align 16
+// CHECK-NEXT:    [[MF8:%.*]] = alloca <vscale x 16 x i8>, align 16
 // CHECK-NEXT:    [[F16:%.*]] = alloca <vscale x 8 x half>, align 16
 // CHECK-NEXT:    [[F32:%.*]] = alloca <vscale x 4 x float>, align 16
 // CHECK-NEXT:    [[F64:%.*]] = alloca <vscale x 2 x double>, align 16
@@ -64,6 +65,7 @@
 // CHECK-NEXT:    store <vscale x 8 x i16> zeroinitializer, ptr [[U16]], align 16
 // CHECK-NEXT:    store <vscale x 4 x i32> zeroinitializer, ptr [[U32]], align 16
 // CHECK-NEXT:    store <vscale x 2 x i64> zeroinitializer, ptr [[U64]], align 16
+// CHECK-NEXT:    store <vscale x 16 x i8> zeroinitializer, ptr [[MF8]], align 16
 // CHECK-NEXT:    store <vscale x 8 x half> zeroinitializer, ptr [[F16]], align 16
 // CHECK-NEXT:    store <vscale x 4 x float> zeroinitializer, ptr [[F32]], align 16
 // CHECK-NEXT:    store <vscale x 2 x double> zeroinitializer, ptr [[F64]], align 16
@@ -119,6 +121,7 @@ void test_locals(void) {
   __SVUint16_t u16{};
   __SVUint32_t u32{};
   __SVUint64_t u64{};
+  __SVMfloat8_t mf8{};
   __SVFloat16_t f16{};
   __SVFloat32_t f32{};
   __SVFloat64_t f64{};
@@ -282,6 +285,20 @@ void test_copy_u64(__SVUint64_t a) {
   __SVUint64_t b{a};
 }
 
+// CHECK-LABEL: define dso_local void @_Z13test_copy_mf8u13__SVMfloat8_t
+// CHECK-SAME: (<vscale x 16 x i8> [[A:%.*]]) #[[ATTR0]] {
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[A_ADDR:%.*]] = alloca <vscale x 16 x i8>, align 16
+// CHECK-NEXT:    [[B:%.*]] = alloca <vscale x 16 x i8>, align 16
+// CHECK-NEXT:    store <vscale x 16 x i8> [[A]], ptr [[A_ADDR]], align 16
+// CHECK-NEXT:    [[TMP0:%.*]] = load <vscale x 16 x i8>, ptr [[A_ADDR]], align 16
+// CHECK-NEXT:    store <vscale x 16 x i8> [[TMP0]], ptr [[B]], align 16
+// CHECK-NEXT:    ret void
+//
+void test_copy_mf8(__SVMfloat8_t a) {
+  __SVMfloat8_t b{a};
+}
+
 // CHECK-LABEL: define dso_local void @_Z13test_copy_f16u13__SVFloat16_t
 // CHECK-SAME: (<vscale x 8 x half> [[A:%.*]]) #[[ATTR0]] {
 // CHECK-NEXT:  entry:
diff --git a/clang/test/CodeGenObjC/aarch64-sve-types.m b/clang/test/CodeGenObjC/aarch64-sve-types.m
index eae734fa4d5931..a97ce4b5bd39f4 100644
--- a/clang/test/CodeGenObjC/aarch64-sve-types.m
+++ b/clang/test/CodeGenObjC/aarch64-sve-types.m
@@ -31,5 +31,8 @@
 // CHECK: error: cannot yet @encode type __SVBfloat16_t
 const char bf16[] = @encode(__SVBfloat16_t);
 
+// CHECK: error: cannot yet @encode type __SVMfloat8_t
+const char mf8[] = @encode(__SVMfloat8_t);
+
 // CHECK: error: cannot yet @encode type __SVBool_t
 const char b8[] = @encode(__SVBool_t);
diff --git a/clang/test/Sema/aarch64-sve-types.c b/clang/test/Sema/aarch64-sve-types.c
index 4525e71de6ebae..8eed11675a69d0 100644
--- a/clang/test/Sema/aarch64-sve-types.c
+++ b/clang/test/Sema/aarch64-sve-types.c
@@ -37,6 +37,9 @@ void f(void) {
   int size_bf16[sizeof(__SVBfloat16_t) == 0 ? 1 : -1];        // expected-error {{invalid application of 'sizeof' to sizeless type '__SVBfloat16_t'}}
   int align_bf16[__alignof__(__SVBfloat16_t) == 16 ? 1 : -1]; // expected-error {{invalid application of '__alignof' to sizeless type '__SVBfloat16_t'}}
 
+ int size_mf8[sizeof(__SVMfloat8_t) == 0 ? 1 : -1];        // expected-error {{invalid application of 'sizeof' to sizeless type '__SVMfloat8_t'}}
+ int align_mf8[__alignof__(__SVMfloat8_t) == 16 ? 1 : -1]; // expected-error {{invalid application of '__alignof' to sizeless type '__SVMfloat8_t'}}
+
   int size_b8[sizeof(__SVBool_t) == 0 ? 1 : -1];       // expected-error {{invalid application of 'sizeof' to sizeless type '__SVBool_t'}}
   int align_b8[__alignof__(__SVBool_t) == 2 ? 1 : -1]; // expected-error {{invalid application of '__alignof' to sizeless type '__SVBool_t'}}
 }
diff --git a/clang/test/Sema/arm-mfp8.cpp b/clang/test/Sema/arm-mfp8.cpp
index 7b70b75728d248..b1509c542473a5 100644
--- a/clang/test/Sema/arm-mfp8.cpp
+++ b/clang/test/Sema/arm-mfp8.cpp
@@ -5,9 +5,9 @@
 
 #include <arm_sve.h>
 void test_vector_sve(svmfloat8_t a, svuint8_t c) {
-  a + c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
-  a - c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
-  a * c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
-  a / c;  // sve-error {{cannot convert between vector and non-scalar values ('svmfloat8_t' (aka '__SVMfloat8_t') and 'svuint8_t' (aka '__SVUint8_t'))}}
+  a + c;  // sve-error {{cannot convert between vector type 'svuint8_t' (aka '__SVUint8_t') and vector type 'svmfloat8_t' (aka '__SVMfloat8_t') as implicit conversion would cause truncation}}
+  a - c;  // sve-error {{cannot convert between vector type 'svuint8_t' (aka '__SVUint8_t') and vector type 'svmfloat8_t' (aka '__SVMfloat8_t') as implicit conversion would cause truncation}}
+  a * c;  // sve-error {{cannot convert between vector type 'svuint8_t' (aka '__SVUint8_t') and vector type 'svmfloat8_t' (aka '__SVMfloat8_t') as implicit conversion would cause truncation}}
+  a / c;  // sve-error {{cannot convert between vector type 'svuint8_t' (aka '__SVUint8_t') and vector type 'svmfloat8_t' (aka '__SVMfloat8_t') as implicit conversion would cause truncation}}
 }
 
diff --git a/clang/test/SemaObjC/aarch64-sve-types.m b/clang/test/SemaObjC/aarch64-sve-types.m
index b50f43cee76f6c..a45e02217667fc 100644
--- a/clang/test/SemaObjC/aarch64-sve-types.m
+++ b/clang/test/SemaObjC/aarch64-sve-types.m
@@ -20,5 +20,7 @@ @interface foo
 
 @property(nullable) __SVBfloat16_t bf16; // expected-error {{cannot be applied to non-pointer type}}
 
+ at property(nullable) __SVMfloat8_t mf8; // expected-error {{cannot be applied to non-pointer type}}
+
 @property(nullable) __SVBool_t b8; // expected-error {{cannot be applied to non-pointer type}}
 @end
diff --git a/clang/utils/TableGen/SveEmitter.cpp b/clang/utils/TableGen/SveEmitter.cpp
index 6f8ce676b62f0c..1d79cc71dd977b 100644
--- a/clang/utils/TableGen/SveEmitter.cpp
+++ b/clang/utils/TableGen/SveEmitter.cpp
@@ -82,14 +82,13 @@ class SVEType {
   bool isVector() const { return NumVectors > 0; }
   bool isScalableVector() const { return isVector() && IsScalable; }
   bool isFixedLengthVector() const { return isVector() && !IsScalable; }
-  bool isChar() const { return ElementBitwidth == 8; }
+  bool isChar() const { return ElementBitwidth == 8 && !MFloat; }
   bool isVoid() const { return Void && !Pointer; }
   bool isDefault() const { return DefaultType; }
-  bool isFloat() const { return Float && !BFloat; }
-  bool isBFloat() const { return BFloat && !Float; }
+  bool isFloat() const { return Float && !BFloat && !MFloat; }
+  bool isBFloat() const { return BFloat && !Float && !MFloat; }
   bool isMFloat() const {
     return MFloat && !BFloat && !Float;
-    ;
   }
   bool isFloatingPoint() const { return Float || BFloat; }
   bool isInteger() const {
@@ -459,6 +458,7 @@ std::string SVEType::builtin_str() const {
     assert(ElementBitwidth == 16 && "Not a valid BFloat.");
     S += "y";
   } else if (isMFloat()) {
+    assert(ElementBitwidth == 8 && "Not a valid MFloat.");
     S += "m";
   }
 
@@ -580,9 +580,11 @@ void SVEType::applyTypespec(StringRef TS) {
     case 'b':
       BFloat = true;
       Float = false;
+      MFloat = false;
       ElementBitwidth = 16;
       break;
     case 'm':
+      Signed = false;
       MFloat = true;
       Float = false;
       BFloat = false;

>From 0178e8dae0c509794e4e5a2e0499b7cf14132ba7 Mon Sep 17 00:00:00 2001
From: Caroline Concatto <caroline.concatto at arm.com>
Date: Mon, 14 Oct 2024 16:31:09 +0000
Subject: [PATCH 3/3] Address review comments

---
 clang/include/clang/Basic/AArch64SVEACLETypes.def | 2 +-
 clang/lib/AST/ASTContext.cpp                      | 7 -------
 2 files changed, 1 insertion(+), 8 deletions(-)

diff --git a/clang/include/clang/Basic/AArch64SVEACLETypes.def b/clang/include/clang/Basic/AArch64SVEACLETypes.def
index a84f404153f956..72df1e35aaec20 100644
--- a/clang/include/clang/Basic/AArch64SVEACLETypes.def
+++ b/clang/include/clang/Basic/AArch64SVEACLETypes.def
@@ -69,7 +69,7 @@
 
 #ifndef SVE_VECTOR_TYPE_BFLOAT
 #define SVE_VECTOR_TYPE_BFLOAT(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF) \
-  SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, true, false, true)
+  SVE_VECTOR_TYPE_DETAILS(Name, MangledName, Id, SingletonId, NumEls, ElBits, NF, false, false, true)
 #endif
 
 #ifndef SVE_VECTOR_TYPE_FLOAT
diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index 2aa7cfeb0fd32b..034fbbe0bc7829 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -4419,13 +4419,6 @@ QualType ASTContext::getScalableVectorType(QualType EltTy, unsigned NumElts,
       EltTySize == ElBits && NumElts == (NumEls * NF) && NumFields == 1) {     \
     return SingletonId;                                                        \
   }
-#define SVE_VECTOR_TYPE_MFLOAT(Name, MangledName, Id, SingletonId, NumEls,     \
-                               ElBits, NF)                                     \
-  if (EltTy->hasIntegerRepresentation() && !EltTy->isBooleanType() &&          \
-      !EltTy->hasSignedIntegerRepresentation() && EltTySize == ElBits &&       \
-      NumElts == (NumEls * NF) && NumFields == 1) {                            \
-    return SingletonId;                                                        \
-  }
 #define SVE_PREDICATE_TYPE_ALL(Name, MangledName, Id, SingletonId, NumEls, NF) \
   if (EltTy->isBooleanType() && NumElts == (NumEls * NF) && NumFields == 1)    \
     return SingletonId;



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