[clang] 1ba19d6 - [clang][x86] Update SSE4A intrinsic tests for both C/C++

Simon Pilgrim via cfe-commits cfe-commits at lists.llvm.org
Thu Oct 3 03:32:09 PDT 2024


Author: Simon Pilgrim
Date: 2024-10-03T11:31:39+01:00
New Revision: 1ba19d6c49663a35baf5d6cdc4a149e2aca9ae6c

URL: https://github.com/llvm/llvm-project/commit/1ba19d6c49663a35baf5d6cdc4a149e2aca9ae6c
DIFF: https://github.com/llvm/llvm-project/commit/1ba19d6c49663a35baf5d6cdc4a149e2aca9ae6c.diff

LOG: [clang][x86] Update SSE4A intrinsic tests for both C/C++

Requires some better checking of labels and some call instructions to handle additional markers

Added: 
    

Modified: 
    clang/test/CodeGen/X86/sse4a-builtins.c

Removed: 
    


################################################################################
diff  --git a/clang/test/CodeGen/X86/sse4a-builtins.c b/clang/test/CodeGen/X86/sse4a-builtins.c
index 5d38a9cde329db..68fd03eb06140f 100644
--- a/clang/test/CodeGen/X86/sse4a-builtins.c
+++ b/clang/test/CodeGen/X86/sse4a-builtins.c
@@ -1,5 +1,7 @@
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4a -emit-llvm -o - -Wall -Werror | FileCheck %s
-// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +sse4a -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4a -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +sse4a -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +sse4a -emit-llvm -o - -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +sse4a -emit-llvm -o - -Wall -Werror | FileCheck %s
 
 
 #include <x86intrin.h>
@@ -8,25 +10,25 @@
 
 __m128i test_mm_extracti_si64(__m128i x) {
   // CHECK-LABEL: test_mm_extracti_si64
-  // CHECK: call <2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %{{[^,]+}}, i8 3, i8 2)
+  // CHECK: call {{.*}}<2 x i64> @llvm.x86.sse4a.extrqi(<2 x i64> %{{[^,]+}}, i8 3, i8 2)
   return _mm_extracti_si64(x, 3, 2);
 }
 
 __m128i test_mm_extract_si64(__m128i x, __m128i y) {
   // CHECK-LABEL: test_mm_extract_si64
-  // CHECK: call <2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %{{[^,]+}}, <16 x i8> %{{[^,]+}})
+  // CHECK: call {{.*}}<2 x i64> @llvm.x86.sse4a.extrq(<2 x i64> %{{[^,]+}}, <16 x i8> %{{[^,]+}})
   return _mm_extract_si64(x, y);
 }
 
 __m128i test_mm_inserti_si64(__m128i x, __m128i y) {
   // CHECK-LABEL: test_mm_inserti_si64
-  // CHECK: call <2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}}, i8 5, i8 6)
+  // CHECK: call {{.*}}<2 x i64> @llvm.x86.sse4a.insertqi(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}}, i8 5, i8 6)
   return _mm_inserti_si64(x, y, 5, 6);
 }
 
 __m128i test_mm_insert_si64(__m128i x, __m128i y) {
   // CHECK-LABEL: test_mm_insert_si64
-  // CHECK: call <2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}})
+  // CHECK: call {{.*}}<2 x i64> @llvm.x86.sse4a.insertq(<2 x i64> %{{[^,]+}}, <2 x i64> %{{[^,]+}})
   return _mm_insert_si64(x, y);
 }
 


        


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