[clang] [llvm] [llvm][opt][Transforms][SPIR-V] Enable `InferAddressSpaces` for SPIR-V (PR #110897)

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git-clang-format --diff 09ba83be0ac178851e3c9c9c8fefddbdd4d8353f fcab1ddf1e7f53276c071b479f1b5b7749d33ba5 --extensions cpp,h -- llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp llvm/lib/Target/SPIRV/SPIRVTargetMachine.h llvm/lib/Target/SPIRV/SPIRVTargetTransformInfo.h
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View the diff from clang-format here.
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diff --git a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
index 91bcd68813..ed0def104f 100644
--- a/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
@@ -25,9 +25,9 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
-#include "llvm/InitializePasses.h"
 #include "llvm/IR/IntrinsicsAMDGPU.h"
 #include "llvm/IR/PatternMatch.h"
+#include "llvm/InitializePasses.h"
 #include "llvm/MC/TargetRegistry.h"
 #include "llvm/Pass.h"
 #include "llvm/Passes/OptimizationLevel.h"
@@ -98,15 +98,15 @@ SPIRVTargetMachine::SPIRVTargetMachine(const Target &T, const Triple &TT,
 }
 
 namespace {
-  enum AddressSpace {
-    Function = storageClassToAddressSpace(SPIRV::StorageClass::Function),
-    CrossWorkgroup =
-        storageClassToAddressSpace(SPIRV::StorageClass::CrossWorkgroup),
-    UniformConstant =
-        storageClassToAddressSpace(SPIRV::StorageClass::UniformConstant),
-    Workgroup = storageClassToAddressSpace(SPIRV::StorageClass::Workgroup),
-    Generic = storageClassToAddressSpace(SPIRV::StorageClass::Generic)
-  };
+enum AddressSpace {
+  Function = storageClassToAddressSpace(SPIRV::StorageClass::Function),
+  CrossWorkgroup =
+      storageClassToAddressSpace(SPIRV::StorageClass::CrossWorkgroup),
+  UniformConstant =
+      storageClassToAddressSpace(SPIRV::StorageClass::UniformConstant),
+  Workgroup = storageClassToAddressSpace(SPIRV::StorageClass::Workgroup),
+  Generic = storageClassToAddressSpace(SPIRV::StorageClass::Generic)
+};
 }
 
 unsigned SPIRVTargetMachine::getAssumedAddrSpace(const Value *V) const {
@@ -148,9 +148,10 @@ SPIRVTargetMachine::getPredicatedAddrSpace(const Value *V) const {
   Value *Ptr;
   if (getTargetTriple().getVendor() == Triple::VendorType::AMD &&
       match(
-        const_cast<Value *>(V),
-        m_c_And(m_Not(m_Intrinsic<Intrinsic::amdgcn_is_shared>(m_Value(Ptr))),
-                m_Not(m_Intrinsic<Intrinsic::amdgcn_is_private>(m_Deferred(Ptr))))))
+          const_cast<Value *>(V),
+          m_c_And(m_Not(m_Intrinsic<Intrinsic::amdgcn_is_shared>(m_Value(Ptr))),
+                  m_Not(m_Intrinsic<Intrinsic::amdgcn_is_private>(
+                      m_Deferred(Ptr))))))
     return std::pair(Ptr, AddressSpace::CrossWorkgroup);
 
   return std::pair(nullptr, UINT32_MAX);
@@ -165,19 +166,19 @@ bool SPIRVTargetMachine::isNoopAddrSpaceCast(unsigned SrcAS,
 }
 
 void SPIRVTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB) {
-  PB.registerCGSCCOptimizerLateEPCallback([](CGSCCPassManager &PM,
-                                             OptimizationLevel Level) {
-    if (Level == OptimizationLevel::O0)
-      return;
+  PB.registerCGSCCOptimizerLateEPCallback(
+      [](CGSCCPassManager &PM, OptimizationLevel Level) {
+        if (Level == OptimizationLevel::O0)
+          return;
 
-    FunctionPassManager FPM;
+        FunctionPassManager FPM;
 
-    // Add infer address spaces pass to the opt pipeline after inlining
-    // but before SROA to increase SROA opportunities.
-    FPM.addPass(InferAddressSpacesPass(AddressSpace::Generic));
+        // Add infer address spaces pass to the opt pipeline after inlining
+        // but before SROA to increase SROA opportunities.
+        FPM.addPass(InferAddressSpacesPass(AddressSpace::Generic));
 
-    PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM)));
-  });
+        PM.addPass(createCGSCCToFunctionPassAdaptor(std::move(FPM)));
+      });
 }
 
 namespace {

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https://github.com/llvm/llvm-project/pull/110897