[clang] [clang][x86] Add constexpr support for ADC/SBB + ADX intrinsics (PR #110668)
via cfe-commits
cfe-commits at lists.llvm.org
Tue Oct 1 13:05:52 PDT 2024
================
@@ -13464,6 +13464,38 @@ bool IntExprEvaluator::VisitBuiltinCallExpr(const CallExpr *E,
return Success(DidOverflow, E);
}
+ case clang::X86::BI__builtin_ia32_addcarryx_u32:
+ case clang::X86::BI__builtin_ia32_addcarryx_u64:
+ case clang::X86::BI__builtin_ia32_subborrow_u32:
+ case clang::X86::BI__builtin_ia32_subborrow_u64: {
+ LValue ResultLValue;
+ APSInt CarryIn, LHS, RHS;
+ QualType ResultType = E->getArg(3)->getType()->getPointeeType();
+ if (!EvaluateInteger(E->getArg(0), CarryIn, Info) ||
+ !EvaluateInteger(E->getArg(1), LHS, Info) ||
+ !EvaluateInteger(E->getArg(2), RHS, Info) ||
+ !EvaluatePointer(E->getArg(3), ResultLValue, Info))
+ return false;
+
+ bool IsAdd = BuiltinOp == clang::X86::BI__builtin_ia32_addcarryx_u32 ||
+ BuiltinOp == clang::X86::BI__builtin_ia32_addcarryx_u64;
+
+ unsigned BitWidth = LHS.getBitWidth();
+ unsigned CarryInBit = CarryIn.ugt(0) ? 1 : 0;
+ APInt ExResult =
+ IsAdd
+ ? (LHS.zext(BitWidth + 1) + (RHS.zext(BitWidth + 1) + CarryInBit))
+ : (LHS.zext(BitWidth + 1) - (RHS.zext(BitWidth + 1) + CarryInBit));
+
+ APInt Result = ExResult.extractBits(BitWidth, 0);
+ uint64_t CarryOut = ExResult.extractBitsAsZExtValue(1, BitWidth);
+
+ APValue APV{APSInt(Result, /*isUnsigned=*/true)};
+ if (!handleAssignment(Info, E, ResultLValue, ResultType, APV))
+ return false;
+ return Success(CarryOut, E);
+ }
----------------
goldsteinn wrote:
LG although this isn't really a part of the code base I'm qualified to sign off on
https://github.com/llvm/llvm-project/pull/110668
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