[clang] [llvm] [AArch64][SVE] Fix definition of bfloat fcvt intrinsics. (PR #110281)

[Paul Walker via cfe-commits]

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@@ -5553,6 +5553,14 @@ static SDValue getSVEPredicateBitCast(EVT VT, SDValue Op, SelectionDAG &DAG) {
   if (InVT == VT)
     return Op;
 
+  // Look through casts to <n x 16 x i1> when their input has more lanes than
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paulwalker-arm wrote:

I knew something was odd when I was writing it but couldn't figure it out :) I'll change it to `MVT::nxv16i1` if that's ok?

https://github.com/llvm/llvm-project/pull/110281