[clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v5 (PR #108636)

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4ast wrote:

> Also, just a heads-up: I think this PR is blocked by [an issue that I mentioned earlier on LKML](https://lore.kernel.org/all/ZujIlLqBEGOsxYRa@google.com/) (Cc: @4ast). After that is resolved, I think we should change this PR to use `0x5` for the new mode modifiers (`BPF_MEMACQ`, `BPF_MEMREL`).

this PR needs to land together with kernel/verifier changes. It's necessary to get llvm bits in landable shape first and
it sounds that it will be there once CI crash is resolved.

https://github.com/llvm/llvm-project/pull/108636