[clang] [lldb] [llvm] [mlir] [APInt] Fix APInt constructions where value does not fit bitwidth (NFCI) (PR #80309)

[Nikita Popov via cfe-commits]

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@@ -1806,7 +1806,7 @@ bool AMDGPUDAGToDAGISel::SelectGlobalSAddr(SDNode *N,
       // instructions to perform VALU adds with immediates or inline literals.
       unsigned NumLiterals =
           !TII->isInlineConstant(APInt(32, COffsetVal & 0xffffffff)) +
-          !TII->isInlineConstant(APInt(32, COffsetVal >> 32));
+          !TII->isInlineConstant(APInt(32, uint64_t(COffsetVal) >> 32));
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nikic wrote:

Good point. I created https://github.com/llvm/llvm-project/pull/109413 to adjust various places in the AMDGPU backend to use these helper. (A lot more places outside AMDGPU, but not going to do these right now...)

https://github.com/llvm/llvm-project/pull/80309