[clang] [llvm] [BPF] Add load-acquire and store-release instructions under -mcpu=v5 (PR #108636)

via cfe-commits cfe-commits at lists.llvm.org
Fri Sep 20 02:32:14 PDT 2024


eddyz87 wrote:

@peilin-ye,

> I couldn't find a way to generate a better error message for `__ATOMIC_SEQ_CST`, however; it seems that CodeGen simply calls `CannotYetSelect()` if nothing in `MatcherTable` matches. Any suggestions?

There is probably some tablegen incantation to invoke custom cpp for some matched pattern but I haven't found it. Also I have not found any target info hooks for clang to report unsupported orderings.

One option is to extend existing mechanics:

```diff
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp b/llvm/lib/Target/BPF/BPFISelLowering.cpp
index ff23d3b055d0..9e54c7f3de65 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -91,6 +91,7 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine &TM,
     setOperationAction(ISD::ATOMIC_LOAD_XOR, VT, Custom);
     setOperationAction(ISD::ATOMIC_SWAP, VT, Custom);
     setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD, VT, Custom);
   }
 
   for (auto VT : { MVT::i32, MVT::i64 }) {
@@ -291,6 +292,14 @@ void BPFTargetLowering::ReplaceNodeResults(
     else
       Msg = "unsupported atomic operation, please use 64 bit version";
     break;
+  case ISD::ATOMIC_LOAD: {
+    auto *AtomicLoad = cast<AtomicSDNode>(N);
+    if (AtomicLoad->getMergedOrdering() != AtomicOrdering::AcquireRelease &&
+        AtomicLoad->getMergedOrdering() != AtomicOrdering::SequentiallyConsistent)
+      return;
+    Msg = "a useful message about unsupported ordering here";
+    break;
+    }
   }
 
   SDLoc DL(N);
{llvm} 02:29:45 llvm-project$ git diff
diff --git a/llvm/lib/Target/BPF/BPFISelLowering.cpp b/llvm/lib/Target/BPF/BPFISelLowering.cpp
index ff23d3b055d0..9e54c7f3de65 100644
--- a/llvm/lib/Target/BPF/BPFISelLowering.cpp
+++ b/llvm/lib/Target/BPF/BPFISelLowering.cpp
@@ -91,6 +91,7 @@ BPFTargetLowering::BPFTargetLowering(const TargetMachine &TM,
     setOperationAction(ISD::ATOMIC_LOAD_XOR, VT, Custom);
     setOperationAction(ISD::ATOMIC_SWAP, VT, Custom);
     setOperationAction(ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS, VT, Custom);
+    setOperationAction(ISD::ATOMIC_LOAD, VT, Custom);
   }
 
   for (auto VT : { MVT::i32, MVT::i64 }) {
@@ -291,6 +292,14 @@ void BPFTargetLowering::ReplaceNodeResults(
     else
       Msg = "unsupported atomic operation, please use 64 bit version";
     break;
+  case ISD::ATOMIC_LOAD: {
+    auto *AtomicLoad = cast<AtomicSDNode>(N);
+    if (AtomicLoad->getMergedOrdering() != AtomicOrdering::AcquireRelease &&
+        AtomicLoad->getMergedOrdering() != AtomicOrdering::SequentiallyConsistent)
+      return;
+    Msg = "a useful message about unsupported ordering here";
+    break;
+    }
   }
 
   SDLoc DL(N);
```

When compiled with `-g` this would report location and a message before complaining about selection error. But there should be a way to tweak existing `fail` function to stop after errors are reported.

https://github.com/llvm/llvm-project/pull/108636


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