[clang] [RISCV][FMV] Support target_version (PR #99040)

[Piyou Chen via cfe-commits]

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@@ -11027,13 +11029,27 @@ static bool CheckMultiVersionValue(Sema &S, const FunctionDecl *FD) {
   }
 
   if (TVA) {
-    llvm::SmallVector<StringRef, 8> Feats;
-    TVA->getFeatures(Feats);
-    for (const auto &Feat : Feats) {
-      if (!TargetInfo.validateCpuSupports(Feat)) {
-        S.Diag(FD->getLocation(), diag::err_bad_multiversion_option)
-            << Feature << Feat;
-        return true;
+    if (S.getASTContext().getTargetInfo().getTriple().isRISCV()) {
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BeMg wrote:

I reduce the part of duplication, and the remain part is causing by different syntax between aarch64 and RISC-V.

To reducing the remain part of duplication, we could implement the RISC-V syntax inside `clang/include/clang/Basic/Attr.td getFeatures` or make Aarch64 using the `AArch64TargetInfo::parseTargetAttr` for target_version, or make something like `parseTargetVersionAttr` hook here. 

By the way, the parsing of target_clones syntax is controlled by the target. (Reference: https://github.com/llvm/llvm-project/blob/9cd93774098c861c260090a690f428b7ae031c65/clang/lib/Sema/SemaDeclAttr.cpp#L3121)


https://github.com/llvm/llvm-project/pull/99040