[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Thu Sep 12 18:49:06 PDT 2024
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@@ -22150,18 +22150,13 @@ Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
case RISCV::BI__builtin_riscv_cv_alu_extbz:
ID = Intrinsic::riscv_cv_alu_extbz;
break;
- case RISCV::BI__builtin_riscv_cv_alu_exths:
- ID = Intrinsic::riscv_cv_alu_exths;
- break;
+ case RISCV::BI__builtin_riscv_cv_alu_exths: {
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topperc wrote:
Why not do this for extbz and extbs too?
https://github.com/llvm/llvm-project/pull/100684
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