[clang] [clang-tools-extra] [libcxx] [C++17] Support __GCC_[CON|DE]STRUCTIVE_SIZE (PR #89446)

[Levi Zim via cfe-commits]

kxxt wrote:

> Here are the values that I found for GCC that don't match the defaults.
> Platform 	Constructive 	Destructive 	Link
> ARM64 	64 	256 	https://godbolt.org/z/G7arf9nPP
> AVR 	32 	32 	https://godbolt.org/z/Yq64f9Koj
> BPF 	32 	32 	https://godbolt.org/z/zezK71zoe
> M68K 	32 	32 	https://godbolt.org/z/h9f4vaYcs
> mips 	32 	32 	https://godbolt.org/z/v3nfPMx9b
> mips64 	32 	32 	https://godbolt.org/z/7G66rc4nY
> power 	32 	32 	https://godbolt.org/z/bWjdosE3f
> power64 	128 	128 	https://godbolt.org/z/jT86TMYTK
> RISC-V 32-bit 	32 	32 	https://godbolt.org/z/neErxEbWP
> RISV-V 64-bit 	32 	32 	https://godbolt.org/z/nG5zjjxdo
> s390x 	256 	256 	https://godbolt.org/z/j34f3eEMz
> sparc 	32 	32 	https://godbolt.org/z/96hscbesM
> 
> Note, this is testing default configuration with no CPU tuning. I'll nab the values from here that I can map to our targets but target owners should validate these values and let me know if anything looks amiss.

FYI [the value 32 is the default value set by GCC and might be wrong](https://gcc.gnu.org/pipermail/libstdc++/2024-September/059490.html). I have submitted [a bug to gcc about the wrong cacheline size 32 for riscv64 target](https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116662).

https://github.com/llvm/llvm-project/pull/89446