[clang] [llvm] [SPIRV][RFC] Rework / extend support for memory scopes (PR #106429)

Alex Voicu via cfe-commits cfe-commits at lists.llvm.org
Wed Sep 4 04:23:38 PDT 2024


================
@@ -335,6 +335,9 @@ class LLVM_LIBRARY_VISIBILITY SPIRV32TargetInfo : public BaseSPIRVTargetInfo {
     PointerWidth = PointerAlign = 32;
     SizeType = TargetInfo::UnsignedInt;
     PtrDiffType = IntPtrType = TargetInfo::SignedInt;
+    // SPIR-V has core support for atomic ops, and Int32 is always available;
+    // we take the maximum because it's possible the Host supports wider types.
+    MaxAtomicInlineWidth = std::max<unsigned char>(MaxAtomicInlineWidth, 32);
----------------
AlexVlx wrote:

I'm assuming that the SPIRV32 target exists for cases where the `Int64` capability is never enabled, but it would probably be useful to have that assumption checked. For SPIR-V the model for extensions / capabilities in LLVM seems to be push i.e. extensions get enabled / checked iff a feature requiring the extension / capability is encountered when translating (legacy) / lowering (the experimental BE). FWIW, my reading of the SPIR-V spec is that the `Int64` capability is core.

https://github.com/llvm/llvm-project/pull/106429


More information about the cfe-commits mailing list