[clang] [llvm] [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (PR #102592)

[Malay Sanghi via cfe-commits]

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@@ -0,0 +1,115 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-linux -mattr=+avx10.2-256 | FileCheck %s --check-prefix=X86
+; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx10.2-256 | FileCheck %s --check-prefix=X64
+
+;
+; 32-bit float to signed integer
+;
+
+declare  i32 @llvm.fptosi.sat.i32.f32 (float)
+declare  i64 @llvm.fptosi.sat.i64.f32 (float)
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MalaySanghi wrote:

This will be a follow-up change. Mappings from public intrinsic to new ISA for vector types are not a part of this PR.

https://github.com/llvm/llvm-project/pull/102592