[clang] [llvm] [RISCV] Implement Clang Builtins for XCValu Extension in CV32E40P (PR #100684)

via cfe-commits cfe-commits at lists.llvm.org
Thu Aug 29 20:34:08 PDT 2024


================
@@ -152,12 +152,22 @@ namespace clang {
   };
   }
 
+  namespace RISCVXCV {
+  enum {
+    LastRVVBuiltin = RISCVVector::FirstTSBuiltin - 1,
+#define BUILTIN(ID, TYPE, ATTRS) BI__builtin_riscv_cv_##ID,
+#include "clang/Basic/BuiltinsRISCVXCV.def"
----------------
realqhc wrote:

There is no BuiltinsRISCV.def and I can't find a way to make it work like BuiltinRISCVVector.def where rvv and sifive builtins can be in separate files (without modifying BuiltinsRISCV.td).  
I have rewrite BuiltinsRISCVXCV.def in the same format as BuiltinsRISCV.td and included it in BuiltinsRISCV.td for now, I'm willing to explore further if there is better solution. 

https://github.com/llvm/llvm-project/pull/100684


More information about the cfe-commits mailing list