[clang] [clang][HLSL] Update DXIL/SPIRV hybird CodeGen tests to use temp var (PR #105930)

[Amr Hesham via cfe-commits]

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@@ -15,49 +15,49 @@
 // RUN:   -o - | FileCheck %s --check-prefixes=CHECK,NO_HALF,SPIR_CHECK
 
 #ifdef __HLSL_ENABLE_16_BIT
-// DXIL_NATIVE_HALF: %dx.umad = call i16 @llvm.dx.umad.i16(i16 %0, i16 %1, i16 %2)
+// DXIL_NATIVE_HALF: %dx.umad = call i16 @llvm.[[ICF:dx]].umad.i16(i16 %0, i16 %1, i16 %2)
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AmrDeveloper wrote:

Done

https://github.com/llvm/llvm-project/pull/105930