[clang] 1a908c6 - Seperate frontend changes, add debug directives, remove redundant stuff from tests

via cfe-commits cfe-commits at lists.llvm.org
Tue Aug 27 02:44:17 PDT 2024


Author: Kiran
Date: 2024-08-27T10:44:06+01:00
New Revision: 1a908c6be3317bbbac73e6a6fc52cabefbdebf7d

URL: https://github.com/llvm/llvm-project/commit/1a908c6be3317bbbac73e6a6fc52cabefbdebf7d
DIFF: https://github.com/llvm/llvm-project/commit/1a908c6be3317bbbac73e6a6fc52cabefbdebf7d.diff

LOG: Seperate frontend changes, add debug directives, remove redundant stuff from tests

Added: 
    

Modified: 
    clang/lib/CodeGen/CGCall.cpp
    llvm/include/llvm/CodeGen/CallingConvLower.h
    llvm/lib/CodeGen/CallingConvLower.cpp
    llvm/test/CodeGen/ARM/tail-call-float.ll

Removed: 
    


################################################################################
diff  --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp
index 05773f91f986ba..ca2c79b51ac96b 100644
--- a/clang/lib/CodeGen/CGCall.cpp
+++ b/clang/lib/CodeGen/CGCall.cpp
@@ -5086,7 +5086,7 @@ RValue CodeGenFunction::EmitCall(const CGFunctionInfo &CallInfo,
   RawAddress SRetAlloca = RawAddress::invalid();
   llvm::Value *UnusedReturnSizePtr = nullptr;
   if (RetAI.isIndirect() || RetAI.isInAlloca() || RetAI.isCoerceAndExpand()) {
-    if ((IsVirtualFunctionPointerThunk || IsMustTail) && RetAI.isIndirect()) {
+    if (IsVirtualFunctionPointerThunk && RetAI.isIndirect()) {
       SRetPtr = makeNaturalAddressForPointer(CurFn->arg_begin() +
                                                  IRFunctionArgs.getSRetArgNo(),
                                              RetTy, CharUnits::fromQuantity(1));

diff  --git a/llvm/include/llvm/CodeGen/CallingConvLower.h b/llvm/include/llvm/CodeGen/CallingConvLower.h
index 12a6df16e279b4..f94cb628965faa 100644
--- a/llvm/include/llvm/CodeGen/CallingConvLower.h
+++ b/llvm/include/llvm/CodeGen/CallingConvLower.h
@@ -540,7 +540,9 @@ class CCState {
                });
   }
 
+#ifndef NDEBUG
   void dump() const;
+#endif
 
 private:
   /// MarkAllocated - Mark a register and all of its aliases as allocated.

diff  --git a/llvm/lib/CodeGen/CallingConvLower.cpp b/llvm/lib/CodeGen/CallingConvLower.cpp
index 7ba3ea83115db2..38884762944319 100644
--- a/llvm/lib/CodeGen/CallingConvLower.cpp
+++ b/llvm/lib/CodeGen/CallingConvLower.cpp
@@ -291,6 +291,7 @@ bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
                     RVLocs2.end(), AreCompatible);
 }
 
+#ifndef NDEBUG
 void CCState::dump() const {
   dbgs() << "CCState:\n";
   for (const CCValAssign &Loc : Locs) {
@@ -351,3 +352,4 @@ void CCState::dump() const {
     dbgs() << "\n";
   }
 }
+#endif
\ No newline at end of file

diff  --git a/llvm/test/CodeGen/ARM/tail-call-float.ll b/llvm/test/CodeGen/ARM/tail-call-float.ll
index 6fa4b9229f64c8..2f834976dd403c 100644
--- a/llvm/test/CodeGen/ARM/tail-call-float.ll
+++ b/llvm/test/CodeGen/ARM/tail-call-float.ll
@@ -1,8 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
 ; RUN: llc -mtriple armv7 -target-abi aapcs -float-abi soft -O0 -o - < %s \
-; RUN:   | FileCheck %s -check-prefix CHECK-SOFT -check-prefix CHECK
+; RUN:   | FileCheck %s -check-prefix CHECK-SOFT
 ; RUN: llc -mtriple armv7 -target-abi aapcs -float-abi hard -O0 -o - < %s \
-; RUN:   | FileCheck %s -check-prefix CHECK-HARD -check-prefix CHECK
+; RUN:   | FileCheck %s -check-prefix CHECK-HARD
 
 ; Tests for passing floating-point regs. Variadic functions will always use
 ; general-purpose registers. Standard functions will use the floating-point


        


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