[clang] Honor pragmas with -ffp-contract=fast, depecate fast-honor-pragmas (PR #105746)

[John McCall via cfe-commits]

================
@@ -68,35 +68,12 @@
 // RUN:   -O3 -target-cpu gfx906 -o - -x ir %t.ll \
 // RUN:   | FileCheck -check-prefixes=COMMON,AMD-OPT-FASTSTD %s
 
-// Explicit -ffp-contract=fast-honor-pragmas
-// In IR, fmul/fadd instructions with contract flag are emitted.
-// In backend
-//    nvptx/amdgcn - assumes standard fp fuse option, which only
-//                   fuses mult/add insts with contract flag or
-//                   llvm.fmuladd intrinsics.
-
-// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN:   -ffp-contract=fast-honor-pragmas -disable-llvm-passes -o - %s \
-// RUN:   | FileCheck -check-prefixes=COMMON,NV-ON %s
-// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -S \
-// RUN:   -target-cpu gfx906 -disable-llvm-passes -o - -x hip %s \
-// RUN:   -ffp-contract=fast-honor-pragmas \
-// RUN:   | FileCheck -check-prefixes=COMMON,AMD-ON %s
-// RUN: %clang_cc1 -fcuda-is-device -triple nvptx-nvidia-cuda -S \
-// RUN:   -O3 -o - %s \
-// RUN:   -ffp-contract=fast-honor-pragmas \
-// RUN:   | FileCheck -check-prefixes=COMMON,NV-OPT-FASTSTD %s
-// RUN: %clang_cc1 -fcuda-is-device -triple amdgcn-amd-amdhsa -S \
-// RUN:   -O3 -target-cpu gfx906 -o - -x hip %s \
-// RUN:   -ffp-contract=fast-honor-pragmas \
-// RUN:   | FileCheck -check-prefixes=COMMON,AMD-OPT-FASTSTD %s
-
----------------
rjmccall wrote:

You've verified that we aren't testing for any actual IR-gen differences in this mode?

https://github.com/llvm/llvm-project/pull/105746