[clang] [RISCV][FMV] Support target_clones (PR #85786)

Piyou Chen via cfe-commits cfe-commits at lists.llvm.org
Wed Aug 21 21:34:53 PDT 2024


================
@@ -2854,10 +2854,121 @@ void CodeGenFunction::EmitMultiVersionResolver(
   case llvm::Triple::aarch64:
     EmitAArch64MultiVersionResolver(Resolver, Options);
     return;
+  case llvm::Triple::riscv32:
+  case llvm::Triple::riscv64:
+    EmitRISCVMultiVersionResolver(Resolver, Options);
+    return;
 
   default:
-    assert(false && "Only implemented for x86 and AArch64 targets");
+    assert(false && "Only implemented for x86, AArch64 and RISC-V targets");
+  }
+}
+
+void CodeGenFunction::EmitRISCVMultiVersionResolver(
+    llvm::Function *Resolver, ArrayRef<MultiVersionResolverOption> Options) {
+
+  if (getContext().getTargetInfo().getTriple().getOS() !=
+      llvm::Triple::OSType::Linux) {
+    CGM.getDiags().Report(diag::err_os_unsupport_riscv_target_clones);
+    return;
+  }
+
+  llvm::BasicBlock *CurBlock = createBasicBlock("resolver_entry", Resolver);
+  Builder.SetInsertPoint(CurBlock);
+  EmitRISCVCpuInit();
+
+  bool SupportsIFunc = getContext().getTargetInfo().supportsIFunc();
+  bool HasDefault = false;
+  unsigned DefaultIndex = 0;
+  // Check the each candidate function.
+  for (unsigned Index = 0; Index < Options.size(); Index++) {
----------------
BeMg wrote:

> I think this question needs some focused discussion.
> 
> My initial stab at this would be something along the following:
> 
> * Reorder any super set of extensions before a subset.
> * Respect user provided order otherwise.
> 
> From the precedent you point to, we can reasonably treat the ordering an implementation defined heuristic. We should document that.

Hi @preames, Here is another [spec update](https://github.com/riscv-non-isa/riscv-c-api-doc/pull/85) to address version ordering issue, and it be implemented inside this patch.

https://github.com/llvm/llvm-project/pull/85786


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