[clang] [llvm] [RISCV] Add CSRs and an instruction for Smctr and Ssctr extensions. (PR #105148)
Yingwei Zheng via cfe-commits
cfe-commits at lists.llvm.org
Tue Aug 20 12:00:35 PDT 2024
================
@@ -1054,6 +1054,19 @@ def FeatureStdExtSupm
: RISCVExperimentalExtension<"supm", 1, 0,
"'Supm' (Indicates User-mode Pointer Masking)">;
+def FeatureStdExtSmctr
+ : RISCVExperimentalExtension<"smctr", 1, 0,
+ "'Smctr' (Control Transfer Records Machine Level)",
+ [FeatureStdExtSmcsrind]>;
----------------
dtcxzyw wrote:
See also https://github.com/riscv/riscv-control-transfer-records/pull/29
https://github.com/llvm/llvm-project/pull/105148
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