[clang] [clang][CodeGen][SPIR-V][AMDGPU] Tweak AMDGCNSPIRV ABI to allow for the correct handling of aggregates passed to kernels / functions. (PR #102776)
Alex Voicu via cfe-commits
cfe-commits at lists.llvm.org
Mon Aug 19 11:11:52 PDT 2024
================
@@ -64,6 +66,27 @@ void CommonSPIRABIInfo::setCCs() {
RuntimeCC = llvm::CallingConv::SPIR_FUNC;
}
+ABIArgInfo SPIRVABIInfo::classifyReturnType(QualType RetTy) const {
+ if (getTarget().getTriple().getVendor() != llvm::Triple::AMD)
+ return DefaultABIInfo::classifyReturnType(RetTy);
+ if (!isAggregateTypeForABI(RetTy) || getRecordArgABI(RetTy, getCXXABI()))
+ return DefaultABIInfo::classifyReturnType(RetTy);
+
+ if (const RecordType *RT = RetTy->getAs<RecordType>()) {
+ const RecordDecl *RD = RT->getDecl();
+ if (RD->hasFlexibleArrayMember())
+ return DefaultABIInfo::classifyReturnType(RetTy);
+ }
+
+ // TODO: The AMDGPU ABI is non-trivial to represent in SPIR-V; in order to
+ // avoid encoding various architecture specific bits here we return everything
+ // as direct to retain type info for things like aggregates, for later perusal
+ // when translating back to LLVM/lowering in the BE. This is also why we
+ // disable flattening as the outcomes can mismatch between SPIR-V and AMDGPU.
+ // This will be revisited / optimised in the future.
----------------
AlexVlx wrote:
> byval doesn't really make sense on a kernel as there is no real caller, but depending on how SPIRV defined its byval attribute, maybe you can codegen LLVM byref into SPIRV byval?
This is a good suggestion, it's one of the things I'm looking at, but it's a bit messy to retain the "this is actually `byref`" (it is doable, but was quite intrusive with tools like the translator), and I admit to not fully debugging / validating it. I just realised that the "add an extension to SPIR-V" bit came off pretty passive-aggressive, I apologise - I think that might just be TheRightWayTM to deal with this, `byref` is common enough to justify it.
https://github.com/llvm/llvm-project/pull/102776
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