[clang] [llvm] [X86][AVX10.2] Support AVX10.2-CONVERT new instructions. (PR #101600)
Freddy Ye via cfe-commits
cfe-commits at lists.llvm.org
Sun Aug 18 19:19:46 PDT 2024
https://github.com/FreddyLeaf updated https://github.com/llvm/llvm-project/pull/101600
>From 1762ab8b4e8417ed6bc3b59b5ab7caa7c3e53070 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Tue, 30 Jul 2024 13:46:40 +0800
Subject: [PATCH 1/7] Support AVX10.2-CONVERT new instructions.
---
clang/include/clang/Basic/BuiltinsX86.def | 44 +
clang/lib/Headers/CMakeLists.txt | 2 +
clang/lib/Headers/avx10_2_512convertintrin.h | 286 ++++
clang/lib/Headers/avx10_2convertintrin.h | 525 ++++++
clang/lib/Headers/immintrin.h | 2 +
clang/lib/Sema/SemaX86.cpp | 2 +
.../CodeGen/X86/avx10_2_512convert-builtins.c | 274 +++
.../CodeGen/X86/avx10_2convert-builtins.c | 530 ++++++
llvm/include/llvm/IR/IntrinsicsX86.td | 130 ++
llvm/lib/Target/X86/X86ISelLowering.cpp | 38 +
llvm/lib/Target/X86/X86ISelLowering.h | 24 +
llvm/lib/Target/X86/X86InstrAVX10.td | 437 +++++
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 85 +
llvm/lib/Target/X86/X86IntrinsicsInfo.h | 85 +
.../X86/avx10_2_512convert-intrinsics.ll | 578 +++++++
.../CodeGen/X86/avx10_2convert-intrinsics.ll | 1147 +++++++++++++
.../MC/Disassembler/X86/avx10.2convert-32.txt | 1491 +++++++++++++++++
.../MC/Disassembler/X86/avx10.2convert-64.txt | 1491 +++++++++++++++++
llvm/test/MC/X86/avx10.2convert-32-att.s | 1490 ++++++++++++++++
llvm/test/MC/X86/avx10.2convert-32-intel.s | 1490 ++++++++++++++++
llvm/test/MC/X86/avx10.2convert-64-att.s | 1490 ++++++++++++++++
llvm/test/MC/X86/avx10.2convert-64-intel.s | 1490 ++++++++++++++++
llvm/test/TableGen/x86-fold-tables.inc | 243 +++
23 files changed, 13374 insertions(+)
create mode 100644 clang/lib/Headers/avx10_2_512convertintrin.h
create mode 100644 clang/lib/Headers/avx10_2convertintrin.h
create mode 100644 clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
create mode 100644 clang/test/CodeGen/X86/avx10_2convert-builtins.c
create mode 100644 llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
create mode 100644 llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
create mode 100644 llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
create mode 100644 llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
create mode 100644 llvm/test/MC/X86/avx10.2convert-32-att.s
create mode 100644 llvm/test/MC/X86/avx10.2convert-32-intel.s
create mode 100644 llvm/test/MC/X86/avx10.2convert-64-att.s
create mode 100644 llvm/test/MC/X86/avx10.2convert-64-intel.s
diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def
index a696cf117908e2..42fe284506111e 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -2217,6 +2217,50 @@ TARGET_BUILTIN(__builtin_ia32_vcvttps2ibs512_mask, "V16UiV16fV16UiUsIi", "nV:512
TARGET_BUILTIN(__builtin_ia32_vcvttps2iubs128_mask, "V4UiV4fV4UiUc", "nV:128:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vcvttps2iubs256_mask, "V8UiV8fV8UiUcIi", "nV:256:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vcvttps2iubs512_mask, "V16UiV16fV16UiUsIi", "nV:512:", "avx10.2-512")
+
+// AVX10.2 CONVERT
+TARGET_BUILTIN(__builtin_ia32_vcvt2ps2phx128_mask, "V8xV4fV4fV8xUc", "ncV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvt2ps2phx256_mask, "V16xV8fV8fV16xUsIi", "ncV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvt2ps2phx512_mask, "V32xV16fV16fV32xUiIi", "ncV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2bf8_128_mask, "V16cV16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2bf8_256_mask, "V16cV32cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2bf8_512_mask, "V32cV64cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2bf8s_128_mask, "V16cV16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2bf8s_256_mask, "V16cV32cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2bf8s_512_mask, "V32cV64cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2hf8_128_mask, "V16cV16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2hf8_256_mask, "V16cV32cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2hf8_512_mask, "V32cV64cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2hf8s_128_mask, "V16cV16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2hf8s_256_mask, "V16cV32cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtbiasph2hf8s_512_mask, "V32cV64cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2bf8_128, "V16cV8xV8x", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2bf8_256, "V32cV16xV16x", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2bf8_512, "V64cV32xV32x", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2bf8s_128, "V16cV8xV8x", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2bf8s_256, "V32cV16xV16x", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2bf8s_512, "V64cV32xV32x", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8_128, "V16cV8xV8x", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8_256, "V32cV16xV16x", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8_512, "V64cV32xV32x", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8s_128, "V16cV8xV8x", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8s_256, "V32cV16xV16x", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8s_512, "V64cV32xV32x", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtnehf8_2ph128_mask, "V8xV16cV8xUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtnehf8_2ph256_mask, "V16xV16cV16xUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtnehf8_2ph512_mask, "V32xV32cV32xUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8_128_mask, "V16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8_256_mask, "V16cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8_512_mask, "V32cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8s_128_mask, "V16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8s_256_mask, "V16cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8s_512_mask, "V32cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2hf8_128_mask, "V16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2hf8_256_mask, "V16cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2hf8_512_mask, "V32cV32xV32cUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2hf8s_128_mask, "V16cV8xV16cUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2hf8s_256_mask, "V16cV16xV16cUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvtneph2hf8s_512_mask, "V32cV32xV32cUi", "nV:512:", "avx10.2-512")
#undef BUILTIN
#undef TARGET_BUILTIN
#undef TARGET_HEADER_BUILTIN
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt
index b61aeca6bbc910..8b6db8ec9f3a28 100644
--- a/clang/lib/Headers/CMakeLists.txt
+++ b/clang/lib/Headers/CMakeLists.txt
@@ -147,9 +147,11 @@ set(x86_files
amxcomplexintrin.h
amxfp16intrin.h
amxintrin.h
+ avx10_2_512convertintrin.h
avx10_2_512minmaxintrin.h
avx10_2_512niintrin.h
avx10_2_512satcvtintrin.h
+ avx10_2convertintrin.h
avx10_2minmaxintrin.h
avx10_2niintrin.h
avx10_2satcvtintrin.h
diff --git a/clang/lib/Headers/avx10_2_512convertintrin.h b/clang/lib/Headers/avx10_2_512convertintrin.h
new file mode 100644
index 00000000000000..f80515630ead55
--- /dev/null
+++ b/clang/lib/Headers/avx10_2_512convertintrin.h
@@ -0,0 +1,286 @@
+/*===--------- avx10_2_512convertintrin.h - AVX10_2_512CONVERT -------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+#ifndef __IMMINTRIN_H
+#error \
+ "Never use <avx10_2_512convertintrin.h> directly; include <immintrin.h> instead."
+#endif // __IMMINTRIN_H
+
+#ifdef __SSE2__
+
+#ifndef __AVX10_2_512CONVERTINTRIN_H
+#define __AVX10_2_512CONVERTINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS512 \
+ __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-512"), \
+ __min_vector_width__(512)))
+
+static __inline__ __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtx2ps_ph(__m512 __A,
+ __m512 __B) {
+ return (__m512h)__builtin_ia32_vcvt2ps2phx512_mask(
+ (__v16sf)__A, (__v16sf)__B, (__v32hf)_mm512_setzero_ph(), (__mmask32)(-1),
+ _MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m512h __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtx2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m512 __B) {
+ return (__m512h)__builtin_ia32_vcvt2ps2phx512_mask(
+ (__v16sf)__A, (__v16sf)__B, (__v32hf)__W, (__mmask32)__U,
+ _MM_FROUND_CUR_DIRECTION);
+}
+
+#define _mm512_cvtx_round2ps_ph(A, B, R) \
+ ((__m512h)__builtin_ia32_vcvt2ps2phx512_mask( \
+ (__v16sf)(A), (__v16sf)(B), (__v32hf)_mm512_undefined_ph(), \
+ (__mmask32)(-1), (const int)(R)))
+
+#define _mm512_mask_cvtx_round2ps_ph(W, U, A, B, R) \
+ ((__m512h)__builtin_ia32_vcvt2ps2phx512_mask((__v16sf)(A), (__v16sf)(B), \
+ (__v32hf)(W), (__mmask32)(U), \
+ (const int)(R)))
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtbiasph_pbf8(__m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
+ (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiasph_pbf8(
+ __m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtbiasph_pbf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
+ (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtbiassph_pbf8(__m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
+ (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_pbf8(
+ __m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtbiassph_pbf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2bf8s_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
+ (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtbiasph_phf8(__m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2hf8_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
+ (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiasph_phf8(
+ __m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2hf8_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtbiasph_phf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2hf8_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
+ (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtbiassph_phf8(__m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)_mm256_undefined_si256(),
+ (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtbiassph_phf8(
+ __m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtbiassph_phf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ return (__m256i)__builtin_ia32_vcvtbiasph2hf8s_512_mask(
+ (__v64qi)__A, (__v32hf)__B, (__v32qi)(__m256i)_mm256_setzero_si256(),
+ (__mmask32)__U);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_cvtne2ph_pbf8(__m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_vcvtne2ph2bf8_512((__v32hf)(__A),
+ (__v32hf)(__B));
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph_pbf8(
+ __m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtne2ph_pbf8(__A, __B), (__v64qi)__W);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_cvtnes2ph_pbf8(__m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_vcvtne2ph2bf8s_512((__v32hf)(__A),
+ (__v32hf)(__B));
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtnes2ph_pbf8(
+ __m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_pbf8(__A, __B), (__v64qi)__W);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_cvtne2ph_phf8(__m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_vcvtne2ph2hf8_512((__v32hf)(__A),
+ (__v32hf)(__B));
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph_phf8(
+ __m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtne2ph_phf8(__A, __B), (__v64qi)__W);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_cvtne2ph2hf8s_phf8(__m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_vcvtne2ph2hf8s_512((__v32hf)(__A),
+ (__v32hf)(__B));
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph2hf8s_phf8(
+ __m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtne2ph2hf8s_phf8(__A, __B),
+ (__v64qi)__W);
+}
+
+static __inline__ __m512h __DEFAULT_FN_ATTRS512
+_mm512_cvtnehf8_ph(__m256i __A) {
+ return (__m512h)__builtin_ia32_vcvtnehf8_2ph512_mask(
+ (__v32qi)__A, (__v32hf)(__m512h)_mm512_undefined_ph(), (__mmask32)-1);
+}
+
+static __inline__ __m512h __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtnehf8_ph(__m512h __W, __mmask32 __U, __m256i __A) {
+ return (__m512h)__builtin_ia32_vcvtnehf8_2ph512_mask(
+ (__v32qi)__A, (__v32hf)(__m512h)__W, (__mmask32)__U);
+}
+
+static __inline__ __m512h __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtnehf8_ph(__mmask32 __U, __m256i __A) {
+ return (__m512h)__builtin_ia32_vcvtnehf8_2ph512_mask(
+ (__v32qi)__A, (__v32hf)(__m512h)_mm512_setzero_ph(), (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtneph_pbf8(__m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2bf8_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtneph_pbf8(__m256i __W, __mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2bf8_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtneph_pbf8(__mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2bf8_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtnesph_pbf8(__m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2bf8s_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtnesph_pbf8(__m256i __W, __mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2bf8s_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtnesph_pbf8(__mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2bf8s_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtneph_phf8(__m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2hf8_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtneph_phf8(__m256i __W, __mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2hf8_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtneph_phf8(__mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2hf8_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_cvtnesph_phf8(__m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2hf8s_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_undefined_si256(), (__mmask32)-1);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtnesph_phf8(__m256i __W, __mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2hf8s_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)__W, (__mmask32)__U);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtnesph_phf8(__mmask32 __U, __m512h __A) {
+ return (__m256i)__builtin_ia32_vcvtneph2hf8s_512_mask(
+ (__v32hf)__A, (__v32qi)(__m256i)_mm256_setzero_si256(), (__mmask32)__U);
+}
+
+static __inline __m512h __DEFAULT_FN_ATTRS512 _mm512_cvtpbf8_ph(__m256i __A) {
+ return _mm512_castsi512_ph(_mm512_slli_epi16(_mm512_cvtepi8_epi16(__A), 8));
+}
+
+static __inline __m512h __DEFAULT_FN_ATTRS512
+_mm512_mask_cvtpbf8_ph(__m512h __S, __mmask16 __U, __m256i __A) {
+ return _mm512_castsi512_ph(
+ _mm512_mask_slli_epi16((__m512i)__S, __U, _mm512_cvtepi8_epi16(__A), 8));
+}
+
+static __inline __m512h __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtpbf8_ph(__mmask16 __U, __m256i __A) {
+ return _mm512_castsi512_ph(
+ _mm512_slli_epi16(_mm512_maskz_cvtepi8_epi16(__U, __A), 8));
+}
+
+#undef __DEFAULT_FN_ATTRS512
+
+#endif // __AVX10_2_512CONVERTINTRIN_H
+#endif // __SSE2__
diff --git a/clang/lib/Headers/avx10_2convertintrin.h b/clang/lib/Headers/avx10_2convertintrin.h
new file mode 100644
index 00000000000000..374b1fb1afc8cd
--- /dev/null
+++ b/clang/lib/Headers/avx10_2convertintrin.h
@@ -0,0 +1,525 @@
+/*===--------------- avx10_2convertintrin.h - AVX10_2CONVERT ---------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+#ifndef __IMMINTRIN_H
+#error \
+ "Never use <avx10_2convertintrin.h> directly; include <immintrin.h> instead."
+#endif // __IMMINTRIN_H
+
+#ifdef __SSE2__
+
+#ifndef __AVX10_2CONVERTINTRIN_H
+#define __AVX10_2CONVERTINTRIN_H
+
+/* Define the default attributes for the functions in this file. */
+#define __DEFAULT_FN_ATTRS128 \
+ __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \
+ __min_vector_width__(128)))
+#define __DEFAULT_FN_ATTRS256 \
+ __attribute__((__always_inline__, __nodebug__, __target__("avx10.2-256"), \
+ __min_vector_width__(256)))
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtx2ps_ph(__m128 __A,
+ __m128 __B) {
+ return (__m128h)__builtin_ia32_vcvt2ps2phx128_mask(
+ (__v4sf)__A, (__v4sf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)(-1));
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_mask_cvtx2ps_ph(__m128h __W, __mmask8 __U, __m128 __A, __m128 __B) {
+ return (__m128h)__builtin_ia32_vcvt2ps2phx128_mask(
+ (__v4sf)__A, (__v4sf)__B, (__v8hf)__W, (__mmask8)__U);
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_cvtx2ps_ph(__m256 __A,
+ __m256 __B) {
+ return (__m256h)__builtin_ia32_vcvt2ps2phx256_mask(
+ (__v8sf)__A, (__v8sf)__B, (__v16hf)_mm256_setzero_ph(), (__mmask16)(-1),
+ _MM_FROUND_CUR_DIRECTION);
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtx2ps_ph(__m256h __W, __mmask16 __U, __m256 __A, __m256 __B) {
+ return (__m256h)__builtin_ia32_vcvt2ps2phx256_mask(
+ (__v8sf)__A, (__v8sf)__B, (__v16hf)__W, (__mmask16)__U,
+ _MM_FROUND_CUR_DIRECTION);
+}
+
+#define _mm256_cvtx_round2ps_ph(A, B, R) \
+ ((__m256h)__builtin_ia32_vcvt2ps2phx256_mask( \
+ (__v8sf)(A), (__v8sf)(B), (__v16hf)_mm256_undefined_ph(), \
+ (__mmask16)(-1), (const int)(R)))
+
+#define _mm256_mask_cvtx_round2ps_ph(W, U, A, B, R) \
+ ((__m256h)__builtin_ia32_vcvt2ps2phx256_mask( \
+ (__v8sf)(A), (__v8sf)(B), (__v16hf)(W), (__mmask16)(U), (const int)(R)))
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_cvtbiasph_pbf8(__m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtbiasph_pbf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtbiasph_pbf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtbiasph_pbf8(__m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_undefined_si128(),
+ (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiasph_pbf8(
+ __m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtbiasph_pbf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_cvtbiassph_pbf8(__m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8s_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtbiassph_pbf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8s_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtbiassph_pbf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8s_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtbiassph_pbf8(__m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8s_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_undefined_si128(),
+ (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiassph_pbf8(
+ __m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8s_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtbiassph_pbf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2bf8s_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_cvtbiasph_phf8(__m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtbiasph_phf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtbiasph_phf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtbiasph_phf8(__m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_undefined_si128(),
+ (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiasph_phf8(
+ __m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtbiasph_phf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_cvtbiassph_phf8(__m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8s_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtbiassph_phf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8s_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtbiassph_phf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8s_128_mask(
+ (__v16qi)__A, (__v8hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtbiassph_phf8(__m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8s_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_undefined_si128(),
+ (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiassph_phf8(
+ __m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8s_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtbiassph_phf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ return (__m128i)__builtin_ia32_vcvtbiasph2hf8s_256_mask(
+ (__v32qi)__A, (__v16hf)__B, (__v16qi)(__m128i)_mm_setzero_si128(),
+ (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtne2ph_pbf8(__m128h __A,
+ __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtne2ph2bf8_128((__v8hf)(__A),
+ (__v8hf)(__B));
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtne2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtne2ph_pbf8(__A, __B), (__v16qi)__W);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_cvtne2ph_pbf8(__m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_vcvtne2ph2bf8_256((__v16hf)(__A),
+ (__v16hf)(__B));
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtne2ph_pbf8(
+ __m256i __W, __mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtne2ph_pbf8(__A, __B), (__v32qi)__W);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_cvtnes2ph_pbf8(__m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtne2ph2bf8s_128((__v8hf)(__A),
+ (__v8hf)(__B));
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtnes2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtnes2ph_pbf8(__A, __B), (__v16qi)__W);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_cvtnes2ph_pbf8(__m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_vcvtne2ph2bf8s_256((__v16hf)(__A),
+ (__v16hf)(__B));
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtnes2ph_pbf8(
+ __m256i __W, __mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtnes2ph_pbf8(__A, __B), (__v32qi)__W);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtne2ph_phf8(__m128h __A,
+ __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtne2ph2hf8_128((__v8hf)(__A),
+ (__v8hf)(__B));
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtne2ph_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtne2ph_phf8(__A, __B), (__v16qi)__W);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_cvtne2ph_phf8(__m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_vcvtne2ph2hf8_256((__v16hf)(__A),
+ (__v16hf)(__B));
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtne2ph_phf8(
+ __m256i __W, __mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtne2ph_phf8(__A, __B), (__v32qi)__W);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_cvtne2ph2hf8s_phf8(__m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_vcvtne2ph2hf8s_128((__v8hf)(__A),
+ (__v8hf)(__B));
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtne2ph2hf8s_phf8(
+ __m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtne2ph2hf8s_phf8(__A, __B), (__v16qi)__W);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_cvtne2ph2hf8s_phf8(__m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_vcvtne2ph2hf8s_256((__v16hf)(__A),
+ (__v16hf)(__B));
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtne2ph2hf8s_phf8(
+ __m256i __W, __mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtne2ph2hf8s_phf8(__A, __B),
+ (__v32qi)__W);
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtnehf8_ph(__m128i __A) {
+ return (__m128h)__builtin_ia32_vcvtnehf8_2ph128_mask(
+ (__v16qi)__A, (__v8hf)(__m128h)_mm_undefined_ph(), (__mmask8)-1);
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_mask_cvtnehf8_ph(__m128h __W, __mmask8 __U, __m128i __A) {
+ return (__m128h)__builtin_ia32_vcvtnehf8_2ph128_mask(
+ (__v16qi)__A, (__v8hf)(__m128h)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtnehf8_ph(__mmask8 __U, __m128i __A) {
+ return (__m128h)__builtin_ia32_vcvtnehf8_2ph128_mask(
+ (__v16qi)__A, (__v8hf)(__m128h)_mm_setzero_ph(), (__mmask8)__U);
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_cvtnehf8_ph(__m128i __A) {
+ return (__m256h)__builtin_ia32_vcvtnehf8_2ph256_mask(
+ (__v16qi)__A, (__v16hf)(__m256h)_mm256_undefined_ph(), (__mmask16)-1);
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtnehf8_ph(__m256h __W, __mmask16 __U, __m128i __A) {
+ return (__m256h)__builtin_ia32_vcvtnehf8_2ph256_mask(
+ (__v16qi)__A, (__v16hf)(__m256h)__W, (__mmask16)__U);
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtnehf8_ph(__mmask16 __U, __m128i __A) {
+ return (__m256h)__builtin_ia32_vcvtnehf8_2ph256_mask(
+ (__v16qi)__A, (__v16hf)(__m256h)_mm256_setzero_ph(), (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtneph_pbf8(__m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtneph_pbf8(__m128i __W, __mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtneph_pbf8(__mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtneph_pbf8(__m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtneph_pbf8(__m128i __W, __mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtneph_pbf8(__mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtnesph_pbf8(__m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8s_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtnesph_pbf8(__m128i __W, __mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8s_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtnesph_pbf8(__mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8s_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtnesph_pbf8(__m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8s_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtnesph_pbf8(__m128i __W, __mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8s_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtnesph_pbf8(__mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2bf8s_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtneph_phf8(__m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtneph_phf8(__m128i __W, __mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtneph_phf8(__mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtneph_phf8(__m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtneph_phf8(__m128i __W, __mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtneph_phf8(__mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtnesph_phf8(__m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8s_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask8)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtnesph_phf8(__m128i __W, __mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8s_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)__W, (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtnesph_phf8(__mmask8 __U, __m128h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8s_128_mask(
+ (__v8hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask8)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_cvtnesph_phf8(__m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8s_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_undefined_si128(), (__mmask16)-1);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtnesph_phf8(__m128i __W, __mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8s_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)__W, (__mmask16)__U);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtnesph_phf8(__mmask16 __U, __m256h __A) {
+ return (__m128i)__builtin_ia32_vcvtneph2hf8s_256_mask(
+ (__v16hf)__A, (__v16qi)(__m128i)_mm_setzero_si128(), (__mmask16)__U);
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtpbf8_ph(__m128i __A) {
+ return _mm_castsi128_ph(_mm_slli_epi16(_mm_cvtepi8_epi16(__A), 8));
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_mask_cvtpbf8_ph(__m128h __S, __mmask8 __U, __m128i __A) {
+ return _mm_castsi128_ph(
+ _mm_mask_slli_epi16((__m128i)__S, __U, _mm_cvtepi8_epi16(__A), 8));
+}
+
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtpbf8_ph(__mmask8 __U, __m128i __A) {
+ return _mm_castsi128_ph(_mm_slli_epi16(_mm_maskz_cvtepi8_epi16(__U, __A), 8));
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_cvtpbf8_ph(__m128i __A) {
+ return _mm256_castsi256_ph(_mm256_slli_epi16(_mm256_cvtepi8_epi16(__A), 8));
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_mask_cvtpbf8_ph(__m256h __S, __mmask8 __U, __m128i __A) {
+ return _mm256_castsi256_ph(
+ _mm256_mask_slli_epi16((__m256i)__S, __U, _mm256_cvtepi8_epi16(__A), 8));
+}
+
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtpbf8_ph(__mmask8 __U, __m128i __A) {
+ return _mm256_castsi256_ph(
+ _mm256_slli_epi16(_mm256_maskz_cvtepi8_epi16(__U, __A), 8));
+}
+
+#undef __DEFAULT_FN_ATTRS128
+#undef __DEFAULT_FN_ATTRS256
+
+#endif // __AVX10_2CONVERTINTRIN_H
+#endif // __SSE2__
diff --git a/clang/lib/Headers/immintrin.h b/clang/lib/Headers/immintrin.h
index f570c5752db4b9..a922056622e79f 100644
--- a/clang/lib/Headers/immintrin.h
+++ b/clang/lib/Headers/immintrin.h
@@ -649,12 +649,14 @@ _storebe_i64(void * __P, long long __D) {
#endif
#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX10_2__)
+#include <avx10_2convertintrin.h>
#include <avx10_2minmaxintrin.h>
#include <avx10_2niintrin.h>
#include <avx10_2satcvtintrin.h>
#endif
#if !defined(__SCE__) || __has_feature(modules) || defined(__AVX10_2_512__)
+#include <avx10_2_512convertintrin.h>
#include <avx10_2_512minmaxintrin.h>
#include <avx10_2_512niintrin.h>
#include <avx10_2_512satcvtintrin.h>
diff --git a/clang/lib/Sema/SemaX86.cpp b/clang/lib/Sema/SemaX86.cpp
index a0756f167deae6..621da076bb9b1f 100644
--- a/clang/lib/Sema/SemaX86.cpp
+++ b/clang/lib/Sema/SemaX86.cpp
@@ -429,6 +429,8 @@ bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
case X86::BI__builtin_ia32_vfmulcph512_mask:
case X86::BI__builtin_ia32_vfcmulcsh_mask:
case X86::BI__builtin_ia32_vfcmulcph512_mask:
+ case X86::BI__builtin_ia32_vcvt2ps2phx256_mask:
+ case X86::BI__builtin_ia32_vcvt2ps2phx512_mask:
ArgNum = 4;
HasRC = true;
break;
diff --git a/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c b/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
new file mode 100644
index 00000000000000..f35f742122c6a4
--- /dev/null
+++ b/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
@@ -0,0 +1,274 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -o - -Wno-invalid-feature-combination -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=i386 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -o - -Wno-invalid-feature-combination -Wall -Werror | FileCheck %s
+
+#include <immintrin.h>
+
+__m512h test_mm512_cvtx2ps_ph(__m512 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_cvtx2ps_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
+ return _mm512_cvtx2ps_ph(__A, __B);
+}
+
+__m512h test_mm512_mask_cvtx2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtx2ps_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
+ return _mm512_mask_cvtx2ps_ph(__W, __U, __A, __B);
+}
+
+__m512h test_mm512_cvtx_round2ps_ph(__m512 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_cvtx_round2ps_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
+ return _mm512_cvtx_round2ps_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m512h test_mm512_mask_cvtx_round2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m512 __B) {
+// CHECK-LABEL: @test_mm512_mask_cvtx_round2ps_ph(
+// CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
+ return _mm512_mask_cvtx_round2ps_ph(__W, __U, __A, __B, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+}
+
+__m256i test_mm512_cvtbiasph_pbf8(__m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtbiasph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(
+ return _mm512_cvtbiasph_pbf8(__A, __B);
+}
+
+__m256i test_mm512_mask_cvtbiasph_pbf8(__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtbiasph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(
+ return _mm512_mask_cvtbiasph_pbf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm512_maskz_cvtbiasph_pbf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtbiasph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(
+ return _mm512_maskz_cvtbiasph_pbf8(__U, __A, __B);
+}
+
+__m256i test_mm512_cvtbiassph_pbf8(__m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtbiassph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(
+ return _mm512_cvtbiassph_pbf8(__A, __B);
+}
+
+__m256i test_mm512_mask_cvtbiassph_pbf8(__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtbiassph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(
+ return _mm512_mask_cvtbiassph_pbf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm512_maskz_cvtbiassph_pbf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtbiassph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(
+ return _mm512_maskz_cvtbiassph_pbf8(__U, __A, __B);
+}
+
+__m256i test_mm512_cvtbiasph_phf8(__m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtbiasph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(
+ return _mm512_cvtbiasph_phf8(__A, __B);
+}
+
+__m256i test_mm512_mask_cvtbiasph_phf8(__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtbiasph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(
+ return _mm512_mask_cvtbiasph_phf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm512_maskz_cvtbiasph_phf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtbiasph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(
+ return _mm512_maskz_cvtbiasph_phf8(__U, __A, __B);
+}
+
+__m256i test_mm512_cvtbiassph_phf8(__m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtbiassph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(
+ return _mm512_cvtbiassph_phf8(__A, __B);
+}
+
+__m256i test_mm512_mask_cvtbiassph_phf8(__m256i __W, __mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtbiassph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(
+ return _mm512_mask_cvtbiassph_phf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm512_maskz_cvtbiassph_phf8(__mmask32 __U, __m512i __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtbiassph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(
+ return _mm512_maskz_cvtbiassph_phf8(__U, __A, __B);
+}
+
+__m512i test_mm512_cvtne2ph_pbf8(__m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtne2ph_pbf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(
+ return _mm512_cvtne2ph_pbf8(__A, __B);
+}
+
+__m512i test_mm512_mask_cvtne2ph_pbf8(__m512i __W, __mmask32 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtne2ph_pbf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ // CHECK: ret <8 x i64> %{{.*}}
+ return _mm512_mask_cvtne2ph_pbf8(__W, __U, __A, __B);
+}
+
+__m512i test_mm512_cvtnes2ph_pbf8(__m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtnes2ph_pbf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(
+ return _mm512_cvtnes2ph_pbf8(__A, __B);
+}
+
+__m512i test_mm512_mask_cvtnes2ph_pbf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtnes2ph_pbf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ // CHECK: ret <8 x i64> %{{.*}}
+ return _mm512_mask_cvtnes2ph_pbf8(__W, __U, __A, __B);
+}
+
+__m512i test_mm512_cvtne2ph_phf8(__m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtne2ph_phf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(
+ return _mm512_cvtne2ph_phf8(__A, __B);
+}
+
+__m512i test_mm512_mask_cvtne2ph_phf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtne2ph_phf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ // CHECK: ret <8 x i64> %{{.*}}
+ return _mm512_mask_cvtne2ph_phf8(__W, __U, __A, __B);
+}
+
+__m512i test_mm512_cvtne2ph2hf8s_phf8(__m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtne2ph2hf8s_phf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(
+ return _mm512_cvtne2ph2hf8s_phf8(__A, __B);
+}
+
+__m512i test_mm512_mask_cvtne2ph2hf8s_phf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtne2ph2hf8s_phf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ // CHECK: ret <8 x i64> %{{.*}}
+ return _mm512_mask_cvtne2ph2hf8s_phf8(__W, __U, __A, __B);
+}
+
+__m512h test_mm512_cvtnehf8_ph(__m256i __A) {
+ // CHECK-LABEL: @test_mm512_cvtnehf8_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(
+ return _mm512_cvtnehf8_ph(__A);
+}
+
+__m512h test_mm512_mask_cvtnehf8_ph(__m512h __A, __mmask32 __B, __m256i __C) {
+ // CHECK-LABEL: @test_mm512_mask_cvtnehf8_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(
+ return _mm512_mask_cvtnehf8_ph(__A, __B, __C);
+}
+
+__m512h test_mm512_maskz_cvtnehf8_ph(__mmask32 __A, __m256i __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtnehf8_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(
+ return _mm512_maskz_cvtnehf8_ph(__A, __B);
+}
+
+__m256i test_mm512_cvtneph_pbf8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_cvtneph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(
+ return _mm512_cvtneph_pbf8(__A);
+}
+
+__m256i test_mm512_mask_cvtneph_pbf8(__m256i __A, __mmask32 __B, __m512h __C) {
+ // CHECK-LABEL: @test_mm512_mask_cvtneph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(
+ return _mm512_mask_cvtneph_pbf8(__A, __B, __C);
+}
+
+__m256i test_mm512_maskz_cvtneph_pbf8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtneph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(
+ return _mm512_maskz_cvtneph_pbf8(__A, __B);
+}
+
+__m256i test_mm512_cvtnesph_pbf8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_cvtnesph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(
+ return _mm512_cvtnesph_pbf8(__A);
+}
+
+__m256i test_mm512_mask_cvtnesph_pbf8(__m256i __A, __mmask32 __B, __m512h __C) {
+ // CHECK-LABEL: @test_mm512_mask_cvtnesph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(
+ return _mm512_mask_cvtnesph_pbf8(__A, __B, __C);
+}
+
+__m256i test_mm512_maskz_cvtnesph_pbf8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtnesph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(
+ return _mm512_maskz_cvtnesph_pbf8(__A, __B);
+}
+
+__m256i test_mm512_cvtneph_phf8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_cvtneph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(
+ return _mm512_cvtneph_phf8(__A);
+}
+
+__m256i test_mm512_mask_cvtneph_phf8(__m256i __A, __mmask32 __B, __m512h __C) {
+ // CHECK-LABEL: @test_mm512_mask_cvtneph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(
+ return _mm512_mask_cvtneph_phf8(__A, __B, __C);
+}
+
+__m256i test_mm512_maskz_cvtneph_phf8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtneph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(
+ return _mm512_maskz_cvtneph_phf8(__A, __B);
+}
+
+__m256i test_mm512_cvtnesph_phf8(__m512h __A) {
+ // CHECK-LABEL: @test_mm512_cvtnesph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(
+ return _mm512_cvtnesph_phf8(__A);
+}
+
+__m256i test_mm512_mask_cvtnesph_phf8(__m256i __A, __mmask32 __B, __m512h __C) {
+ // CHECK-LABEL: @test_mm512_mask_cvtnesph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(
+ return _mm512_mask_cvtnesph_phf8(__A, __B, __C);
+}
+
+__m256i test_mm512_maskz_cvtnesph_phf8(__mmask32 __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtnesph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(
+ return _mm512_maskz_cvtnesph_phf8(__A, __B);
+}
+
+__m512h test_mm512_cvtpbf8_ph(__m256i A) {
+ // CHECK-LABEL: @test_mm512_cvtpbf8_ph
+ // CHECK: sext <32 x i8> %{{.*}} to <32 x i16>
+ // CHECK: @llvm.x86.avx512.pslli.w.512
+ // CHECK: ret <32 x half> %{{.*}}
+ return _mm512_cvtpbf8_ph(A);
+}
+
+__m512h test_mm512_mask_cvtpbf8_ph(__m512h S, __mmask16 M, __m256i A) {
+ // CHECK-LABEL: @test_mm512_mask_cvtpbf8_ph
+ // CHECK: sext <32 x i8> %{{.*}} to <32 x i16>
+ // CHECK: @llvm.x86.avx512.pslli.w.512
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ // CHECK: ret <32 x half> %{{.*}}
+ return _mm512_mask_cvtpbf8_ph(S, M, A);
+}
+
+__m512h test_mm512_maskz_cvtpbf8_ph(__mmask16 M, __m256i A) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtpbf8_ph
+ // CHECK: sext <32 x i8> %{{.*}} to <32 x i16>
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}}
+ // CHECK: @llvm.x86.avx512.pslli.w.512
+ // CHECK: ret <32 x half> %{{.*}}
+ return _mm512_maskz_cvtpbf8_ph(M, A);
+}
diff --git a/clang/test/CodeGen/X86/avx10_2convert-builtins.c b/clang/test/CodeGen/X86/avx10_2convert-builtins.c
new file mode 100644
index 00000000000000..e4c302d4a23585
--- /dev/null
+++ b/clang/test/CodeGen/X86/avx10_2convert-builtins.c
@@ -0,0 +1,530 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64 -target-feature +avx10.2-256 \
+// RUN: -emit-llvm -o - -Wno-invalid-feature-combination -Wall -Werror | FileCheck %s
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=i386 -target-feature +avx10.2-256 \
+// RUN: -emit-llvm -o - -Wno-invalid-feature-combination -Wall -Werror | FileCheck %s
+
+#include <immintrin.h>
+
+__m128h test_mm_cvtx2ps_ph(__m128 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_cvtx2ps_ph(
+ // CHECK: call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128
+ return _mm_cvtx2ps_ph(__A, __B);
+}
+
+__m128h test_mm_mask_cvtx2ps_ph(__m128h __W, __mmask8 __U, __m128 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtx2ps_ph(
+ // CHECK: call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128
+ return _mm_mask_cvtx2ps_ph(__W, __U, __A, __B);
+}
+
+__m256h test_mm256_cvtx2ps_ph(__m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_cvtx2ps_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256
+ return _mm256_cvtx2ps_ph(__A, __B);
+}
+
+__m256h test_mm256_mask_cvtx2ps_ph(__m256h __W, __mmask16 __U, __m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtx2ps_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256
+ return _mm256_mask_cvtx2ps_ph(__W, __U, __A, __B);
+}
+
+__m256h test_mm256_cvtx_round2ps_ph(__m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_cvtx_round2ps_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(
+ return _mm256_cvtx_round2ps_ph(__A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m256h test_mm256_mask_cvtx_round2ps_ph(__m256h __W, __mmask8 __U, __m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtx_round2ps_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(
+ return _mm256_mask_cvtx_round2ps_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
+__m128i test_mm_cvtbiasph_pbf8(__m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtbiasph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(
+ return _mm_cvtbiasph_pbf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtbiasph_pbf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtbiasph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(
+ return _mm_mask_cvtbiasph_pbf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_maskz_cvtbiasph_pbf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtbiasph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(
+ return _mm_maskz_cvtbiasph_pbf8(__U, __A, __B);
+}
+
+__m128i test_mm256_cvtbiasph_pbf8(__m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtbiasph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(
+ return _mm256_cvtbiasph_pbf8(__A, __B);
+}
+
+__m128i test_mm256_mask_cvtbiasph_pbf8(__m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtbiasph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(
+ return _mm256_mask_cvtbiasph_pbf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm256_maskz_cvtbiasph_pbf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtbiasph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(
+ return _mm256_maskz_cvtbiasph_pbf8(__U, __A, __B);
+}
+
+__m128i test_mm_cvtbiassph_pbf8(__m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtbiassph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(
+ return _mm_cvtbiassph_pbf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtbiassph_pbf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtbiassph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(
+ return _mm_mask_cvtbiassph_pbf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_maskz_cvtbiassph_pbf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtbiassph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(
+ return _mm_maskz_cvtbiassph_pbf8(__U, __A, __B);
+}
+
+__m128i test_mm256_cvtbiassph_pbf8(__m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtbiassph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(
+ return _mm256_cvtbiassph_pbf8(__A, __B);
+}
+
+__m128i test_mm256_mask_cvtbiassph_pbf8(__m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtbiassph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(
+ return _mm256_mask_cvtbiassph_pbf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm256_maskz_cvtbiassph_pbf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtbiassph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(
+ return _mm256_maskz_cvtbiassph_pbf8(__U, __A, __B);
+}
+
+__m128i test_mm_cvtbiasph_phf8(__m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtbiasph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(
+ return _mm_cvtbiasph_phf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtbiasph_phf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtbiasph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(
+ return _mm_mask_cvtbiasph_phf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_maskz_cvtbiasph_phf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtbiasph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(
+ return _mm_maskz_cvtbiasph_phf8(__U, __A, __B);
+}
+
+__m128i test_mm256_cvtbiasph_phf8(__m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtbiasph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(
+ return _mm256_cvtbiasph_phf8(__A, __B);
+}
+
+__m128i test_mm256_mask_cvtbiasph_phf8(__m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtbiasph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(
+ return _mm256_mask_cvtbiasph_phf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm256_maskz_cvtbiasph_phf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtbiasph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(
+ return _mm256_maskz_cvtbiasph_phf8(__U, __A, __B);
+}
+
+__m128i test_mm_cvtbiassph_phf8(__m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtbiassph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(
+ return _mm_cvtbiassph_phf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtbiassph_phf8(__m128i __W, __mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtbiassph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(
+ return _mm_mask_cvtbiassph_phf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_maskz_cvtbiassph_phf8(__mmask8 __U, __m128i __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtbiassph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(
+ return _mm_maskz_cvtbiassph_phf8(__U, __A, __B);
+}
+
+__m128i test_mm256_cvtbiassph_phf8(__m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtbiassph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(
+ return _mm256_cvtbiassph_phf8(__A, __B);
+}
+
+__m128i test_mm256_mask_cvtbiassph_phf8(__m128i __W, __mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtbiassph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(
+ return _mm256_mask_cvtbiassph_phf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm256_maskz_cvtbiassph_phf8(__mmask16 __U, __m256i __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtbiassph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(
+ return _mm256_maskz_cvtbiassph_phf8(__U, __A, __B);
+}
+
+__m128i test_mm_cvtne2ph_pbf8(__m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtne2ph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(
+ return _mm_cvtne2ph_pbf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtne2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtne2ph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ // CHECK: ret <2 x i64> %{{.*}}
+ return _mm_mask_cvtne2ph_pbf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm256_cvtne2ph_pbf8(__m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtne2ph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(
+ return _mm256_cvtne2ph_pbf8(__A, __B);
+}
+
+__m256i test_mm256_mask_cvtne2ph_pbf8(__m256i __W, __mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtne2ph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ // CHECK: ret <4 x i64> %{{.*}}
+ return _mm256_mask_cvtne2ph_pbf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_cvtnes2ph_pbf8(__m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtnes2ph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(
+ return _mm_cvtnes2ph_pbf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtnes2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtnes2ph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ // CHECK: ret <2 x i64> %{{.*}}
+ return _mm_mask_cvtnes2ph_pbf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm256_cvtnes2ph_pbf8(__m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtnes2ph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(
+ return _mm256_cvtnes2ph_pbf8(__A, __B);
+}
+
+__m256i test_mm256_mask_cvtnes2ph_pbf8(__m256i __W, __mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtnes2ph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ // CHECK: ret <4 x i64> %{{.*}}
+ return _mm256_mask_cvtnes2ph_pbf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_cvtne2ph_phf8(__m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtne2ph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(
+ return _mm_cvtne2ph_phf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtne2ph_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtne2ph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ // CHECK: ret <2 x i64> %{{.*}}
+ return _mm_mask_cvtne2ph_phf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm256_cvtne2ph_phf8(__m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtne2ph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(
+ return _mm256_cvtne2ph_phf8(__A, __B);
+}
+
+__m256i test_mm256_mask_cvtne2ph_phf8(__m256i __W, __mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtne2ph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ // CHECK: ret <4 x i64> %{{.*}}
+ return _mm256_mask_cvtne2ph_phf8(__W, __U, __A, __B);
+}
+
+__m128i test_mm_cvtne2ph2hf8s_phf8(__m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtne2ph2hf8s_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(
+ return _mm_cvtne2ph2hf8s_phf8(__A, __B);
+}
+
+__m128i test_mm_mask_cvtne2ph2hf8s_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtne2ph2hf8s_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ // CHECK: ret <2 x i64> %{{.*}}
+ return _mm_mask_cvtne2ph2hf8s_phf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm256_cvtne2ph2hf8s_phf8(__m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtne2ph2hf8s_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(
+ return _mm256_cvtne2ph2hf8s_phf8(__A, __B);
+}
+
+__m256i test_mm256_mask_cvtne2ph2hf8s_phf8(__m256i __W, __mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtne2ph2hf8s_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ // CHECK: ret <4 x i64> %{{.*}}
+ return _mm256_mask_cvtne2ph2hf8s_phf8(__W, __U, __A, __B);
+}
+
+__m128h test_mm_cvtnehf8_ph(__m128i __A) {
+ // CHECK-LABEL: @test_mm_cvtnehf8_ph(
+ // CHECK: call <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(
+ return _mm_cvtnehf8_ph(__A);
+}
+
+__m128h test_mm_mask_cvtnehf8_ph(__m128h __A, __mmask8 __B, __m128i __C) {
+ // CHECK-LABEL: @test_mm_mask_cvtnehf8_ph(
+ // CHECK: call <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(
+ return _mm_mask_cvtnehf8_ph(__A, __B, __C);
+}
+
+__m128h test_mm_maskz_cvtnehf8_ph(__mmask8 __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtnehf8_ph(
+ // CHECK: call <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(
+ return _mm_maskz_cvtnehf8_ph(__A, __B);
+}
+
+__m256h test_mm256_cvtnehf8_ph(__m128i __A) {
+ // CHECK-LABEL: @test_mm256_cvtnehf8_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(
+ return _mm256_cvtnehf8_ph(__A);
+}
+
+__m256h test_mm256_mask_cvtnehf8_ph(__m256h __A, __mmask16 __B, __m128i __C) {
+ // CHECK-LABEL: @test_mm256_mask_cvtnehf8_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(
+ return _mm256_mask_cvtnehf8_ph(__A, __B, __C);
+}
+
+__m256h test_mm256_maskz_cvtnehf8_ph(__mmask16 __A, __m128i __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtnehf8_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(
+ return _mm256_maskz_cvtnehf8_ph(__A, __B);
+}
+
+__m128i test_mm_cvtneph_pbf8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_cvtneph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(
+ return _mm_cvtneph_pbf8(__A);
+}
+
+__m128i test_mm_mask_cvtneph_pbf8(__m128i __A, __mmask8 __B, __m128h __C) {
+ // CHECK-LABEL: @test_mm_mask_cvtneph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(
+ return _mm_mask_cvtneph_pbf8(__A, __B, __C);
+}
+
+__m128i test_mm_maskz_cvtneph_pbf8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtneph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(
+ return _mm_maskz_cvtneph_pbf8(__A, __B);
+}
+
+__m128i test_mm256_cvtneph_pbf8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_cvtneph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(
+ return _mm256_cvtneph_pbf8(__A);
+}
+
+__m128i test_mm256_mask_cvtneph_pbf8(__m128i __A, __mmask16 __B, __m256h __C) {
+ // CHECK-LABEL: @test_mm256_mask_cvtneph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(
+ return _mm256_mask_cvtneph_pbf8(__A, __B, __C);
+}
+
+__m128i test_mm256_maskz_cvtneph_pbf8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtneph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(
+ return _mm256_maskz_cvtneph_pbf8(__A, __B);
+}
+
+__m128i test_mm_cvtnesph_pbf8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_cvtnesph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(
+ return _mm_cvtnesph_pbf8(__A);
+}
+
+__m128i test_mm_mask_cvtnesph_pbf8(__m128i __A, __mmask8 __B, __m128h __C) {
+ // CHECK-LABEL: @test_mm_mask_cvtnesph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(
+ return _mm_mask_cvtnesph_pbf8(__A, __B, __C);
+}
+
+__m128i test_mm_maskz_cvtnesph_pbf8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtnesph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(
+ return _mm_maskz_cvtnesph_pbf8(__A, __B);
+}
+
+__m128i test_mm256_cvtnesph_pbf8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_cvtnesph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(
+ return _mm256_cvtnesph_pbf8(__A);
+}
+
+__m128i test_mm256_mask_cvtnesph_pbf8(__m128i __A, __mmask16 __B, __m256h __C) {
+ // CHECK-LABEL: @test_mm256_mask_cvtnesph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(
+ return _mm256_mask_cvtnesph_pbf8(__A, __B, __C);
+}
+
+__m128i test_mm256_maskz_cvtnesph_pbf8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtnesph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(
+ return _mm256_maskz_cvtnesph_pbf8(__A, __B);
+}
+
+__m128i test_mm_cvtneph_phf8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_cvtneph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(
+ return _mm_cvtneph_phf8(__A);
+}
+
+__m128i test_mm_mask_cvtneph_phf8(__m128i __A, __mmask8 __B, __m128h __C) {
+ // CHECK-LABEL: @test_mm_mask_cvtneph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(
+ return _mm_mask_cvtneph_phf8(__A, __B, __C);
+}
+
+__m128i test_mm_maskz_cvtneph_phf8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtneph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(
+ return _mm_maskz_cvtneph_phf8(__A, __B);
+}
+
+__m128i test_mm256_cvtneph_phf8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_cvtneph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(
+ return _mm256_cvtneph_phf8(__A);
+}
+
+__m128i test_mm256_mask_cvtneph_phf8(__m128i __A, __mmask16 __B, __m256h __C) {
+ // CHECK-LABEL: @test_mm256_mask_cvtneph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(
+ return _mm256_mask_cvtneph_phf8(__A, __B, __C);
+}
+
+__m128i test_mm256_maskz_cvtneph_phf8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtneph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(
+ return _mm256_maskz_cvtneph_phf8(__A, __B);
+}
+
+__m128i test_mm_cvtnesph_phf8(__m128h __A) {
+ // CHECK-LABEL: @test_mm_cvtnesph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(
+ return _mm_cvtnesph_phf8(__A);
+}
+
+__m128i test_mm_mask_cvtnesph_phf8(__m128i __A, __mmask8 __B, __m128h __C) {
+ // CHECK-LABEL: @test_mm_mask_cvtnesph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(
+ return _mm_mask_cvtnesph_phf8(__A, __B, __C);
+}
+
+__m128i test_mm_maskz_cvtnesph_phf8(__mmask8 __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtnesph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(
+ return _mm_maskz_cvtnesph_phf8(__A, __B);
+}
+
+__m128i test_mm256_cvtnesph_phf8(__m256h __A) {
+ // CHECK-LABEL: @test_mm256_cvtnesph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(
+ return _mm256_cvtnesph_phf8(__A);
+}
+
+__m128i test_mm256_mask_cvtnesph_phf8(__m128i __A, __mmask16 __B, __m256h __C) {
+ // CHECK-LABEL: @test_mm256_mask_cvtnesph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(
+ return _mm256_mask_cvtnesph_phf8(__A, __B, __C);
+}
+
+__m128i test_mm256_maskz_cvtnesph_phf8(__mmask16 __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtnesph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(
+ return _mm256_maskz_cvtnesph_phf8(__A, __B);
+}
+
+__m256h test_mm256_cvtpbf8_ph(__m128i A) {
+ // CHECK-LABEL: @test_mm256_cvtpbf8_ph
+ // CHECK: sext <16 x i8> %{{.*}} to <16 x i16>
+ // CHECK: @llvm.x86.avx2.pslli.w
+ // CHECK: ret <16 x half> %{{.*}}
+ return _mm256_cvtpbf8_ph(A);
+}
+
+__m256h test_mm256_mask_cvtpbf8_ph(__m256h S, __mmask16 M, __m128i A) {
+ // CHECK-LABEL: @test_mm256_mask_cvtpbf8_ph
+ // CHECK: sext <16 x i8> %{{.*}} to <16 x i16>
+ // CHECK: @llvm.x86.avx2.pslli.w
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ // CHECK: ret <16 x half> %{{.*}}
+ return _mm256_mask_cvtpbf8_ph(S, M, A);
+}
+
+__m256h test_mm256_maskz_cvtpbf8_ph(__mmask16 M, __m128i A) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtpbf8_ph
+ // CHECK: sext <16 x i8> %{{.*}} to <16 x i16>
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i16> %{{.*}}, <16 x i16> %{{.*}}
+ // CHECK: @llvm.x86.avx2.pslli.w
+ // CHECK: ret <16 x half> %{{.*}}
+ return _mm256_maskz_cvtpbf8_ph(M, A);
+}
+
+__m128h test_mm_cvtpbf8_ph(__m128i A) {
+ // CHECK-LABEL: @test_mm_cvtpbf8_ph
+ // CHECK: sext <8 x i8> %{{.*}} to <8 x i16>
+ // CHECK: @llvm.x86.sse2.pslli.w
+ // CHECK: ret <8 x half> %{{.*}}
+ return _mm_cvtpbf8_ph(A);
+}
+
+__m128h test_mm_mask_cvtpbf8_ph(__m128h S, __mmask8 M, __m128i A) {
+ // CHECK-LABEL: @test_mm_mask_cvtpbf8_ph
+ // CHECK: sext <8 x i8> %{{.*}} to <8 x i16>
+ // CHECK: @llvm.x86.sse2.pslli.w
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ // CHECK: ret <8 x half> %{{.*}}
+ return _mm_mask_cvtpbf8_ph(S, M, A);
+}
+
+__m128h test_mm_maskz_cvtpbf8_ph(__mmask8 M, __m128i A) {
+ // CHECK-LABEL: @test_mm_maskz_cvtpbf8_ph
+ // CHECK: sext <8 x i8> %{{.*}} to <8 x i16>
+ // CHECK: select <8 x i1> %{{.*}}, <8 x i16> %{{.*}}, <8 x i16> %{{.*}}
+ // CHECK: @llvm.x86.sse2.pslli.w
+ // CHECK: ret <8 x half> %{{.*}}
+ return _mm_maskz_cvtpbf8_ph(M, A);
+}
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index 1ab2002f7f6960..c48db2352a7fed 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -7089,3 +7089,133 @@ def int_x86_avx10_mask_vcvttps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvttps2iu
DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty, llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg<ArgIndex<3>>]>;
}
+
+//===----------------------------------------------------------------------===//
+let TargetPrefix = "x86" in {
+def int_x86_avx10_mask_vcvt2ps2phx_128 : ClangBuiltin<"__builtin_ia32_vcvt2ps2phx128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v8f16_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvt2ps2phx_256 : ClangBuiltin<"__builtin_ia32_vcvt2ps2phx256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v16f16_ty, llvm_i16_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<4>>]>;
+def int_x86_avx10_mask_vcvt2ps2phx_512 : ClangBuiltin<"__builtin_ia32_vcvt2ps2phx512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32f16_ty], [llvm_v16f32_ty, llvm_v16f32_ty, llvm_v32f16_ty, llvm_i32_ty, llvm_i32_ty],
+ [IntrNoMem, ImmArg<ArgIndex<4>>]>;
+def int_x86_avx10_mask_vcvtbiasph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2bf8256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2bf8512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2bf8s128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8s_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2bf8s256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8s_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2bf8s512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8s_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2hf8128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2hf8256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2hf8512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2hf8s128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8s_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8s_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtbiasph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8s_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8_128">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2bf8256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8_256">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2bf8512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8_512">,
+ DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2bf8s128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8s_128">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2bf8s256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8s_256">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2bf8s512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8s_512">,
+ DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2hf8128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8_128">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2hf8256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8_256">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2hf8512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8_512">,
+ DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2hf8s128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_128">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_256">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_vcvtne2ph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_512">,
+ DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvthf82ph128 : ClangBuiltin<"__builtin_ia32_vcvtnehf8_2ph128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvthf82ph256 : ClangBuiltin<"__builtin_ia32_vcvtnehf8_2ph256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v16i8_ty, llvm_v16f16_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvthf82ph512 : ClangBuiltin<"__builtin_ia32_vcvtnehf8_2ph512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32f16_ty], [llvm_v32i8_ty, llvm_v32f16_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2bf8256 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2bf8512 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2bf8s128 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8s_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2bf8s256 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8s_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2bf8s512 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8s_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2hf8128 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2hf8256 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2hf8512 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2hf8s128 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8s_128_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8s_256_mask">,
+ DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
+ [IntrNoMem]>;
+def int_x86_avx10_mask_vcvtneph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8s_512_mask">,
+ DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
+ [IntrNoMem]>;
+}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2891e21be1b267..22026889a0534f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -26113,6 +26113,21 @@ SDValue X86TargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
return DAG.getNode(IntrData->Opc1, dl, Op.getValueType(),
{Src, PassThru, Mask});
}
+ case TRUNCATE2_TO_REG: {
+ SDValue Src = Op.getOperand(1);
+ SDValue Src2 = Op.getOperand(2);
+ SDValue PassThru = Op.getOperand(3);
+ SDValue Mask = Op.getOperand(4);
+
+ if (isAllOnesConstant(Mask))
+ return DAG.getNode(IntrData->Opc0, dl, Op.getValueType(), {Src, Src2});
+
+ MVT Src2VT = Src2.getSimpleValueType();
+ MVT MaskVT = MVT::getVectorVT(MVT::i1, Src2VT.getVectorNumElements());
+ Mask = getMaskNode(Mask, MaskVT, Subtarget, DAG, dl);
+ return DAG.getNode(IntrData->Opc1, dl, Op.getValueType(),
+ {Src, Src2, PassThru, Mask});
+ }
case CVTPS2PH_MASK: {
SDValue Src = Op.getOperand(1);
SDValue Rnd = Op.getOperand(2);
@@ -34077,6 +34092,29 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(CVTTP2IUBS)
NODE_NAME_CASE(CVTTP2IBS_SAE)
NODE_NAME_CASE(CVTTP2IUBS_SAE)
+ NODE_NAME_CASE(VCVTNE2PH2BF8)
+ NODE_NAME_CASE(VCVTNE2PH2BF8S)
+ NODE_NAME_CASE(VCVTNE2PH2HF8)
+ NODE_NAME_CASE(VCVTNE2PH2HF8S)
+ NODE_NAME_CASE(VCVTBIASPH2BF8)
+ NODE_NAME_CASE(VCVTBIASPH2BF8S)
+ NODE_NAME_CASE(VCVTBIASPH2HF8)
+ NODE_NAME_CASE(VCVTBIASPH2HF8S)
+ NODE_NAME_CASE(VCVTNEPH2BF8)
+ NODE_NAME_CASE(VCVTNEPH2BF8S)
+ NODE_NAME_CASE(VCVTNEPH2HF8)
+ NODE_NAME_CASE(VCVTNEPH2HF8S)
+ NODE_NAME_CASE(VMCVTBIASPH2BF8)
+ NODE_NAME_CASE(VMCVTBIASPH2BF8S)
+ NODE_NAME_CASE(VMCVTBIASPH2HF8)
+ NODE_NAME_CASE(VMCVTBIASPH2HF8S)
+ NODE_NAME_CASE(VMCVTNEPH2BF8)
+ NODE_NAME_CASE(VMCVTNEPH2BF8S)
+ NODE_NAME_CASE(VMCVTNEPH2HF8)
+ NODE_NAME_CASE(VMCVTNEPH2HF8S)
+ NODE_NAME_CASE(VCVTHF82PH)
+ NODE_NAME_CASE(VCVT2PS2PHX)
+ NODE_NAME_CASE(VCVT2PS2PHX_RND)
NODE_NAME_CASE(AESENC128KL)
NODE_NAME_CASE(AESDEC128KL)
NODE_NAME_CASE(AESENC256KL)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 2e7538cb3c1183..aaf8f12f7cd275 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -618,6 +618,30 @@ namespace llvm {
MPSADBW,
+ VCVT2PS2PHX,
+ VCVT2PS2PHX_RND,
+ VCVTNE2PH2BF8,
+ VCVTNE2PH2BF8S,
+ VCVTNE2PH2HF8,
+ VCVTNE2PH2HF8S,
+ VCVTBIASPH2BF8,
+ VCVTBIASPH2BF8S,
+ VCVTBIASPH2HF8,
+ VCVTBIASPH2HF8S,
+ VCVTNEPH2BF8,
+ VCVTNEPH2BF8S,
+ VCVTNEPH2HF8,
+ VCVTNEPH2HF8S,
+ VMCVTBIASPH2BF8,
+ VMCVTBIASPH2BF8S,
+ VMCVTBIASPH2HF8,
+ VMCVTBIASPH2HF8S,
+ VMCVTNEPH2BF8,
+ VMCVTNEPH2BF8S,
+ VMCVTNEPH2HF8,
+ VMCVTNEPH2HF8S,
+ VCVTHF82PH,
+
// Compress and expand.
COMPRESS,
EXPAND,
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index fe381b37782629..32b3698f25b0e1 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -624,3 +624,440 @@ defm VCVTTPS2IUBS : avx10_sat_cvt_base<0x6a, "vcvttps2iubs", SchedWriteVecIMul,
avx512vl_i32_info, avx512vl_f32_info,
X86vcvttp2iubsSAE>,
AVX512PDIi8Base, T_MAP5, EVEX_CD8<32, CD8VF>;
+
+//-------------------------------------------------
+// AVX10 CONVERT instructions
+//-------------------------------------------------
+
+multiclass avx10_cvt2ps2ph_rc<bits<8> opc, string OpcodeStr, X86FoldableSchedWrite sched,
+ X86VectorVTInfo _Src, X86VectorVTInfo _,
+ SDNode OpNodeRnd> {
+ let Uses = [MXCSR] in
+ defm rrb : AVX512_maskable<opc, MRMSrcReg, _, (outs _.RC:$dst),
+ (ins _Src.RC:$src1, _Src.RC:$src2, AVX512RC:$rc), OpcodeStr,
+ "$rc, $src2, $src1", "$src1, $src2, $rc",
+ (_.VT (OpNodeRnd (_Src.VT _Src.RC:$src1),
+ (_Src.VT _Src.RC:$src2), (i32 timm:$rc)))>,
+ EVEX, VVVV, EVEX_B, EVEX_RC, PD, Sched<[sched]>;
+}
+
+multiclass avx10_cvt2ps2ph<bits<8> opc, string OpcodeStr,
+ X86SchedWriteWidths sched,
+ AVX512VLVectorVTInfo _SrcVTInfo,
+ AVX512VLVectorVTInfo _DstVTInfo,
+ SDNode OpNode, SDNode OpNodeRnd> {
+ let Predicates = [HasAVX10_2_512], Uses = [MXCSR] in {
+ defm Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
+ _SrcVTInfo.info512, _DstVTInfo.info512,
+ _SrcVTInfo.info512>,
+ avx10_cvt2ps2ph_rc<opc, OpcodeStr, sched.ZMM,
+ _SrcVTInfo.info512, _DstVTInfo.info512,
+ OpNodeRnd>,
+ EVEX_V512, EVEX_CD8<32, CD8VF>;
+ }
+ let Predicates = [HasAVX10_2] in {
+ defm Z256 : avx512_binop_rm2<opc, OpcodeStr, sched.YMM, OpNode,
+ _SrcVTInfo.info256, _DstVTInfo.info256,
+ _SrcVTInfo.info256>,
+ EVEX_V256, EVEX_CD8<32, CD8VF>;
+ defm Z128 : avx512_binop_rm2<opc, OpcodeStr, sched.XMM, OpNode,
+ _SrcVTInfo.info128, _DstVTInfo.info128,
+ _SrcVTInfo.info128>,
+ EVEX_V128, EVEX_CD8<32, CD8VF>;
+ }
+
+ let Predicates = [HasAVX10_2], hasEVEX_U = 1 in {
+ defm Z256 : avx10_cvt2ps2ph_rc<opc, OpcodeStr, sched.YMM,
+ _SrcVTInfo.info256, _DstVTInfo.info256,
+ OpNodeRnd>;
+ }
+}
+
+defm VCVT2PS2PHX : avx10_cvt2ps2ph<0x67, "vcvt2ps2phx",
+ SchedWriteCvtPD2PS,
+ avx512vl_f32_info, avx512vl_f16_info,
+ X86vcvt2ps2phx, X86vcvt2ps2phxRnd>, T8;
+
+multiclass avx10_binop_all<bits<8> opc, string OpcodeStr,
+ X86SchedWriteWidths sched,
+ AVX512VLVectorVTInfo _SrcVTInfo,
+ AVX512VLVectorVTInfo _DstVTInfo,
+ SDNode OpNode,
+ bit IsCommutable = 0> {
+ let Predicates = [HasAVX10_2_512] in
+ defm NAME#Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
+ _SrcVTInfo.info512, _DstVTInfo.info512,
+ _SrcVTInfo.info512, IsCommutable>,
+ EVEX_V512;
+ let Predicates = [HasAVX10_2] in {
+ defm NAME#Z256 : avx512_binop_rm2<opc, OpcodeStr, sched.YMM, OpNode,
+ _SrcVTInfo.info256, _DstVTInfo.info256,
+ _SrcVTInfo.info256, IsCommutable>,
+ EVEX_V256;
+ defm NAME#Z128 : avx512_binop_rm2<opc, OpcodeStr, sched.XMM, OpNode,
+ _SrcVTInfo.info128, _DstVTInfo.info128,
+ _SrcVTInfo.info128, IsCommutable>,
+ EVEX_V128;
+ }
+}
+
+defm VCVTNE2PH2BF8 : avx10_binop_all<0x74, "vcvtne2ph2bf8", SchedWriteCvtPD2PS,
+ avx512vl_f16_info, avx512vl_i8_info,
+ X86vcvtne2ph2bf8, 0>,
+ EVEX_CD8<16, CD8VF>, T8, XD;
+defm VCVTNE2PH2BF8S : avx10_binop_all<0x74, "vcvtne2ph2bf8s", SchedWriteCvtPD2PS,
+ avx512vl_f16_info, avx512vl_i8_info,
+ X86vcvtne2ph2bf8s, 0>,
+ EVEX_CD8<16, CD8VF>, T_MAP5, XD;
+defm VCVTNE2PH2HF8 : avx10_binop_all<0x18, "vcvtne2ph2hf8", SchedWriteCvtPD2PS,
+ avx512vl_f16_info, avx512vl_i8_info,
+ X86vcvtne2ph2hf8, 0>,
+ EVEX_CD8<16, CD8VF>, T_MAP5, XD;
+defm VCVTNE2PH2HF8S : avx10_binop_all<0x1b, "vcvtne2ph2hf8s", SchedWriteCvtPD2PS,
+ avx512vl_f16_info, avx512vl_i8_info,
+ X86vcvtne2ph2hf8s, 0>,
+ EVEX_CD8<16, CD8VF>, T_MAP5, XD;
+
+multiclass avx10_convert_3op_packed<bits<8> OpCode, string OpcodeStr,
+ X86VectorVTInfo vt_dst, X86VectorVTInfo vt_src1,
+ X86VectorVTInfo vt_src2, SDPatternOperator OpNode,
+ SDPatternOperator MaskOpNode, X86FoldableSchedWrite sched,
+ string Broadcast = vt_src2.BroadcastStr,
+ X86MemOperand MemOp = vt_src2.MemOp,
+ RegisterClass MaskRC = vt_src2.KRCWM,
+ dag LdDAG = (vt_dst.VT (OpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT (vt_src2.LdFrag addr:$src2)))),
+ dag MaskLdDAG = (vt_dst.VT (MaskOpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT (vt_src2.LdFrag addr:$src2))))> {
+ defm rr : AVX512_maskable_cvt<OpCode, MRMSrcReg, vt_dst, (outs vt_dst.RC:$dst),
+ (ins vt_src1.RC:$src1, vt_src2.RC:$src2),
+ (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src1.RC:$src1, vt_src2.RC:$src2),
+ (ins MaskRC:$mask, vt_src1.RC:$src1, vt_src2.RC:$src2),
+ OpcodeStr, "$src2, $src1", "$src1, $src2",
+ (vt_dst.VT (OpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT vt_src2.RC:$src2))),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT (MaskOpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT vt_src2.RC:$src2))),
+ vt_dst.RC:$src0),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT (MaskOpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT vt_src2.RC:$src2))),
+ vt_dst.ImmAllZerosV)>,
+ EVEX, VVVV, Sched<[sched]>;
+ let mayLoad = 1 in
+ defm rm : AVX512_maskable_cvt<OpCode, MRMSrcMem, vt_dst, (outs vt_dst.RC:$dst),
+ (ins vt_src1.RC:$src1, MemOp:$src2),
+ (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src1.RC:$src1, MemOp:$src2),
+ (ins MaskRC:$mask, vt_src1.RC:$src1, MemOp:$src2),
+ OpcodeStr, "$src2, $src1", "$src1, $src2",
+ LdDAG,
+ (vselect_mask MaskRC:$mask, MaskLdDAG, vt_dst.RC:$src0),
+ (vselect_mask MaskRC:$mask, MaskLdDAG, vt_dst.ImmAllZerosV)>,
+ EVEX, VVVV, Sched<[sched]>;
+
+ let mayLoad = 1 in
+ defm rmb : AVX512_maskable_cvt<OpCode, MRMSrcMem, vt_dst, (outs vt_dst.RC:$dst),
+ (ins vt_src1.RC:$src1, vt_src2.ScalarMemOp:$src2),
+ (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src1.RC:$src1,
+ vt_src2.ScalarMemOp:$src2),
+ (ins MaskRC:$mask, vt_src1.RC:$src1, vt_src2.ScalarMemOp:$src2),
+ OpcodeStr,
+ "${src2}"#Broadcast#", $src1", "$src1, ${src2}"#Broadcast,
+ (vt_dst.VT (OpNode (vt_src1.VT vt_src1.RC:$src1), (vt_src2.VT
+ (vt_src2.BroadcastLdFrag addr:$src2)))),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT
+ (MaskOpNode
+ (vt_src1.VT vt_src1.RC:$src1), (vt_src2.VT
+ (vt_src2.BroadcastLdFrag addr:$src2)))),
+ vt_dst.RC:$src0),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT
+ (MaskOpNode
+ (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT
+ (vt_src2.BroadcastLdFrag addr:$src2)))),
+ vt_dst.ImmAllZerosV)>,
+ EVEX, VVVV, EVEX_B, Sched<[sched]>;
+}
+
+multiclass avx10_convert_3op<bits<8> OpCode, string OpcodeStr,
+ AVX512VLVectorVTInfo vt_dst, AVX512VLVectorVTInfo vt_src,
+ X86SchedWriteWidths sched,
+ SDPatternOperator OpNode,
+ SDPatternOperator MaskOpNode,
+ PatFrag bcast128 = vt_src.info128.BroadcastLdFrag,
+ PatFrag loadVT128 = vt_src.info128.LdFrag,
+ RegisterClass maskRC128 = vt_src.info128.KRCWM> {
+ let Predicates = [HasAVX10_2_512] in
+ defm Z : avx10_convert_3op_packed<OpCode, OpcodeStr, vt_dst.info256,
+ vt_dst.info512, vt_src.info512, OpNode, OpNode, sched.ZMM>,
+ EVEX_V512, EVEX_CD8<16, CD8VF>;
+ let Predicates = [HasAVX10_2] in {
+ defm Z256 : avx10_convert_3op_packed<OpCode, OpcodeStr, vt_dst.info128,
+ vt_dst.info256, vt_src.info256, OpNode, OpNode, sched.YMM>,
+ EVEX_V256, EVEX_CD8<16, CD8VF>;
+ defm Z128 : avx10_convert_3op_packed<OpCode, OpcodeStr, vt_dst.info128,
+ vt_dst.info128, vt_src.info128,
+ null_frag, null_frag, sched.XMM>,
+ EVEX_V128, EVEX_CD8<16, CD8VF>;
+ // Special patterns to allow use of MaskOpNode for masking 128 version. Instruction
+ // patterns have been disabled with null_frag.
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_dst.info128.VT VR128X:$src1),
+ (vt_src.info128.VT VR128X:$src2))),
+ (!cast<Instruction>(NAME # "Z128rr") VR128X:$src1, VR128X:$src2)>;
+ def : Pat<(MaskOpNode (vt_dst.info128.VT VR128X:$src1),
+ (vt_src.info128.VT VR128X:$src2),
+ (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrk") VR128X:$src0, maskRC128:$mask,
+ VR128X:$src1, VR128X:$src2)>;
+ def : Pat<(MaskOpNode (vt_dst.info128.VT VR128X:$src1),
+ (vt_src.info128.VT VR128X:$src2),
+ vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrkz") maskRC128:$mask,
+ VR128X:$src1, VR128X:$src2)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_dst.info128.VT VR128X:$src1),
+ (loadVT128 addr:$src2))),
+ (!cast<Instruction>(NAME # "Z128rm") VR128X:$src1, addr:$src2)>;
+ def : Pat<(MaskOpNode (vt_dst.info128.VT VR128X:$src1),
+ (loadVT128 addr:$src2),
+ (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmk") VR128X:$src0, maskRC128:$mask,
+ VR128X:$src1, addr:$src2)>;
+ def : Pat<(MaskOpNode (vt_dst.info128.VT VR128X:$src1),
+ (loadVT128 addr:$src2),
+ vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmkz") maskRC128:$mask,
+ VR128X:$src1, addr:$src2)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_dst.info128.VT VR128X:$src1),
+ (vt_src.info128.VT (bcast128 addr:$src2)))),
+ (!cast<Instruction>(NAME # "Z128rmb") VR128X:$src1, addr:$src2)>;
+ def : Pat<(MaskOpNode (vt_dst.info128.VT VR128X:$src1),
+ (vt_src.info128.VT (bcast128 addr:$src2)),
+ (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbk") VR128X:$src0, maskRC128:$mask,
+ VR128X:$src1, addr:$src2)>;
+ def : Pat<(MaskOpNode (vt_dst.info128.VT VR128X:$src1),
+ (vt_src.info128.VT (bcast128 addr:$src2)),
+ vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbkz") maskRC128:$mask,
+ VR128X:$src1, addr:$src2)>;
+ }
+}
+
+defm VCVTBIASPH2BF8 : avx10_convert_3op<0x74, "vcvtbiasph2bf8",
+ avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtbiasph2bf8, X86vmcvtbiasph2bf8>,
+ T8, PS;
+defm VCVTBIASPH2BF8S : avx10_convert_3op<0x74, "vcvtbiasph2bf8s",
+ avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtbiasph2bf8s, X86vmcvtbiasph2bf8s>,
+ T_MAP5, PS;
+defm VCVTBIASPH2HF8 : avx10_convert_3op<0x18, "vcvtbiasph2hf8",
+ avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtbiasph2hf8, X86vmcvtbiasph2hf8>,
+ T_MAP5, PS;
+defm VCVTBIASPH2HF8S : avx10_convert_3op<0x1b, "vcvtbiasph2hf8s",
+ avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtbiasph2hf8s, X86vmcvtbiasph2hf8s>,
+ T_MAP5, PS;
+
+multiclass avx10_convert_2op_packed<bits<8> OpCode, string OpcodeStr,
+ X86VectorVTInfo vt_dst, X86VectorVTInfo vt_src, SDPatternOperator OpNode,
+ SDPatternOperator MaskOpNode, X86FoldableSchedWrite sched,
+ string Alias, string Broadcast = vt_src.BroadcastStr,
+ X86MemOperand MemOp = vt_src.MemOp,
+ RegisterClass MaskRC = vt_src.KRCWM,
+ dag LdDAG = (vt_dst.VT (OpNode (vt_src.VT (vt_src.LdFrag addr:$src)))),
+ dag MaskLdDAG = (vt_dst.VT (MaskOpNode (vt_src.VT (vt_src.LdFrag addr:$src))))> {
+ defm rr : AVX512_maskable_cvt<OpCode, MRMSrcReg, vt_dst, (outs vt_dst.RC:$dst),
+ (ins vt_src.RC:$src),
+ (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src.RC:$src),
+ (ins MaskRC:$mask, vt_src.RC:$src),
+ OpcodeStr, "$src", "$src",
+ (vt_dst.VT (OpNode (vt_src.VT vt_src.RC:$src))),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT (MaskOpNode (vt_src.VT vt_src.RC:$src))),
+ vt_dst.RC:$src0),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT (MaskOpNode (vt_src.VT vt_src.RC:$src))),
+ vt_dst.ImmAllZerosV)>, EVEX, Sched<[sched]>;
+
+ defm rm : AVX512_maskable_cvt<OpCode, MRMSrcMem, vt_dst, (outs vt_dst.RC:$dst),
+ (ins MemOp:$src),
+ (ins vt_dst.RC:$src0, MaskRC:$mask, MemOp:$src),
+ (ins MaskRC:$mask, MemOp:$src),
+ OpcodeStr#Alias, "$src", "$src",
+ LdDAG,
+ (vselect_mask MaskRC:$mask, MaskLdDAG, vt_dst.RC:$src0),
+ (vselect_mask MaskRC:$mask, MaskLdDAG, vt_dst.ImmAllZerosV)>,
+ EVEX, Sched<[sched]>;
+
+ defm rmb : AVX512_maskable_cvt<OpCode, MRMSrcMem, vt_dst, (outs vt_dst.RC:$dst),
+ (ins vt_src.ScalarMemOp:$src),
+ (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src.ScalarMemOp:$src),
+ (ins MaskRC:$mask, vt_src.ScalarMemOp:$src), OpcodeStr,
+ "${src}"#Broadcast, "${src}"#Broadcast,
+ (vt_dst.VT (OpNode (vt_src.VT
+ (vt_src.BroadcastLdFrag addr:$src)))),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT
+ (MaskOpNode
+ (vt_src.VT
+ (vt_src.BroadcastLdFrag addr:$src)))),
+ vt_dst.RC:$src0),
+ (vselect_mask MaskRC:$mask,
+ (vt_dst.VT
+ (MaskOpNode
+ (vt_src.VT
+ (vt_src.BroadcastLdFrag addr:$src)))),
+ vt_dst.ImmAllZerosV)>,
+ EVEX, EVEX_B, Sched<[sched]>;
+
+ // Allow rr with the x, y suffix.
+ def : InstAlias<OpcodeStr#Alias#
+ "\t{$src, $dst|$dst, $src}",
+ (!cast<Instruction>(NAME#"rr")
+ vt_dst.RC:$dst, vt_src.RC:$src), 0, "att">;
+ def : InstAlias<OpcodeStr#Alias#
+ "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}",
+ (!cast<Instruction>(NAME#"rrk")
+ vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.RC:$src),
+ 0, "att">;
+ def : InstAlias<OpcodeStr#Alias#
+ "\t{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src}",
+ (!cast<Instruction>(NAME#"rrkz")
+ vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.RC:$src),
+ 0, "att">;
+
+ // Allow rmb with the x, y suffix.
+ def : InstAlias<OpcodeStr#Alias#
+ "\t{${src}"#vt_src.BroadcastStr#", $dst|$dst, ${src}"#
+ vt_src.BroadcastStr#"}",
+ (!cast<Instruction>(NAME#"rmb")
+ vt_dst.RC:$dst, vt_src.ScalarMemOp:$src), 0, "att">;
+ def : InstAlias<OpcodeStr#Alias#
+ "\t{${src}"#vt_src.BroadcastStr#", $dst {${mask}}|"
+ "$dst {${mask}}, ${src}"#vt_src.BroadcastStr#"}",
+ (!cast<Instruction>(NAME#"rmbk")
+ vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.ScalarMemOp:$src),
+ 0, "att">;
+ def : InstAlias<OpcodeStr#Alias#
+ "\t{${src}"#vt_src.BroadcastStr#", $dst {${mask}} {z}|"
+ "$dst {${mask}} {z}, ${src}"#vt_src.BroadcastStr#"}",
+ (!cast<Instruction>(NAME#"rmbkz")
+ vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.ScalarMemOp:$src),
+ 0, "att">;
+}
+
+multiclass avx10_convert_2op<bits<8> OpCode, string OpcodeStr,
+ AVX512VLVectorVTInfo vt_dst, AVX512VLVectorVTInfo vt_src,
+ X86SchedWriteWidths sched,
+ SDPatternOperator OpNode,
+ SDPatternOperator MaskOpNode,
+ PatFrag bcast128 = vt_src.info128.BroadcastLdFrag,
+ PatFrag loadVT128 = vt_src.info128.LdFrag,
+ RegisterClass maskRC128 = vt_src.info128.KRCWM> {
+ let Predicates = [HasAVX10_2_512] in
+ defm Z : avx10_convert_2op_packed<OpCode, OpcodeStr, vt_dst.info256,
+ vt_src.info512, OpNode, OpNode, sched.ZMM,
+ "">,
+ EVEX_V512, EVEX_CD8<16, CD8VF>;
+ let Predicates = [HasAVX10_2] in {
+ defm Z256 : avx10_convert_2op_packed<OpCode, OpcodeStr, vt_dst.info128,
+ vt_src.info256, OpNode, OpNode,
+ sched.YMM, "{y}">,
+ EVEX_V256, EVEX_CD8<16, CD8VF>;
+ defm Z128 : avx10_convert_2op_packed<OpCode, OpcodeStr, vt_dst.info128,
+ vt_src.info128, null_frag, null_frag,
+ sched.XMM, "{x}">,
+ EVEX_V128, EVEX_CD8<16, CD8VF>;
+ // Special patterns to allow use of MaskOpNode for masking 128 version. Instruction
+ // patterns have been disabled with null_frag.
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT VR128X:$src))),
+ (!cast<Instruction>(NAME # "Z128rr") VR128X:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrk") VR128X:$src0, maskRC128:$mask, VR128X:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrkz") maskRC128:$mask, VR128X:$src)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (loadVT128 addr:$src))),
+ (!cast<Instruction>(NAME # "Z128rm") addr:$src)>;
+ def : Pat<(MaskOpNode (loadVT128 addr:$src), (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
+ def : Pat<(MaskOpNode (loadVT128 addr:$src), vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmkz") maskRC128:$mask, addr:$src)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT (bcast128 addr:$src)))),
+ (!cast<Instruction>(NAME # "Z128rmb") addr:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
+ (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
+ vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbkz") maskRC128:$mask, addr:$src)>;
+ }
+}
+
+defm VCVTNEPH2BF8 : avx10_convert_2op<0x74, "vcvtneph2bf8", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2bf8, X86vmcvtneph2bf8>,
+ T8, XS;
+defm VCVTNEPH2BF8S : avx10_convert_2op<0x74, "vcvtneph2bf8s", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2bf8s, X86vmcvtneph2bf8s>,
+ T_MAP5, XS;
+defm VCVTNEPH2HF8 : avx10_convert_2op<0x18, "vcvtneph2hf8", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2hf8, X86vmcvtneph2hf8>,
+ T_MAP5, XS;
+defm VCVTNEPH2HF8S : avx10_convert_2op<0x1b, "vcvtneph2hf8s", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2hf8s, X86vmcvtneph2hf8s>,
+ T_MAP5, XS;
+
+multiclass avx10_convert_2op_nomb_packed<bits<8> opc, string OpcodeStr,
+ X86VectorVTInfo _dest, X86VectorVTInfo _src,
+ SDNode OpNode,
+ X86MemOperand x86memop,
+ X86FoldableSchedWrite sched,
+ dag ld_dag = (load addr:$src)> {
+ let ExeDomain = _dest.ExeDomain in {
+ defm rr : AVX512_maskable_split<opc, MRMSrcReg, _dest ,(outs _dest.RC:$dst),
+ (ins _src.RC:$src), OpcodeStr, "$src", "$src",
+ (OpNode (_src.VT _src.RC:$src)),
+ (OpNode (_src.VT _src.RC:$src))>,
+ Sched<[sched]>;
+ defm rm : AVX512_maskable_split<opc, MRMSrcMem, _dest, (outs _dest.RC:$dst),
+ (ins x86memop:$src), OpcodeStr, "$src", "$src",
+ (OpNode (_src.VT ld_dag)),
+ (OpNode (_src.VT ld_dag))>,
+ Sched<[sched.Folded]>;
+ }
+}
+
+multiclass avx10_convert_2op_nomb<string OpcodeStr, AVX512VLVectorVTInfo _dest,
+ AVX512VLVectorVTInfo _src, bits<8> opc, SDNode OpNode> {
+ let Predicates = [HasAVX10_2_512] in
+ defm Z : avx10_convert_2op_nomb_packed<opc, OpcodeStr, _dest.info512, _src.info256,
+ OpNode, f256mem, WriteCvtPH2PSZ>, EVEX_V512;
+ let Predicates = [HasAVX10_2] in {
+ defm Z128 : avx10_convert_2op_nomb_packed<opc, OpcodeStr, _dest.info128, _src.info128,
+ OpNode, f64mem, WriteCvtPH2PSZ>, EVEX_V128;
+ defm Z256 : avx10_convert_2op_nomb_packed<opc, OpcodeStr, _dest.info256, _src.info128,
+ OpNode, f128mem, WriteCvtPH2PSZ>, EVEX_V256;
+ }
+}
+
+defm VCVTHF82PH : avx10_convert_2op_nomb<"vcvthf82ph", avx512vl_f16_info,
+ avx512vl_i8_info, 0x1e, X86vcvthf82ph>,
+ AVX512XDIi8Base, T_MAP5, EVEX, EVEX_CD8<16, CD8VH>;
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
index 6db1cf7c9ee1fd..308a69f7957cd5 100644
--- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -847,6 +847,91 @@ def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS", SDTFloatToInt>;
def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;
def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;
+def SDTAVX10CONVERT_I82F16 : SDTypeProfile<1, 2, [
+ SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, f16>, SDTCisSameAs<1, 2>
+]>;
+
+def SDTAVX10CONVERT_F16I8 : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, f16>, SDTCVecEltisVT<1, i8>
+]>;
+
+def SDTAVX10CONVERT_I8F16 : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, f16>
+]>;
+
+def SDTAVX10CONVERT_I8F16_MASK : SDTypeProfile<1, 3, [
+ SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, f16>,
+ SDTCisSameAs<0, 2>, SDTCVecEltisVT<3, i1>,
+ SDTCisSameNumEltsAs<1, 3>
+]>;
+
+def SDTAVX10CONVERT_2I8F16 : SDTypeProfile<1, 2, [
+ SDTCVecEltisVT<0, i8>, SDTCVecEltisVT<1, i8>, SDTCVecEltisVT<2, f16>
+]>;
+
+def SDTAVX10CONVERT_2I8F16_MASK : SDTypeProfile<1, 4, [
+ SDTCVecEltisVT<0, i8>, SDTCisSameAs<0, 1>,
+ SDTCVecEltisVT<2, f16>, SDTCisSameAs<0, 3>, SDTCVecEltisVT<4, i1>,
+ SDTCisSameNumEltsAs<2, 4>
+]>;
+
+def X86vcvt2ps2phx : SDNode<"X86ISD::VCVT2PS2PHX",
+ SDTypeProfile<1, 2, [SDTCVecEltisVT<0, f16>,
+ SDTCVecEltisVT<1, f32>,
+ SDTCisSameAs<1,2>]>>;
+def X86vcvt2ps2phxRnd : SDNode<"X86ISD::VCVT2PS2PHX_RND",
+ SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f16>,
+ SDTCVecEltisVT<1, f32>,
+ SDTCisSameAs<1,2>,
+ SDTCisVT<3, i32>]>>;
+// 3op
+def X86vcvtne2ph2bf8 : SDNode<"X86ISD::VCVTNE2PH2BF8",
+ SDTAVX10CONVERT_I82F16>;
+def X86vcvtne2ph2bf8s : SDNode<"X86ISD::VCVTNE2PH2BF8S",
+ SDTAVX10CONVERT_I82F16>;
+def X86vcvtne2ph2hf8 : SDNode<"X86ISD::VCVTNE2PH2HF8",
+ SDTAVX10CONVERT_I82F16>;
+def X86vcvtne2ph2hf8s : SDNode<"X86ISD::VCVTNE2PH2HF8S",
+ SDTAVX10CONVERT_I82F16>;
+// 2op no broadcast
+def X86vcvthf82ph : SDNode<"X86ISD::VCVTHF82PH",
+ SDTAVX10CONVERT_F16I8>;
+
+// 2op
+def X86vcvtbiasph2bf8 : SDNode<"X86ISD::VCVTBIASPH2BF8",
+ SDTAVX10CONVERT_2I8F16>;
+def X86vcvtbiasph2bf8s : SDNode<"X86ISD::VCVTBIASPH2BF8S",
+ SDTAVX10CONVERT_2I8F16>;
+def X86vcvtbiasph2hf8 : SDNode<"X86ISD::VCVTBIASPH2HF8",
+ SDTAVX10CONVERT_2I8F16>;
+def X86vcvtbiasph2hf8s : SDNode<"X86ISD::VCVTBIASPH2HF8S",
+ SDTAVX10CONVERT_2I8F16>;
+def X86vcvtneph2bf8 : SDNode<"X86ISD::VCVTNEPH2BF8",
+ SDTAVX10CONVERT_I8F16>;
+def X86vcvtneph2bf8s : SDNode<"X86ISD::VCVTNEPH2BF8S",
+ SDTAVX10CONVERT_I8F16>;
+def X86vcvtneph2hf8 : SDNode<"X86ISD::VCVTNEPH2HF8",
+ SDTAVX10CONVERT_I8F16>;
+def X86vcvtneph2hf8s : SDNode<"X86ISD::VCVTNEPH2HF8S",
+ SDTAVX10CONVERT_I8F16>;
+
+def X86vmcvtbiasph2bf8 : SDNode<"X86ISD::VMCVTBIASPH2BF8",
+ SDTAVX10CONVERT_2I8F16_MASK>;
+def X86vmcvtbiasph2bf8s : SDNode<"X86ISD::VMCVTBIASPH2BF8S",
+ SDTAVX10CONVERT_2I8F16_MASK>;
+def X86vmcvtbiasph2hf8 : SDNode<"X86ISD::VMCVTBIASPH2HF8",
+ SDTAVX10CONVERT_2I8F16_MASK>;
+def X86vmcvtbiasph2hf8s : SDNode<"X86ISD::VMCVTBIASPH2HF8S",
+ SDTAVX10CONVERT_2I8F16_MASK>;
+def X86vmcvtneph2bf8 : SDNode<"X86ISD::VMCVTNEPH2BF8",
+ SDTAVX10CONVERT_I8F16_MASK>;
+def X86vmcvtneph2bf8s : SDNode<"X86ISD::VMCVTNEPH2BF8S",
+ SDTAVX10CONVERT_I8F16_MASK>;
+def X86vmcvtneph2hf8 : SDNode<"X86ISD::VMCVTNEPH2HF8",
+ SDTAVX10CONVERT_I8F16_MASK>;
+def X86vmcvtneph2hf8s : SDNode<"X86ISD::VMCVTNEPH2HF8S",
+ SDTAVX10CONVERT_I8F16_MASK>;
+
//===----------------------------------------------------------------------===//
// SSE pattern fragments
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 47be08c8af3efe..e6eea35d8eedd0 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -62,6 +62,7 @@ enum IntrinsicType : uint16_t {
INTR_TYPE_3OP_SCALAR_MASK_SAE,
COMPRESS_EXPAND_IN_REG,
TRUNCATE_TO_REG,
+ TRUNCATE2_TO_REG,
CVTPS2PH_MASK,
CVTPD2DQ_MASK,
CVTQQ2PS_MASK,
@@ -394,6 +395,66 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::CMPMM_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcmpps256, CMP_MASK_CC, X86ISD::CMPMM,
X86ISD::CMPMM_SAE),
+ X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_128, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVT2PS2PHX, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8128, TRUNCATE2_TO_REG,
+ X86ISD::VCVTBIASPH2BF8, X86ISD::VMCVTBIASPH2BF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s128, TRUNCATE2_TO_REG,
+ X86ISD::VCVTBIASPH2BF8S, X86ISD::VMCVTBIASPH2BF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8s512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8128, TRUNCATE2_TO_REG,
+ X86ISD::VCVTBIASPH2HF8, X86ISD::VMCVTBIASPH2HF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s128, TRUNCATE2_TO_REG,
+ X86ISD::VCVTBIASPH2HF8S, X86ISD::VMCVTBIASPH2HF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s256, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2hf8s512, INTR_TYPE_2OP_MASK,
+ X86ISD::VCVTBIASPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph128, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTHF82PH, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTHF82PH, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvthf82ph512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTHF82PH, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2BF8, X86ISD::VMCVTNEPH2BF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2BF8S, X86ISD::VMCVTNEPH2BF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2bf8s512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2HF8, X86ISD::VMCVTNEPH2HF8),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s128, TRUNCATE_TO_REG,
+ X86ISD::VCVTNEPH2HF8S, X86ISD::VMCVTNEPH2HF8S),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s256, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_mask_vcvtneph2hf8s512, INTR_TYPE_1OP_MASK,
+ X86ISD::VCVTNEPH2HF8S, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvtpd2dq256, INTR_TYPE_1OP_MASK,
X86ISD::CVTP2SI, X86ISD::CVTP2SI_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtpd2ph256, INTR_TYPE_1OP_MASK,
@@ -594,6 +655,30 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::FADD_RND),
X86_INTRINSIC_DATA(avx10_vaddps256, INTR_TYPE_2OP, ISD::FADD,
X86ISD::FADD_RND),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2bf8s512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2BF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s128, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s256, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8S, 0),
+ X86_INTRINSIC_DATA(avx10_vcvtne2ph2hf8s512, INTR_TYPE_2OP,
+ X86ISD::VCVTNE2PH2HF8S, 0),
X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs128, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
0),
X86_INTRINSIC_DATA(avx10_vcvtnebf162ibs256, INTR_TYPE_1OP, X86ISD::CVTP2IBS,
diff --git a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
new file mode 100644
index 00000000000000..b9febe8f48fa23
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
@@ -0,0 +1,578 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X86
+
+define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512(<16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512:
+; X64: # %bb.0:
+; X64-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512:
+; X86: # %bb.0:
+; X86-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> zeroinitializer, i32 -1, i32 4)
+ ret <32 x half> %ret
+}
+
+define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_mask(<32 x half> %W, i32 %U, <16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x49,0x67,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x49,0x67,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> %W, i32 %U, i32 4)
+ ret <32 x half> %ret
+}
+
+define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round(<16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round:
+; X64: # %bb.0:
+; X64-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x78,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round:
+; X86: # %bb.0:
+; X86-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x78,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> zeroinitializer, i32 -1, i32 11)
+ ret <32 x half> %ret
+}
+
+define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round_mask(<32 x half> %W, i32 %U, <16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx {rz-sae}, %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x79,0x67,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx {rz-sae}, %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x79,0x67,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> %W, i32 %U, i32 11)
+ ret <32 x half> %ret
+}
+
+declare <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx512(<16 x float>, <16 x float>, i32, i32)
+
+define <32 x i8> @test_int_x86_avx10_vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2bf8512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2bf8 %zmm1, %zmm0, %ymm0 # encoding: [0x62,0xf2,0x7c,0x48,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtbiasph2bf8512(<32 x i8> %W, i32 %U, <64 x i8> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8 %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x74,0x49,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8 %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x74,0x49,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B, i32 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8 %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7c,0xc9,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8 %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7c,0xc9,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> zeroinitializer, i32 %U)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbiasph2bf8s512(<64 x i8> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2bf8s512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2bf8s %zmm1, %zmm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x48,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtbiasph2bf8s512(<32 x i8> %W, i32 %U, <64 x i8> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8s %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x74,0x49,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8s %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x74,0x49,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2bf8s512(<64 x i8> %A, <32 x half> %B, i32 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8s %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8s %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> zeroinitializer, i32 %U)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbiasph2hf8512(<64 x i8> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2hf8512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2hf8 %zmm1, %zmm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x48,0x18,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtbiasph2hf8512(<32 x i8> %W, i32 %U, <64 x i8> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8 %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x74,0x49,0x18,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8 %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x74,0x49,0x18,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2hf8512(<64 x i8> %A, <32 x half> %B, i32 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8 %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8 %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8512(<64 x i8> %A, <32 x half> %B, <32 x i8> zeroinitializer, i32 %U)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtbiasph2hf8s512(<64 x i8> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2hf8s512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2hf8s %zmm1, %zmm0, %ymm0 # encoding: [0x62,0xf5,0x7c,0x48,0x1b,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtbiasph2hf8s512(<32 x i8> %W, i32 %U, <64 x i8> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8s %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x74,0x49,0x1b,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8s %zmm2, %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x74,0x49,0x1b,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> %W, i32 %U)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2hf8s512(<64 x i8> %A, <32 x half> %B, i32 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8s %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8s %zmm1, %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xc9,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s512(<64 x i8> %A, <32 x half> %B, <32 x i8> zeroinitializer, i32 %U)
+ ret <32 x i8> %ret
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtne2ph2bf8512(<32 x half> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2bf8512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2bf8 %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7f,0x48,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(<32 x half> %A, <32 x half> %B)
+ ret <64 x i8> %ret
+}
+
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2bf8512_mask(<8 x i64> %C, i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8512_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x49,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8512_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x49,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(<32 x half> %A, <32 x half> %B)
+ %2 = bitcast <8 x i64> %C to <64 x i8>
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> %2
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
+declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(<32 x half> %A, <32 x half> %B)
+
+define <64 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s512(<32 x half> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2bf8s %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(<32 x half> %A, <32 x half> %B)
+ ret <64 x i8> %ret
+}
+
+declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(<32 x half> %A, <32 x half> %B)
+
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2bf8s512_mask(<8 x i64> %C, i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s512_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8s %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x49,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s512_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8s %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x49,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(<32 x half> %A, <32 x half> %B)
+ %2 = bitcast <8 x i64> %C to <64 x i8>
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> %2
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
+define <64 x i8> @test_int_x86_avx10_vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2hf8 %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x18,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B)
+ ret <64 x i8> %ret
+}
+
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2hf8512_mask(<8 x i64> %C, i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8512_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x49,0x18,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8512_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8 %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x49,0x18,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B)
+ %2 = bitcast <8 x i64> %C to <64 x i8>
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> %2
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
+declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B)
+
+define <64 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2hf8s %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x1b,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B)
+ ret <64 x i8> %ret
+}
+
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2hf8s512_mask(<8 x i64> %C, i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s512_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8s %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x49,0x1b,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s512_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8s %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x49,0x1b,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B)
+ %2 = bitcast <8 x i64> %C to <64 x i8>
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> %2
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
+declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B)
+
+define <32 x half> @test_int_x86_avx10_vcvthf82ph512(<32 x i8> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82ph512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82ph %ymm0, %zmm0 # encoding: [0x62,0xf5,0x7f,0x48,0x1e,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(<32 x i8> %A, <32 x half> undef, i32 -1)
+ ret <32 x half> %ret
+}
+
+define <32 x half> @test_int_x86_avx10_mask_vcvthf82ph512(<32 x i8> %A, <32 x half> %B, i32 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvthf82ph512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvthf82ph %ymm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x1e,0xc8]
+; X64-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvthf82ph512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvthf82ph %ymm0, %zmm1 {%k1} # encoding: [0x62,0xf5,0x7f,0x49,0x1e,0xc8]
+; X86-NEXT: vmovdqa64 %zmm1, %zmm0 # encoding: [0x62,0xf1,0xfd,0x48,0x6f,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(<32 x i8> %A, <32 x half> %B, i32 %C)
+ ret <32 x half> %ret
+}
+
+declare <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(<32 x i8> %A, <32 x half> %B, i32 %C)
+
+define <32 x half> @test_int_x86_avx10_maskz_vcvthf82ph512(<32 x i8> %A, i32 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvthf82ph512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvthf82ph %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x1e,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvthf82ph512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvthf82ph %ymm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x1e,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvthf82ph512(<32 x i8> %A, <32 x half> zeroinitializer, i32 %B)
+ ret <32 x half> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtneph2bf8512(<32 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2bf8512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2bf8 %zmm0, %ymm0 # encoding: [0x62,0xf2,0x7e,0x48,0x74,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(<32 x half> %A, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtneph2bf8512(<32 x i8> %B, <32 x half> %A, i32 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x49,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x49,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(<32 x half> %A, <32 x i8> %B, i32 %C)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(<32 x half> %A, <32 x i8> %B, i32 %C)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtneph2bf8512(<32 x half> %A, i32 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xc9,0x74,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xc9,0x74,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8512(<32 x half> %A, <32 x i8> zeroinitializer, i32 %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtneph2bf8s512(<32 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2bf8s512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2bf8s %zmm0, %ymm0 # encoding: [0x62,0xf5,0x7e,0x48,0x74,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(<32 x half> %A, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtneph2bf8s512(<32 x i8> %B, <32 x half> %A, i32 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8s %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8s %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(<32 x half> %A, <32 x i8> %B, i32 %C)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(<32 x half> %A, <32 x i8> %B, i32 %C)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtneph2bf8s512(<32 x half> %A, i32 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8s %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x74,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8s %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x74,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s512(<32 x half> %A, <32 x i8> zeroinitializer, i32 %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtneph2hf8512(<32 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2hf8512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2hf8 %zmm0, %ymm0 # encoding: [0x62,0xf5,0x7e,0x48,0x18,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(<32 x half> %A, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtneph2hf8512(<32 x i8> %B, <32 x half> %A, i32 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8 %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(<32 x half> %A, <32 x i8> %B, i32 %C)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(<32 x half> %A, <32 x i8> %B, i32 %C)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtneph2hf8512(<32 x half> %A, i32 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x18,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8 %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x18,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8512(<32 x half> %A, <32 x i8> zeroinitializer, i32 %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtneph2hf8s512(<32 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2hf8s512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2hf8s %zmm0, %ymm0 # encoding: [0x62,0xf5,0x7e,0x48,0x1b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(<32 x half> %A, <32 x i8> undef, i32 -1)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_mask_vcvtneph2hf8s512(<32 x i8> %B, <32 x half> %A, i32 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8s %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8s %zmm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x49,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(<32 x half> %A, <32 x i8> %B, i32 %C)
+ ret <32 x i8> %ret
+}
+
+declare <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(<32 x half> %A, <32 x i8> %B, i32 %C)
+
+define <32 x i8> @test_int_x86_avx10_maskz_vcvtneph2hf8s512(<32 x half> %A, i32 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8s512:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8s %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x1b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8s512:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8s %zmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xc9,0x1b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s512(<32 x half> %A, <32 x i8> zeroinitializer, i32 %B)
+ ret <32 x i8> %ret
+}
diff --git a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
new file mode 100644
index 00000000000000..6fda46185bb676
--- /dev/null
+++ b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
@@ -0,0 +1,1147 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X86
+
+define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128(<4 x float> %A, <4 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx128:
+; X64: # %bb.0:
+; X64-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x08,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx128:
+; X86: # %bb.0:
+; X86-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x08,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float> %A, <4 x float> %B, <8 x half> zeroinitializer, i8 -1)
+ ret <8 x half> %ret
+}
+
+define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128_mask(<8 x half> %W, i8 %U, <4 x float> %A, <4 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx128_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0x67,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx128_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0x67,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float> %A, <4 x float> %B, <8 x half> %W, i8 %U)
+ ret <8 x half> %ret
+}
+
+declare <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float>, <4 x float>, <8 x half>, i8)
+
+define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256(<8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256:
+; X64: # %bb.0:
+; X64-NEXT: vcvt2ps2phx %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7d,0x28,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256:
+; X86: # %bb.0:
+; X86-NEXT: vcvt2ps2phx %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7d,0x28,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> zeroinitializer, i16 -1, i32 4)
+ ret <16 x half> %ret
+}
+
+define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_mask(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x75,0x29,0x67,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x75,0x29,0x67,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> %W, i16 %U, i32 4)
+ ret <16 x half> %ret
+}
+
+define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round(<8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round:
+; X64: # %bb.0:
+; X64-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x79,0x78,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round:
+; X86: # %bb.0:
+; X86-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x79,0x78,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> zeroinitializer, i16 -1, i32 11)
+ ret <16 x half> %ret
+}
+
+define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round_mask(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx {rz-sae}, %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x71,0x79,0x67,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx {rz-sae}, %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x71,0x79,0x67,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> %W, i16 %U, i32 11)
+ ret <16 x half> %ret
+}
+
+declare <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float>, <8 x float>, <16 x half>, i16, i32)
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2bf8128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2bf8 %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7c,0x08,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2bf8128(<16 x i8> %W, <16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x74,0x09,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x74,0x09,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7c,0x89,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7c,0x89,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> zeroinitializer, i8 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2bf8256(<32 x i8> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2bf8256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2bf8 %ymm1, %ymm0, %xmm0 # encoding: [0x62,0xf2,0x7c,0x28,0x74,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2bf8256(<16 x i8> %W, <32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8 %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x74,0x29,0x74,0xc2]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8 %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x74,0x29,0x74,0xc2]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2bf8256(<32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8 %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7c,0xa9,0x74,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8 %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7c,0xa9,0x74,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> zeroinitializer, i16 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2bf8s128(<16 x i8> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2bf8s128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2bf8s %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2bf8s128(<16 x i8> %W, <16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x09,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x09,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2bf8s128(<16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> zeroinitializer, i8 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2bf8s256(<32 x i8> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2bf8s256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2bf8s %ymm1, %ymm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x28,0x74,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2bf8s256(<16 x i8> %W, <32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8s %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x29,0x74,0xc2]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2bf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8s %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x29,0x74,0xc2]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2bf8s256(<32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2bf8s %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x74,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2bf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2bf8s %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x74,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> zeroinitializer, i16 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2hf8128(<16 x i8> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2hf8128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2hf8 %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x18,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2hf8128(<16 x i8> %W, <16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x09,0x18,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x09,0x18,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2hf8128(<16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8128(<16 x i8> %A, <8 x half> %B, <16 x i8> zeroinitializer, i8 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2hf8256(<32 x i8> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2hf8256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2hf8 %ymm1, %ymm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x28,0x18,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2hf8256(<16 x i8> %W, <32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8 %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x29,0x18,0xc2]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8 %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x29,0x18,0xc2]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2hf8256(<32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8 %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x18,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8 %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x18,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8256(<32 x i8> %A, <16 x half> %B, <16 x i8> zeroinitializer, i16 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2hf8s128(<16 x i8> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2hf8s128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2hf8s %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x08,0x1b,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2hf8s128(<16 x i8> %W, <16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x09,0x1b,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x09,0x1b,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> %W, i8 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2hf8s128(<16 x i8> %A, <8 x half> %B, i8 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0x89,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s128(<16 x i8> %A, <8 x half> %B, <16 x i8> zeroinitializer, i8 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtbiasph2hf8s256(<32 x i8> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtbiasph2hf8s256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtbiasph2hf8s %ymm1, %ymm0, %xmm0 # encoding: [0x62,0xf5,0x7c,0x28,0x1b,0xc1]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtbiasph2hf8s256(<16 x i8> %W, <32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8s %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x29,0x1b,0xc2]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtbiasph2hf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8s %ymm2, %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x74,0x29,0x1b,0xc2]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> %W, i16 %U)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtbiasph2hf8s256(<32 x i8> %A, <16 x half> %B, i16 %U) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtbiasph2hf8s %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x1b,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtbiasph2hf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtbiasph2hf8s %ymm1, %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7c,0xa9,0x1b,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2hf8s256(<32 x i8> %A, <16 x half> %B, <16 x i8> zeroinitializer, i16 %U)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8128(<8 x half> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2bf8128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2bf8 %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7f,0x08,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(<8 x half> %A, <8 x half> %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8128_mask(<16 x i8> %C, i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8128_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x09,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8128_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x77,0x09,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %C
+ ret <16 x i8> %3
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(<8 x half> %A, <8 x half> %B)
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2bf8256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2bf8 %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7f,0x28,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8256_mask(<32 x i8> %C, i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8256_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8 %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x77,0x29,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8256_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8 %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x77,0x29,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %C
+ ret <32 x i8> %3
+}
+
+declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B)
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2bf8s %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s128_mask(<16 x i8> %C, i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s128_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x09,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s128_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x09,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %C
+ ret <16 x i8> %3
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B)
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2bf8s %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x74,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s256_mask(<32 x i8> %C, i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s256_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8s %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x77,0x29,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s256_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8s %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x77,0x29,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %C
+ ret <32 x i8> %3
+}
+
+declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B)
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2hf8 %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x18,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8128_mask(<16 x i8> %C, i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8128_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x09,0x18,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8128_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8 %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x09,0x18,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %C
+ ret <16 x i8> %3
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B)
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2hf8 %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x18,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8256_mask(<32 x i8> %C, i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8256_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8 %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x77,0x29,0x18,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8256_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8 %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x77,0x29,0x18,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %C
+ ret <32 x i8> %3
+}
+
+declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B)
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2hf8s %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x1b,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s128_mask(<16 x i8> %C, i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s128_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x09,0x1b,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s128_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8s %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x77,0x09,0x1b,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> %C
+ ret <16 x i8> %3
+}
+
+declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B)
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtne2ph2hf8s %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x1b,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B)
+ ret <32 x i8> %ret
+}
+
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s256_mask(<32 x i8> %C, i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s256_mask:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8s %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x77,0x29,0x1b,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s256_mask:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8s %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf5,0x77,0x29,0x1b,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> %C
+ ret <32 x i8> %3
+}
+
+declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B)
+
+define <8 x half> @test_int_x86_avx10_vcvthf82ph128(<16 x i8> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82ph128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82ph %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7f,0x08,0x1e,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(<16 x i8> %A, <8 x half> undef, i8 -1)
+ ret <8 x half> %ret
+}
+
+define <8 x half> @test_int_x86_avx10_mask_vcvthf82ph128(<16 x i8> %A, <8 x half> %B, i8 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvthf82ph128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvthf82ph %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x1e,0xc8]
+; X64-NEXT: vmovdqa %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvthf82ph128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvthf82ph %xmm0, %xmm1 {%k1} # encoding: [0x62,0xf5,0x7f,0x09,0x1e,0xc8]
+; X86-NEXT: vmovdqa %xmm1, %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf9,0x6f,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(<16 x i8> %A, <8 x half> %B, i8 %C)
+ ret <8 x half> %ret
+}
+
+declare <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(<16 x i8> %A, <8 x half> %B, i8 %C)
+
+define <8 x half> @test_int_x86_avx10_maskz_vcvthf82ph128(<16 x i8> %A, i8 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvthf82ph128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvthf82ph %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x1e,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvthf82ph128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvthf82ph %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x1e,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <8 x half> @llvm.x86.avx10.mask.vcvthf82ph128(<16 x i8> %A, <8 x half> zeroinitializer, i8 %B)
+ ret <8 x half> %ret
+}
+
+define <16 x half> @test_int_x86_avx10_vcvthf82ph256(<16 x i8> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvthf82ph256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvthf82ph %xmm0, %ymm0 # encoding: [0x62,0xf5,0x7f,0x28,0x1e,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(<16 x i8> %A, <16 x half> undef, i16 -1)
+ ret <16 x half> %ret
+}
+
+define <16 x half> @test_int_x86_avx10_mask_vcvthf82ph256(<16 x i8> %A, <16 x half> %B, i16 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvthf82ph256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvthf82ph %xmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x1e,0xc8]
+; X64-NEXT: vmovdqa %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvthf82ph256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvthf82ph %xmm0, %ymm1 {%k1} # encoding: [0x62,0xf5,0x7f,0x29,0x1e,0xc8]
+; X86-NEXT: vmovdqa %ymm1, %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfd,0x6f,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(<16 x i8> %A, <16 x half> %B, i16 %C)
+ ret <16 x half> %ret
+}
+
+declare <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(<16 x i8> %A, <16 x half> %B, i16 %C)
+
+define <16 x half> @test_int_x86_avx10_maskz_vcvthf82ph256(<16 x i8> %A, i16 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvthf82ph256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvthf82ph %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x1e,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvthf82ph256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvthf82ph %xmm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x1e,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvthf82ph256(<16 x i8> %A, <16 x half> zeroinitializer, i16 %B)
+ ret <16 x half> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2bf8128(<8 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2bf8128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2bf8 %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7e,0x08,0x74,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(<8 x half> %A, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2bf8128(<16 x i8> %B, <8 x half> %A, i8 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x09,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x09,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(<8 x half> %A, <16 x i8> %B, i8 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(<8 x half> %A, <16 x i8> %B, i8 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2bf8128(<8 x half> %A, i8 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8 %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0x89,0x74,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8 %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0x89,0x74,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8128(<8 x half> %A, <16 x i8> zeroinitializer, i8 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2bf8256(<16 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2bf8256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2bf8 %ymm0, %xmm0 # encoding: [0x62,0xf2,0x7e,0x28,0x74,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(<16 x half> %A, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2bf8256(<16 x i8> %B, <16 x half> %A, i16 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8 %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x29,0x74,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8 %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x7e,0x29,0x74,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(<16 x half> %A, <16 x i8> %B, i16 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(<16 x half> %A, <16 x i8> %B, i16 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2bf8256(<16 x half> %A, i16 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8 %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xa9,0x74,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8 %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7e,0xa9,0x74,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8256(<16 x half> %A, <16 x i8> zeroinitializer, i16 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2bf8s128(<8 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2bf8s128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2bf8s %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7e,0x08,0x74,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(<8 x half> %A, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2bf8s128(<16 x i8> %B, <8 x half> %A, i8 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8s %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8s %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(<8 x half> %A, <16 x i8> %B, i8 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(<8 x half> %A, <16 x i8> %B, i8 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2bf8s128(<8 x half> %A, i8 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8s %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x74,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8s %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x74,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s128(<8 x half> %A, <16 x i8> zeroinitializer, i8 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2bf8s256(<16 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2bf8s256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2bf8s %ymm0, %xmm0 # encoding: [0x62,0xf5,0x7e,0x28,0x74,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(<16 x half> %A, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2bf8s256(<16 x i8> %B, <16 x half> %A, i16 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8s %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x74,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2bf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8s %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x74,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(<16 x half> %A, <16 x i8> %B, i16 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(<16 x half> %A, <16 x i8> %B, i16 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2bf8s256(<16 x half> %A, i16 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2bf8s %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x74,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2bf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2bf8s %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x74,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2bf8s256(<16 x half> %A, <16 x i8> zeroinitializer, i16 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2hf8128(<8 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2hf8128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2hf8 %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7e,0x08,0x18,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(<8 x half> %A, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2hf8128(<16 x i8> %B, <8 x half> %A, i8 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8 %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(<8 x half> %A, <16 x i8> %B, i8 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(<8 x half> %A, <16 x i8> %B, i8 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2hf8128(<8 x half> %A, i8 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8 %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x18,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8 %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x18,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8128(<8 x half> %A, <16 x i8> zeroinitializer, i8 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2hf8256(<16 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2hf8256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2hf8 %ymm0, %xmm0 # encoding: [0x62,0xf5,0x7e,0x28,0x18,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(<16 x half> %A, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2hf8256(<16 x i8> %B, <16 x half> %A, i16 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8 %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x18,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8 %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x18,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(<16 x half> %A, <16 x i8> %B, i16 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(<16 x half> %A, <16 x i8> %B, i16 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2hf8256(<16 x half> %A, i16 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8 %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x18,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8 %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x18,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8256(<16 x half> %A, <16 x i8> zeroinitializer, i16 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2hf8s128(<8 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2hf8s128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2hf8s %xmm0, %xmm0 # encoding: [0x62,0xf5,0x7e,0x08,0x1b,0xc0]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(<8 x half> %A, <16 x i8> undef, i8 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2hf8s128(<16 x i8> %B, <8 x half> %A, i8 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8s %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8s %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x09,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(<8 x half> %A, <16 x i8> %B, i8 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(<8 x half> %A, <16 x i8> %B, i8 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2hf8s128(<8 x half> %A, i8 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8s128:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8s %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x1b,0xc0]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8s128:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8s %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0x89,0x1b,0xc0]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s128(<8 x half> %A, <16 x i8> zeroinitializer, i8 %B)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_vcvtneph2hf8s256(<16 x half> %A) nounwind {
+; CHECK-LABEL: test_int_x86_avx10_vcvtneph2hf8s256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvtneph2hf8s %ymm0, %xmm0 # encoding: [0x62,0xf5,0x7e,0x28,0x1b,0xc0]
+; CHECK-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(<16 x half> %A, <16 x i8> undef, i16 -1)
+ ret <16 x i8> %ret
+}
+
+define <16 x i8> @test_int_x86_avx10_mask_vcvtneph2hf8s256(<16 x i8> %B, <16 x half> %A, i16 %C) nounwind {
+; X64-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8s %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x1b,0xc1]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_mask_vcvtneph2hf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8s %ymm1, %xmm0 {%k1} # encoding: [0x62,0xf5,0x7e,0x29,0x1b,0xc1]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(<16 x half> %A, <16 x i8> %B, i16 %C)
+ ret <16 x i8> %ret
+}
+
+declare <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(<16 x half> %A, <16 x i8> %B, i16 %C)
+
+define <16 x i8> @test_int_x86_avx10_maskz_vcvtneph2hf8s256(<16 x half> %A, i16 %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8s256:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtneph2hf8s %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x1b,0xc0]
+; X64-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_maskz_vcvtneph2hf8s256:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtneph2hf8s %ymm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7e,0xa9,0x1b,0xc0]
+; X86-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x i8> @llvm.x86.avx10.mask.vcvtneph2hf8s256(<16 x half> %A, <16 x i8> zeroinitializer, i16 %B)
+ ret <16 x i8> %ret
+}
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt b/llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
new file mode 100644
index 00000000000000..71506201cffe83
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx10.2convert-32.txt
@@ -0,0 +1,1491 @@
+# RUN: llvm-mc --disassemble %s -triple=i386 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=i386 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: vcvt2ps2phx %ymm4, %ymm3, %ymm2
+# INTEL: vcvt2ps2phx ymm2, ymm3, ymm4
+0x62,0xf2,0x65,0x28,0x67,0xd4
+
+# ATT: vcvt2ps2phx {rn-sae}, %ymm4, %ymm3, %ymm2
+# INTEL: vcvt2ps2phx ymm2, ymm3, ymm4, {rn-sae}
+0x62,0xf2,0x61,0x18,0x67,0xd4
+
+# ATT: vcvt2ps2phx %ymm4, %ymm3, %ymm2 {%k7}
+# INTEL: vcvt2ps2phx ymm2 {k7}, ymm3, ymm4
+0x62,0xf2,0x65,0x2f,0x67,0xd4
+
+# ATT: vcvt2ps2phx {rz-sae}, %ymm4, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvt2ps2phx ymm2 {k7} {z}, ymm3, ymm4, {rz-sae}
+0x62,0xf2,0x61,0xff,0x67,0xd4
+
+# ATT: vcvt2ps2phx %zmm4, %zmm3, %zmm2
+# INTEL: vcvt2ps2phx zmm2, zmm3, zmm4
+0x62,0xf2,0x65,0x48,0x67,0xd4
+
+# ATT: vcvt2ps2phx {rn-sae}, %zmm4, %zmm3, %zmm2
+# INTEL: vcvt2ps2phx zmm2, zmm3, zmm4, {rn-sae}
+0x62,0xf2,0x65,0x18,0x67,0xd4
+
+# ATT: vcvt2ps2phx %zmm4, %zmm3, %zmm2 {%k7}
+# INTEL: vcvt2ps2phx zmm2 {k7}, zmm3, zmm4
+0x62,0xf2,0x65,0x4f,0x67,0xd4
+
+# ATT: vcvt2ps2phx {rz-sae}, %zmm4, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvt2ps2phx zmm2 {k7} {z}, zmm3, zmm4, {rz-sae}
+0x62,0xf2,0x65,0xff,0x67,0xd4
+
+# ATT: vcvt2ps2phx %xmm4, %xmm3, %xmm2
+# INTEL: vcvt2ps2phx xmm2, xmm3, xmm4
+0x62,0xf2,0x65,0x08,0x67,0xd4
+
+# ATT: vcvt2ps2phx %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvt2ps2phx xmm2 {k7}, xmm3, xmm4
+0x62,0xf2,0x65,0x0f,0x67,0xd4
+
+# ATT: vcvt2ps2phx %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvt2ps2phx xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf2,0x65,0x8f,0x67,0xd4
+
+# ATT: vcvt2ps2phx 268435456(%esp,%esi,8), %zmm3, %zmm2
+# INTEL: vcvt2ps2phx zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x65,0x48,0x67,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvt2ps2phx 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+# INTEL: vcvt2ps2phx zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x65,0x4f,0x67,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvt2ps2phx (%eax){1to16}, %zmm3, %zmm2
+# INTEL: vcvt2ps2phx zmm2, zmm3, dword ptr [eax]{1to16}
+0x62,0xf2,0x65,0x58,0x67,0x10
+
+# ATT: vcvt2ps2phx -2048(,%ebp,2), %zmm3, %zmm2
+# INTEL: vcvt2ps2phx zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x65,0x48,0x67,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvt2ps2phx 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvt2ps2phx zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x65,0xcf,0x67,0x51,0x7f
+
+# ATT: vcvt2ps2phx -512(%edx){1to16}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvt2ps2phx zmm2 {k7} {z}, zmm3, dword ptr [edx - 512]{1to16}
+0x62,0xf2,0x65,0xdf,0x67,0x52,0x80
+
+# ATT: vcvt2ps2phx 268435456(%esp,%esi,8), %ymm3, %ymm2
+# INTEL: vcvt2ps2phx ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x65,0x28,0x67,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvt2ps2phx 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+# INTEL: vcvt2ps2phx ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x65,0x2f,0x67,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvt2ps2phx (%eax){1to8}, %ymm3, %ymm2
+# INTEL: vcvt2ps2phx ymm2, ymm3, dword ptr [eax]{1to8}
+0x62,0xf2,0x65,0x38,0x67,0x10
+
+# ATT: vcvt2ps2phx -1024(,%ebp,2), %ymm3, %ymm2
+# INTEL: vcvt2ps2phx ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x65,0x28,0x67,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvt2ps2phx 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvt2ps2phx ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x65,0xaf,0x67,0x51,0x7f
+
+# ATT: vcvt2ps2phx -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvt2ps2phx ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
+0x62,0xf2,0x65,0xbf,0x67,0x52,0x80
+
+# ATT: vcvt2ps2phx 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvt2ps2phx xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x65,0x08,0x67,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvt2ps2phx 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvt2ps2phx xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x65,0x0f,0x67,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvt2ps2phx (%eax){1to4}, %xmm3, %xmm2
+# INTEL: vcvt2ps2phx xmm2, xmm3, dword ptr [eax]{1to4}
+0x62,0xf2,0x65,0x18,0x67,0x10
+
+# ATT: vcvt2ps2phx -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvt2ps2phx xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x65,0x08,0x67,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvt2ps2phx 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvt2ps2phx xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x65,0x8f,0x67,0x51,0x7f
+
+# ATT: vcvt2ps2phx -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvt2ps2phx xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
+0x62,0xf2,0x65,0x9f,0x67,0x52,0x80
+
+# ATT: vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8 ymm2, zmm3, zmm4
+0x62,0xf2,0x64,0x48,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2bf8 ymm2 {k7}, zmm3, zmm4
+0x62,0xf2,0x64,0x4f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, zmm4
+0x62,0xf2,0x64,0xcf,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, xmm3, xmm4
+0x62,0xf2,0x64,0x08,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7}, xmm3, xmm4
+0x62,0xf2,0x64,0x0f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf2,0x64,0x8f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, ymm3, ymm4
+0x62,0xf2,0x64,0x28,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7}, ymm3, ymm4
+0x62,0xf2,0x64,0x2f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, ymm4
+0x62,0xf2,0x64,0xaf,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8 268435456(%esp,%esi,8), %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x64,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x64,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 (%eax){1to16}, %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf2,0x64,0x38,0x74,0x10
+
+# ATT: vcvtbiasph2bf8 -1024(,%ebp,2), %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x64,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2bf8 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x64,0xaf,0x74,0x51,0x7f
+
+# ATT: vcvtbiasph2bf8 -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf2,0x64,0xbf,0x74,0x52,0x80
+
+# ATT: vcvtbiasph2bf8 268435456(%esp,%esi,8), %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8 ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x64,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2bf8 ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x64,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 (%eax){1to32}, %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8 ymm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf2,0x64,0x58,0x74,0x10
+
+# ATT: vcvtbiasph2bf8 -2048(,%ebp,2), %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8 ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x64,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2bf8 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x64,0xcf,0x74,0x51,0x7f
+
+# ATT: vcvtbiasph2bf8 -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf2,0x64,0xdf,0x74,0x52,0x80
+
+# ATT: vcvtbiasph2bf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x64,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x64,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf2,0x64,0x18,0x74,0x10
+
+# ATT: vcvtbiasph2bf8 -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x64,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2bf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x64,0x8f,0x74,0x51,0x7f
+
+# ATT: vcvtbiasph2bf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf2,0x64,0x9f,0x74,0x52,0x80
+
+# ATT: vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8s ymm2, zmm3, zmm4
+0x62,0xf5,0x64,0x48,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2bf8s ymm2 {k7}, zmm3, zmm4
+0x62,0xf5,0x64,0x4f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, zmm4
+0x62,0xf5,0x64,0xcf,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, xmm3, xmm4
+0x62,0xf5,0x64,0x08,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7}, xmm3, xmm4
+0x62,0xf5,0x64,0x0f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf5,0x64,0x8f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, ymm3, ymm4
+0x62,0xf5,0x64,0x28,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7}, ymm3, ymm4
+0x62,0xf5,0x64,0x2f,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, ymm4
+0x62,0xf5,0x64,0xaf,0x74,0xd4
+
+# ATT: vcvtbiasph2bf8s 268435456(%esp,%esi,8), %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8s 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s (%eax){1to16}, %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf5,0x64,0x38,0x74,0x10
+
+# ATT: vcvtbiasph2bf8s -1024(,%ebp,2), %ymm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x64,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2bf8s 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x64,0xaf,0x74,0x51,0x7f
+
+# ATT: vcvtbiasph2bf8s -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x64,0xbf,0x74,0x52,0x80
+
+# ATT: vcvtbiasph2bf8s 268435456(%esp,%esi,8), %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8s ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8s 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2bf8s ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s (%eax){1to32}, %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8s ymm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf5,0x64,0x58,0x74,0x10
+
+# ATT: vcvtbiasph2bf8s -2048(,%ebp,2), %zmm3, %ymm2
+# INTEL: vcvtbiasph2bf8s ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x64,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2bf8s 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x64,0xcf,0x74,0x51,0x7f
+
+# ATT: vcvtbiasph2bf8s -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x64,0xdf,0x74,0x52,0x80
+
+# ATT: vcvtbiasph2bf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf5,0x64,0x18,0x74,0x10
+
+# ATT: vcvtbiasph2bf8s -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtbiasph2bf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x64,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2bf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x64,0x8f,0x74,0x51,0x7f
+
+# ATT: vcvtbiasph2bf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x64,0x9f,0x74,0x52,0x80
+
+# ATT: vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8 ymm2, zmm3, zmm4
+0x62,0xf5,0x64,0x48,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2hf8 ymm2 {k7}, zmm3, zmm4
+0x62,0xf5,0x64,0x4f,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, zmm4
+0x62,0xf5,0x64,0xcf,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, xmm3, xmm4
+0x62,0xf5,0x64,0x08,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7}, xmm3, xmm4
+0x62,0xf5,0x64,0x0f,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf5,0x64,0x8f,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, ymm3, ymm4
+0x62,0xf5,0x64,0x28,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7}, ymm3, ymm4
+0x62,0xf5,0x64,0x2f,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, ymm4
+0x62,0xf5,0x64,0xaf,0x18,0xd4
+
+# ATT: vcvtbiasph2hf8 268435456(%esp,%esi,8), %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x28,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x2f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 (%eax){1to16}, %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf5,0x64,0x38,0x18,0x10
+
+# ATT: vcvtbiasph2hf8 -1024(,%ebp,2), %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x64,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2hf8 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x64,0xaf,0x18,0x51,0x7f
+
+# ATT: vcvtbiasph2hf8 -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x64,0xbf,0x18,0x52,0x80
+
+# ATT: vcvtbiasph2hf8 268435456(%esp,%esi,8), %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8 ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2hf8 ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 (%eax){1to32}, %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8 ymm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf5,0x64,0x58,0x18,0x10
+
+# ATT: vcvtbiasph2hf8 -2048(,%ebp,2), %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8 ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x64,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2hf8 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x64,0xcf,0x18,0x51,0x7f
+
+# ATT: vcvtbiasph2hf8 -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x64,0xdf,0x18,0x52,0x80
+
+# ATT: vcvtbiasph2hf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf5,0x64,0x18,0x18,0x10
+
+# ATT: vcvtbiasph2hf8 -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x64,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2hf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x64,0x8f,0x18,0x51,0x7f
+
+# ATT: vcvtbiasph2hf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x64,0x9f,0x18,0x52,0x80
+
+# ATT: vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8s ymm2, zmm3, zmm4
+0x62,0xf5,0x64,0x48,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2hf8s ymm2 {k7}, zmm3, zmm4
+0x62,0xf5,0x64,0x4f,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, zmm4
+0x62,0xf5,0x64,0xcf,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, xmm3, xmm4
+0x62,0xf5,0x64,0x08,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7}, xmm3, xmm4
+0x62,0xf5,0x64,0x0f,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf5,0x64,0x8f,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, ymm3, ymm4
+0x62,0xf5,0x64,0x28,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7}, ymm3, ymm4
+0x62,0xf5,0x64,0x2f,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, ymm4
+0x62,0xf5,0x64,0xaf,0x1b,0xd4
+
+# ATT: vcvtbiasph2hf8s 268435456(%esp,%esi,8), %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x28,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8s 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x2f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s (%eax){1to16}, %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf5,0x64,0x38,0x1b,0x10
+
+# ATT: vcvtbiasph2hf8s -1024(,%ebp,2), %ymm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x64,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2hf8s 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x64,0xaf,0x1b,0x51,0x7f
+
+# ATT: vcvtbiasph2hf8s -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x64,0xbf,0x1b,0x52,0x80
+
+# ATT: vcvtbiasph2hf8s 268435456(%esp,%esi,8), %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8s ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8s 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+# INTEL: vcvtbiasph2hf8s ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s (%eax){1to32}, %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8s ymm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf5,0x64,0x58,0x1b,0x10
+
+# ATT: vcvtbiasph2hf8s -2048(,%ebp,2), %zmm3, %ymm2
+# INTEL: vcvtbiasph2hf8s ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x64,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2hf8s 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x64,0xcf,0x1b,0x51,0x7f
+
+# ATT: vcvtbiasph2hf8s -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x64,0xdf,0x1b,0x52,0x80
+
+# ATT: vcvtbiasph2hf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x64,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x64,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf5,0x64,0x18,0x1b,0x10
+
+# ATT: vcvtbiasph2hf8s -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtbiasph2hf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x64,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2hf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x64,0x8f,0x1b,0x51,0x7f
+
+# ATT: vcvtbiasph2hf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x64,0x9f,0x1b,0x52,0x80
+
+# ATT: vcvthf82ph %xmm3, %xmm2
+# INTEL: vcvthf82ph xmm2, xmm3
+0x62,0xf5,0x7f,0x08,0x1e,0xd3
+
+# ATT: vcvthf82ph %xmm3, %xmm2 {%k7}
+# INTEL: vcvthf82ph xmm2 {k7}, xmm3
+0x62,0xf5,0x7f,0x0f,0x1e,0xd3
+
+# ATT: vcvthf82ph %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvthf82ph xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7f,0x8f,0x1e,0xd3
+
+# ATT: vcvthf82ph %xmm3, %ymm2
+# INTEL: vcvthf82ph ymm2, xmm3
+0x62,0xf5,0x7f,0x28,0x1e,0xd3
+
+# ATT: vcvthf82ph %xmm3, %ymm2 {%k7}
+# INTEL: vcvthf82ph ymm2 {k7}, xmm3
+0x62,0xf5,0x7f,0x2f,0x1e,0xd3
+
+# ATT: vcvthf82ph %xmm3, %ymm2 {%k7} {z}
+# INTEL: vcvthf82ph ymm2 {k7} {z}, xmm3
+0x62,0xf5,0x7f,0xaf,0x1e,0xd3
+
+# ATT: vcvthf82ph %ymm3, %zmm2
+# INTEL: vcvthf82ph zmm2, ymm3
+0x62,0xf5,0x7f,0x48,0x1e,0xd3
+
+# ATT: vcvthf82ph %ymm3, %zmm2 {%k7}
+# INTEL: vcvthf82ph zmm2 {k7}, ymm3
+0x62,0xf5,0x7f,0x4f,0x1e,0xd3
+
+# ATT: vcvthf82ph %ymm3, %zmm2 {%k7} {z}
+# INTEL: vcvthf82ph zmm2 {k7} {z}, ymm3
+0x62,0xf5,0x7f,0xcf,0x1e,0xd3
+
+# ATT: vcvthf82ph 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvthf82ph xmm2, qword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x08,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvthf82ph 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvthf82ph xmm2 {k7}, qword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x0f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvthf82ph (%eax), %xmm2
+# INTEL: vcvthf82ph xmm2, qword ptr [eax]
+0x62,0xf5,0x7f,0x08,0x1e,0x10
+
+# ATT: vcvthf82ph -256(,%ebp,2), %xmm2
+# INTEL: vcvthf82ph xmm2, qword ptr [2*ebp - 256]
+0x62,0xf5,0x7f,0x08,0x1e,0x14,0x6d,0x00,0xff,0xff,0xff
+
+# ATT: vcvthf82ph 1016(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvthf82ph xmm2 {k7} {z}, qword ptr [ecx + 1016]
+0x62,0xf5,0x7f,0x8f,0x1e,0x51,0x7f
+
+# ATT: vcvthf82ph -1024(%edx), %xmm2 {%k7} {z}
+# INTEL: vcvthf82ph xmm2 {k7} {z}, qword ptr [edx - 1024]
+0x62,0xf5,0x7f,0x8f,0x1e,0x52,0x80
+
+# ATT: vcvthf82ph 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvthf82ph ymm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x28,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvthf82ph 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvthf82ph ymm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x2f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvthf82ph (%eax), %ymm2
+# INTEL: vcvthf82ph ymm2, xmmword ptr [eax]
+0x62,0xf5,0x7f,0x28,0x1e,0x10
+
+# ATT: vcvthf82ph -512(,%ebp,2), %ymm2
+# INTEL: vcvthf82ph ymm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7f,0x28,0x1e,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvthf82ph 2032(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvthf82ph ymm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7f,0xaf,0x1e,0x51,0x7f
+
+# ATT: vcvthf82ph -2048(%edx), %ymm2 {%k7} {z}
+# INTEL: vcvthf82ph ymm2 {k7} {z}, xmmword ptr [edx - 2048]
+0x62,0xf5,0x7f,0xaf,0x1e,0x52,0x80
+
+# ATT: vcvthf82ph 268435456(%esp,%esi,8), %zmm2
+# INTEL: vcvthf82ph zmm2, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7f,0x48,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvthf82ph 291(%edi,%eax,4), %zmm2 {%k7}
+# INTEL: vcvthf82ph zmm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7f,0x4f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvthf82ph (%eax), %zmm2
+# INTEL: vcvthf82ph zmm2, ymmword ptr [eax]
+0x62,0xf5,0x7f,0x48,0x1e,0x10
+
+# ATT: vcvthf82ph -1024(,%ebp,2), %zmm2
+# INTEL: vcvthf82ph zmm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7f,0x48,0x1e,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvthf82ph 4064(%ecx), %zmm2 {%k7} {z}
+# INTEL: vcvthf82ph zmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7f,0xcf,0x1e,0x51,0x7f
+
+# ATT: vcvthf82ph -4096(%edx), %zmm2 {%k7} {z}
+# INTEL: vcvthf82ph zmm2 {k7} {z}, ymmword ptr [edx - 4096]
+0x62,0xf5,0x7f,0xcf,0x1e,0x52,0x80
+
+# ATT: vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8 ymm2, ymm3, ymm4
+0x62,0xf2,0x67,0x28,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2bf8 ymm2 {k7}, ymm3, ymm4
+0x62,0xf2,0x67,0x2f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, ymm4
+0x62,0xf2,0x67,0xaf,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8 zmm2, zmm3, zmm4
+0x62,0xf2,0x67,0x48,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2bf8 zmm2 {k7}, zmm3, zmm4
+0x62,0xf2,0x67,0x4f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, zmm4
+0x62,0xf2,0x67,0xcf,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8 xmm2, xmm3, xmm4
+0x62,0xf2,0x67,0x08,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2bf8 xmm2 {k7}, xmm3, xmm4
+0x62,0xf2,0x67,0x0f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf2,0x67,0x8f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8 268435456(%esp,%esi,8), %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x67,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2bf8 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x67,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 (%eax){1to32}, %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8 zmm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf2,0x67,0x58,0x74,0x10
+
+# ATT: vcvtne2ph2bf8 -2048(,%ebp,2), %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x67,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2bf8 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x67,0xcf,0x74,0x51,0x7f
+
+# ATT: vcvtne2ph2bf8 -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf2,0x67,0xdf,0x74,0x52,0x80
+
+# ATT: vcvtne2ph2bf8 268435456(%esp,%esi,8), %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x67,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2bf8 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x67,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 (%eax){1to16}, %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8 ymm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf2,0x67,0x38,0x74,0x10
+
+# ATT: vcvtne2ph2bf8 -1024(,%ebp,2), %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x67,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2bf8 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x67,0xaf,0x74,0x51,0x7f
+
+# ATT: vcvtne2ph2bf8 -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf2,0x67,0xbf,0x74,0x52,0x80
+
+# ATT: vcvtne2ph2bf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x67,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2bf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x67,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8 xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf2,0x67,0x18,0x74,0x10
+
+# ATT: vcvtne2ph2bf8 -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x67,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2bf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x67,0x8f,0x74,0x51,0x7f
+
+# ATT: vcvtne2ph2bf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf2,0x67,0x9f,0x74,0x52,0x80
+
+# ATT: vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8s ymm2, ymm3, ymm4
+0x62,0xf5,0x67,0x28,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2bf8s ymm2 {k7}, ymm3, ymm4
+0x62,0xf5,0x67,0x2f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, ymm4
+0x62,0xf5,0x67,0xaf,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8s zmm2, zmm3, zmm4
+0x62,0xf5,0x67,0x48,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2bf8s zmm2 {k7}, zmm3, zmm4
+0x62,0xf5,0x67,0x4f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, zmm4
+0x62,0xf5,0x67,0xcf,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8s xmm2, xmm3, xmm4
+0x62,0xf5,0x67,0x08,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2bf8s xmm2 {k7}, xmm3, xmm4
+0x62,0xf5,0x67,0x0f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf5,0x67,0x8f,0x74,0xd4
+
+# ATT: vcvtne2ph2bf8s 268435456(%esp,%esi,8), %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8s zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8s 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2bf8s zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s (%eax){1to32}, %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8s zmm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf5,0x67,0x58,0x74,0x10
+
+# ATT: vcvtne2ph2bf8s -2048(,%ebp,2), %zmm3, %zmm2
+# INTEL: vcvtne2ph2bf8s zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x67,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2bf8s 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x67,0xcf,0x74,0x51,0x7f
+
+# ATT: vcvtne2ph2bf8s -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x67,0xdf,0x74,0x52,0x80
+
+# ATT: vcvtne2ph2bf8s 268435456(%esp,%esi,8), %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8s ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8s 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2bf8s ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s (%eax){1to16}, %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8s ymm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf5,0x67,0x38,0x74,0x10
+
+# ATT: vcvtne2ph2bf8s -1024(,%ebp,2), %ymm3, %ymm2
+# INTEL: vcvtne2ph2bf8s ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x67,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2bf8s 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x67,0xaf,0x74,0x51,0x7f
+
+# ATT: vcvtne2ph2bf8s -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x67,0xbf,0x74,0x52,0x80
+
+# ATT: vcvtne2ph2bf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2bf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8s xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf5,0x67,0x18,0x74,0x10
+
+# ATT: vcvtne2ph2bf8s -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtne2ph2bf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x67,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2bf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x67,0x8f,0x74,0x51,0x7f
+
+# ATT: vcvtne2ph2bf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x67,0x9f,0x74,0x52,0x80
+
+# ATT: vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8 ymm2, ymm3, ymm4
+0x62,0xf5,0x67,0x28,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2hf8 ymm2 {k7}, ymm3, ymm4
+0x62,0xf5,0x67,0x2f,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, ymm4
+0x62,0xf5,0x67,0xaf,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8 zmm2, zmm3, zmm4
+0x62,0xf5,0x67,0x48,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2hf8 zmm2 {k7}, zmm3, zmm4
+0x62,0xf5,0x67,0x4f,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, zmm4
+0x62,0xf5,0x67,0xcf,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8 xmm2, xmm3, xmm4
+0x62,0xf5,0x67,0x08,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2hf8 xmm2 {k7}, xmm3, xmm4
+0x62,0xf5,0x67,0x0f,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf5,0x67,0x8f,0x18,0xd4
+
+# ATT: vcvtne2ph2hf8 268435456(%esp,%esi,8), %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2hf8 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 (%eax){1to32}, %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8 zmm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf5,0x67,0x58,0x18,0x10
+
+# ATT: vcvtne2ph2hf8 -2048(,%ebp,2), %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x67,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2hf8 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x67,0xcf,0x18,0x51,0x7f
+
+# ATT: vcvtne2ph2hf8 -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x67,0xdf,0x18,0x52,0x80
+
+# ATT: vcvtne2ph2hf8 268435456(%esp,%esi,8), %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x28,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2hf8 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x2f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 (%eax){1to16}, %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8 ymm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf5,0x67,0x38,0x18,0x10
+
+# ATT: vcvtne2ph2hf8 -1024(,%ebp,2), %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x67,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2hf8 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x67,0xaf,0x18,0x51,0x7f
+
+# ATT: vcvtne2ph2hf8 -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x67,0xbf,0x18,0x52,0x80
+
+# ATT: vcvtne2ph2hf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2hf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8 xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf5,0x67,0x18,0x18,0x10
+
+# ATT: vcvtne2ph2hf8 -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x67,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2hf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x67,0x8f,0x18,0x51,0x7f
+
+# ATT: vcvtne2ph2hf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x67,0x9f,0x18,0x52,0x80
+
+# ATT: vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8s ymm2, ymm3, ymm4
+0x62,0xf5,0x67,0x28,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2hf8s ymm2 {k7}, ymm3, ymm4
+0x62,0xf5,0x67,0x2f,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, ymm4
+0x62,0xf5,0x67,0xaf,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8s zmm2, zmm3, zmm4
+0x62,0xf5,0x67,0x48,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2hf8s zmm2 {k7}, zmm3, zmm4
+0x62,0xf5,0x67,0x4f,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, zmm4
+0x62,0xf5,0x67,0xcf,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8s xmm2, xmm3, xmm4
+0x62,0xf5,0x67,0x08,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2hf8s xmm2 {k7}, xmm3, xmm4
+0x62,0xf5,0x67,0x0f,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, xmm4
+0x62,0xf5,0x67,0x8f,0x1b,0xd4
+
+# ATT: vcvtne2ph2hf8s 268435456(%esp,%esi,8), %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8s zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8s 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+# INTEL: vcvtne2ph2hf8s zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s (%eax){1to32}, %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8s zmm2, zmm3, word ptr [eax]{1to32}
+0x62,0xf5,0x67,0x58,0x1b,0x10
+
+# ATT: vcvtne2ph2hf8s -2048(,%ebp,2), %zmm3, %zmm2
+# INTEL: vcvtne2ph2hf8s zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x67,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2hf8s 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x67,0xcf,0x1b,0x51,0x7f
+
+# ATT: vcvtne2ph2hf8s -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x67,0xdf,0x1b,0x52,0x80
+
+# ATT: vcvtne2ph2hf8s 268435456(%esp,%esi,8), %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8s ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x28,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8s 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+# INTEL: vcvtne2ph2hf8s ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x2f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s (%eax){1to16}, %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8s ymm2, ymm3, word ptr [eax]{1to16}
+0x62,0xf5,0x67,0x38,0x1b,0x10
+
+# ATT: vcvtne2ph2hf8s -1024(,%ebp,2), %ymm3, %ymm2
+# INTEL: vcvtne2ph2hf8s ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x67,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2hf8s 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x67,0xaf,0x1b,0x51,0x7f
+
+# ATT: vcvtne2ph2hf8s -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x67,0xbf,0x1b,0x52,0x80
+
+# ATT: vcvtne2ph2hf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x67,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+# INTEL: vcvtne2ph2hf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x67,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s (%eax){1to8}, %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8s xmm2, xmm3, word ptr [eax]{1to8}
+0x62,0xf5,0x67,0x18,0x1b,0x10
+
+# ATT: vcvtne2ph2hf8s -512(,%ebp,2), %xmm3, %xmm2
+# INTEL: vcvtne2ph2hf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x67,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2hf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x67,0x8f,0x1b,0x51,0x7f
+
+# ATT: vcvtne2ph2hf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x67,0x9f,0x1b,0x52,0x80
+
+# ATT: vcvtneph2bf8 %xmm3, %xmm2
+# INTEL: vcvtneph2bf8 xmm2, xmm3
+0x62,0xf2,0x7e,0x08,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %xmm3, %xmm2 {%k7}
+# INTEL: vcvtneph2bf8 xmm2 {k7}, xmm3
+0x62,0xf2,0x7e,0x0f,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm2 {k7} {z}, xmm3
+0x62,0xf2,0x7e,0x8f,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %zmm3, %ymm2
+# INTEL: vcvtneph2bf8 ymm2, zmm3
+0x62,0xf2,0x7e,0x48,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %zmm3, %ymm2 {%k7}
+# INTEL: vcvtneph2bf8 ymm2 {k7}, zmm3
+0x62,0xf2,0x7e,0x4f,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 ymm2 {k7} {z}, zmm3
+0x62,0xf2,0x7e,0xcf,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %ymm3, %xmm2
+# INTEL: vcvtneph2bf8 xmm2, ymm3
+0x62,0xf2,0x7e,0x28,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %ymm3, %xmm2 {%k7}
+# INTEL: vcvtneph2bf8 xmm2 {k7}, ymm3
+0x62,0xf2,0x7e,0x2f,0x74,0xd3
+
+# ATT: vcvtneph2bf8 %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm2 {k7} {z}, ymm3
+0x62,0xf2,0x7e,0xaf,0x74,0xd3
+
+# ATT: vcvtneph2bf8x 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtneph2bf8 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x7e,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8x 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtneph2bf8 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x7e,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8 (%eax){1to8}, %xmm2
+# INTEL: vcvtneph2bf8 xmm2, word ptr [eax]{1to8}
+0x62,0xf2,0x7e,0x18,0x74,0x10
+
+# ATT: vcvtneph2bf8x -512(,%ebp,2), %xmm2
+# INTEL: vcvtneph2bf8 xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf2,0x7e,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2bf8x 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf2,0x7e,0x8f,0x74,0x51,0x7f
+
+# ATT: vcvtneph2bf8 -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf2,0x7e,0x9f,0x74,0x52,0x80
+
+# ATT: vcvtneph2bf8 (%eax){1to16}, %xmm2
+# INTEL: vcvtneph2bf8 xmm2, word ptr [eax]{1to16}
+0x62,0xf2,0x7e,0x38,0x74,0x10
+
+# ATT: vcvtneph2bf8y -1024(,%ebp,2), %xmm2
+# INTEL: vcvtneph2bf8 xmm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf2,0x7e,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2bf8y 4064(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf2,0x7e,0xaf,0x74,0x51,0x7f
+
+# ATT: vcvtneph2bf8 -256(%edx){1to16}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf2,0x7e,0xbf,0x74,0x52,0x80
+
+# ATT: vcvtneph2bf8 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtneph2bf8 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf2,0x7e,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtneph2bf8 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf2,0x7e,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8 (%eax){1to32}, %ymm2
+# INTEL: vcvtneph2bf8 ymm2, word ptr [eax]{1to32}
+0x62,0xf2,0x7e,0x58,0x74,0x10
+
+# ATT: vcvtneph2bf8 -2048(,%ebp,2), %ymm2
+# INTEL: vcvtneph2bf8 ymm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf2,0x7e,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2bf8 8128(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf2,0x7e,0xcf,0x74,0x51,0x7f
+
+# ATT: vcvtneph2bf8 -256(%edx){1to32}, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2bf8 ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf2,0x7e,0xdf,0x74,0x52,0x80
+
+# ATT: vcvtneph2bf8s %xmm3, %xmm2
+# INTEL: vcvtneph2bf8s xmm2, xmm3
+0x62,0xf5,0x7e,0x08,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %xmm3, %xmm2 {%k7}
+# INTEL: vcvtneph2bf8s xmm2 {k7}, xmm3
+0x62,0xf5,0x7e,0x0f,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7e,0x8f,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %zmm3, %ymm2
+# INTEL: vcvtneph2bf8s ymm2, zmm3
+0x62,0xf5,0x7e,0x48,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %zmm3, %ymm2 {%k7}
+# INTEL: vcvtneph2bf8s ymm2 {k7}, zmm3
+0x62,0xf5,0x7e,0x4f,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s ymm2 {k7} {z}, zmm3
+0x62,0xf5,0x7e,0xcf,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %ymm3, %xmm2
+# INTEL: vcvtneph2bf8s xmm2, ymm3
+0x62,0xf5,0x7e,0x28,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %ymm3, %xmm2 {%k7}
+# INTEL: vcvtneph2bf8s xmm2 {k7}, ymm3
+0x62,0xf5,0x7e,0x2f,0x74,0xd3
+
+# ATT: vcvtneph2bf8s %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm2 {k7} {z}, ymm3
+0x62,0xf5,0x7e,0xaf,0x74,0xd3
+
+# ATT: vcvtneph2bf8sx 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtneph2bf8s xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7e,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8sx 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtneph2bf8s xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7e,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8s (%eax){1to8}, %xmm2
+# INTEL: vcvtneph2bf8s xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7e,0x18,0x74,0x10
+
+# ATT: vcvtneph2bf8sx -512(,%ebp,2), %xmm2
+# INTEL: vcvtneph2bf8s xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7e,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2bf8sx 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7e,0x8f,0x74,0x51,0x7f
+
+# ATT: vcvtneph2bf8s -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7e,0x9f,0x74,0x52,0x80
+
+# ATT: vcvtneph2bf8s (%eax){1to16}, %xmm2
+# INTEL: vcvtneph2bf8s xmm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7e,0x38,0x74,0x10
+
+# ATT: vcvtneph2bf8sy -1024(,%ebp,2), %xmm2
+# INTEL: vcvtneph2bf8s xmm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7e,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2bf8sy 4064(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7e,0xaf,0x74,0x51,0x7f
+
+# ATT: vcvtneph2bf8s -256(%edx){1to16}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7e,0xbf,0x74,0x52,0x80
+
+# ATT: vcvtneph2bf8s 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtneph2bf8s ymm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7e,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8s 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtneph2bf8s ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7e,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8s (%eax){1to32}, %ymm2
+# INTEL: vcvtneph2bf8s ymm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7e,0x58,0x74,0x10
+
+# ATT: vcvtneph2bf8s -2048(,%ebp,2), %ymm2
+# INTEL: vcvtneph2bf8s ymm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7e,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2bf8s 8128(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7e,0xcf,0x74,0x51,0x7f
+
+# ATT: vcvtneph2bf8s -256(%edx){1to32}, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2bf8s ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7e,0xdf,0x74,0x52,0x80
+
+# ATT: vcvtneph2hf8 %xmm3, %xmm2
+# INTEL: vcvtneph2hf8 xmm2, xmm3
+0x62,0xf5,0x7e,0x08,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %xmm3, %xmm2 {%k7}
+# INTEL: vcvtneph2hf8 xmm2 {k7}, xmm3
+0x62,0xf5,0x7e,0x0f,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7e,0x8f,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %zmm3, %ymm2
+# INTEL: vcvtneph2hf8 ymm2, zmm3
+0x62,0xf5,0x7e,0x48,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %zmm3, %ymm2 {%k7}
+# INTEL: vcvtneph2hf8 ymm2 {k7}, zmm3
+0x62,0xf5,0x7e,0x4f,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 ymm2 {k7} {z}, zmm3
+0x62,0xf5,0x7e,0xcf,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %ymm3, %xmm2
+# INTEL: vcvtneph2hf8 xmm2, ymm3
+0x62,0xf5,0x7e,0x28,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %ymm3, %xmm2 {%k7}
+# INTEL: vcvtneph2hf8 xmm2 {k7}, ymm3
+0x62,0xf5,0x7e,0x2f,0x18,0xd3
+
+# ATT: vcvtneph2hf8 %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm2 {k7} {z}, ymm3
+0x62,0xf5,0x7e,0xaf,0x18,0xd3
+
+# ATT: vcvtneph2hf8x 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtneph2hf8 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7e,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8x 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtneph2hf8 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7e,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8 (%eax){1to8}, %xmm2
+# INTEL: vcvtneph2hf8 xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7e,0x18,0x18,0x10
+
+# ATT: vcvtneph2hf8x -512(,%ebp,2), %xmm2
+# INTEL: vcvtneph2hf8 xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7e,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2hf8x 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7e,0x8f,0x18,0x51,0x7f
+
+# ATT: vcvtneph2hf8 -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7e,0x9f,0x18,0x52,0x80
+
+# ATT: vcvtneph2hf8 (%eax){1to16}, %xmm2
+# INTEL: vcvtneph2hf8 xmm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7e,0x38,0x18,0x10
+
+# ATT: vcvtneph2hf8y -1024(,%ebp,2), %xmm2
+# INTEL: vcvtneph2hf8 xmm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7e,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2hf8y 4064(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7e,0xaf,0x18,0x51,0x7f
+
+# ATT: vcvtneph2hf8 -256(%edx){1to16}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7e,0xbf,0x18,0x52,0x80
+
+# ATT: vcvtneph2hf8 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtneph2hf8 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7e,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtneph2hf8 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7e,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8 (%eax){1to32}, %ymm2
+# INTEL: vcvtneph2hf8 ymm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7e,0x58,0x18,0x10
+
+# ATT: vcvtneph2hf8 -2048(,%ebp,2), %ymm2
+# INTEL: vcvtneph2hf8 ymm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7e,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2hf8 8128(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7e,0xcf,0x18,0x51,0x7f
+
+# ATT: vcvtneph2hf8 -256(%edx){1to32}, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2hf8 ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7e,0xdf,0x18,0x52,0x80
+
+# ATT: vcvtneph2hf8s %xmm3, %xmm2
+# INTEL: vcvtneph2hf8s xmm2, xmm3
+0x62,0xf5,0x7e,0x08,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %xmm3, %xmm2 {%k7}
+# INTEL: vcvtneph2hf8s xmm2 {k7}, xmm3
+0x62,0xf5,0x7e,0x0f,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %xmm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm2 {k7} {z}, xmm3
+0x62,0xf5,0x7e,0x8f,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %zmm3, %ymm2
+# INTEL: vcvtneph2hf8s ymm2, zmm3
+0x62,0xf5,0x7e,0x48,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %zmm3, %ymm2 {%k7}
+# INTEL: vcvtneph2hf8s ymm2 {k7}, zmm3
+0x62,0xf5,0x7e,0x4f,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %zmm3, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s ymm2 {k7} {z}, zmm3
+0x62,0xf5,0x7e,0xcf,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %ymm3, %xmm2
+# INTEL: vcvtneph2hf8s xmm2, ymm3
+0x62,0xf5,0x7e,0x28,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %ymm3, %xmm2 {%k7}
+# INTEL: vcvtneph2hf8s xmm2 {k7}, ymm3
+0x62,0xf5,0x7e,0x2f,0x1b,0xd3
+
+# ATT: vcvtneph2hf8s %ymm3, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm2 {k7} {z}, ymm3
+0x62,0xf5,0x7e,0xaf,0x1b,0xd3
+
+# ATT: vcvtneph2hf8sx 268435456(%esp,%esi,8), %xmm2
+# INTEL: vcvtneph2hf8s xmm2, xmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7e,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8sx 291(%edi,%eax,4), %xmm2 {%k7}
+# INTEL: vcvtneph2hf8s xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7e,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8s (%eax){1to8}, %xmm2
+# INTEL: vcvtneph2hf8s xmm2, word ptr [eax]{1to8}
+0x62,0xf5,0x7e,0x18,0x1b,0x10
+
+# ATT: vcvtneph2hf8sx -512(,%ebp,2), %xmm2
+# INTEL: vcvtneph2hf8s xmm2, xmmword ptr [2*ebp - 512]
+0x62,0xf5,0x7e,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2hf8sx 2032(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+0x62,0xf5,0x7e,0x8f,0x1b,0x51,0x7f
+
+# ATT: vcvtneph2hf8s -256(%edx){1to8}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+0x62,0xf5,0x7e,0x9f,0x1b,0x52,0x80
+
+# ATT: vcvtneph2hf8s (%eax){1to16}, %xmm2
+# INTEL: vcvtneph2hf8s xmm2, word ptr [eax]{1to16}
+0x62,0xf5,0x7e,0x38,0x1b,0x10
+
+# ATT: vcvtneph2hf8sy -1024(,%ebp,2), %xmm2
+# INTEL: vcvtneph2hf8s xmm2, ymmword ptr [2*ebp - 1024]
+0x62,0xf5,0x7e,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2hf8sy 4064(%ecx), %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+0x62,0xf5,0x7e,0xaf,0x1b,0x51,0x7f
+
+# ATT: vcvtneph2hf8s -256(%edx){1to16}, %xmm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+0x62,0xf5,0x7e,0xbf,0x1b,0x52,0x80
+
+# ATT: vcvtneph2hf8s 268435456(%esp,%esi,8), %ymm2
+# INTEL: vcvtneph2hf8s ymm2, zmmword ptr [esp + 8*esi + 268435456]
+0x62,0xf5,0x7e,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8s 291(%edi,%eax,4), %ymm2 {%k7}
+# INTEL: vcvtneph2hf8s ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+0x62,0xf5,0x7e,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8s (%eax){1to32}, %ymm2
+# INTEL: vcvtneph2hf8s ymm2, word ptr [eax]{1to32}
+0x62,0xf5,0x7e,0x58,0x1b,0x10
+
+# ATT: vcvtneph2hf8s -2048(,%ebp,2), %ymm2
+# INTEL: vcvtneph2hf8s ymm2, zmmword ptr [2*ebp - 2048]
+0x62,0xf5,0x7e,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2hf8s 8128(%ecx), %ymm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+0x62,0xf5,0x7e,0xcf,0x1b,0x51,0x7f
+
+# ATT: vcvtneph2hf8s -256(%edx){1to32}, %ymm2 {%k7} {z}
+# INTEL: vcvtneph2hf8s ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+0x62,0xf5,0x7e,0xdf,0x1b,0x52,0x80
+
diff --git a/llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt b/llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
new file mode 100644
index 00000000000000..82bf09c49e9260
--- /dev/null
+++ b/llvm/test/MC/Disassembler/X86/avx10.2convert-64.txt
@@ -0,0 +1,1491 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
+# RUN: llvm-mc --disassemble %s -triple=x86_64 --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
+
+# ATT: vcvt2ps2phx %ymm24, %ymm23, %ymm22
+# INTEL: vcvt2ps2phx ymm22, ymm23, ymm24
+0x62,0x82,0x45,0x20,0x67,0xf0
+
+# ATT: vcvt2ps2phx {rn-sae}, %ymm24, %ymm23, %ymm22
+# INTEL: vcvt2ps2phx ymm22, ymm23, ymm24, {rn-sae}
+0x62,0x82,0x41,0x10,0x67,0xf0
+
+# ATT: vcvt2ps2phx %ymm24, %ymm23, %ymm22 {%k7}
+# INTEL: vcvt2ps2phx ymm22 {k7}, ymm23, ymm24
+0x62,0x82,0x45,0x27,0x67,0xf0
+
+# ATT: vcvt2ps2phx {rz-sae}, %ymm24, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymm24, {rz-sae}
+0x62,0x82,0x41,0xf7,0x67,0xf0
+
+# ATT: vcvt2ps2phx %zmm24, %zmm23, %zmm22
+# INTEL: vcvt2ps2phx zmm22, zmm23, zmm24
+0x62,0x82,0x45,0x40,0x67,0xf0
+
+# ATT: vcvt2ps2phx {rn-sae}, %zmm24, %zmm23, %zmm22
+# INTEL: vcvt2ps2phx zmm22, zmm23, zmm24, {rn-sae}
+0x62,0x82,0x45,0x10,0x67,0xf0
+
+# ATT: vcvt2ps2phx %zmm24, %zmm23, %zmm22 {%k7}
+# INTEL: vcvt2ps2phx zmm22 {k7}, zmm23, zmm24
+0x62,0x82,0x45,0x47,0x67,0xf0
+
+# ATT: vcvt2ps2phx {rz-sae}, %zmm24, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmm24, {rz-sae}
+0x62,0x82,0x45,0xf7,0x67,0xf0
+
+# ATT: vcvt2ps2phx %xmm24, %xmm23, %xmm22
+# INTEL: vcvt2ps2phx xmm22, xmm23, xmm24
+0x62,0x82,0x45,0x00,0x67,0xf0
+
+# ATT: vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvt2ps2phx xmm22 {k7}, xmm23, xmm24
+0x62,0x82,0x45,0x07,0x67,0xf0
+
+# ATT: vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x82,0x45,0x87,0x67,0xf0
+
+# ATT: vcvt2ps2phx 268435456(%rbp,%r14,8), %zmm23, %zmm22
+# INTEL: vcvt2ps2phx zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x45,0x40,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvt2ps2phx 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+# INTEL: vcvt2ps2phx zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x45,0x47,0x67,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvt2ps2phx (%rip){1to16}, %zmm23, %zmm22
+# INTEL: vcvt2ps2phx zmm22, zmm23, dword ptr [rip]{1to16}
+0x62,0xe2,0x45,0x50,0x67,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvt2ps2phx -2048(,%rbp,2), %zmm23, %zmm22
+# INTEL: vcvt2ps2phx zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x45,0x40,0x67,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvt2ps2phx 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x45,0xc7,0x67,0x71,0x7f
+
+# ATT: vcvt2ps2phx -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvt2ps2phx zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
+0x62,0xe2,0x45,0xd7,0x67,0x72,0x80
+
+# ATT: vcvt2ps2phx 268435456(%rbp,%r14,8), %ymm23, %ymm22
+# INTEL: vcvt2ps2phx ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x45,0x20,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvt2ps2phx 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+# INTEL: vcvt2ps2phx ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x45,0x27,0x67,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvt2ps2phx (%rip){1to8}, %ymm23, %ymm22
+# INTEL: vcvt2ps2phx ymm22, ymm23, dword ptr [rip]{1to8}
+0x62,0xe2,0x45,0x30,0x67,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvt2ps2phx -1024(,%rbp,2), %ymm23, %ymm22
+# INTEL: vcvt2ps2phx ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x45,0x20,0x67,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvt2ps2phx 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x45,0xa7,0x67,0x71,0x7f
+
+# ATT: vcvt2ps2phx -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvt2ps2phx ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
+0x62,0xe2,0x45,0xb7,0x67,0x72,0x80
+
+# ATT: vcvt2ps2phx 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvt2ps2phx xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x45,0x00,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvt2ps2phx 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvt2ps2phx xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x45,0x07,0x67,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvt2ps2phx (%rip){1to4}, %xmm23, %xmm22
+# INTEL: vcvt2ps2phx xmm22, xmm23, dword ptr [rip]{1to4}
+0x62,0xe2,0x45,0x10,0x67,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvt2ps2phx -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvt2ps2phx xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x45,0x00,0x67,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvt2ps2phx 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x45,0x87,0x67,0x71,0x7f
+
+# ATT: vcvt2ps2phx -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvt2ps2phx xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
+0x62,0xe2,0x45,0x97,0x67,0x72,0x80
+
+# ATT: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8 ymm22, zmm23, zmm24
+0x62,0x82,0x44,0x40,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmm24
+0x62,0x82,0x44,0x47,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmm24
+0x62,0x82,0x44,0xc7,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, xmm23, xmm24
+0x62,0x82,0x44,0x00,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmm24
+0x62,0x82,0x44,0x07,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x82,0x44,0x87,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, ymm23, ymm24
+0x62,0x82,0x44,0x20,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymm24
+0x62,0x82,0x44,0x27,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymm24
+0x62,0x82,0x44,0xa7,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 (%rip){1to16}, %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe2,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 -1024(,%rbp,2), %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2bf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x44,0xa7,0x74,0x71,0x7f
+
+# ATT: vcvtbiasph2bf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe2,0x44,0xb7,0x74,0x72,0x80
+
+# ATT: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 (%rip){1to32}, %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8 ymm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe2,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 -2048(,%rbp,2), %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2bf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x44,0xc7,0x74,0x71,0x7f
+
+# ATT: vcvtbiasph2bf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe2,0x44,0xd7,0x74,0x72,0x80
+
+# ATT: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe2,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2bf8 -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x44,0x87,0x74,0x71,0x7f
+
+# ATT: vcvtbiasph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe2,0x44,0x97,0x74,0x72,0x80
+
+# ATT: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8s ymm22, zmm23, zmm24
+0x62,0x85,0x44,0x40,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmm24
+0x62,0x85,0x44,0x47,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmm24
+0x62,0x85,0x44,0xc7,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, xmm23, xmm24
+0x62,0x85,0x44,0x00,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmm24
+0x62,0x85,0x44,0x07,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x85,0x44,0x87,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, ymm23, ymm24
+0x62,0x85,0x44,0x20,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymm24
+0x62,0x85,0x44,0x27,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymm24
+0x62,0x85,0x44,0xa7,0x74,0xf0
+
+# ATT: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s (%rip){1to16}, %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe5,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s -1024(,%rbp,2), %ymm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2bf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x44,0xa7,0x74,0x71,0x7f
+
+# ATT: vcvtbiasph2bf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x44,0xb7,0x74,0x72,0x80
+
+# ATT: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s (%rip){1to32}, %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8s ymm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe5,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s -2048(,%rbp,2), %zmm23, %ymm22
+# INTEL: vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2bf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x44,0xc7,0x74,0x71,0x7f
+
+# ATT: vcvtbiasph2bf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x44,0xd7,0x74,0x72,0x80
+
+# ATT: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe5,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2bf8s -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x44,0x87,0x74,0x71,0x7f
+
+# ATT: vcvtbiasph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x44,0x97,0x74,0x72,0x80
+
+# ATT: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8 ymm22, zmm23, zmm24
+0x62,0x85,0x44,0x40,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmm24
+0x62,0x85,0x44,0x47,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmm24
+0x62,0x85,0x44,0xc7,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, xmm23, xmm24
+0x62,0x85,0x44,0x00,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmm24
+0x62,0x85,0x44,0x07,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x85,0x44,0x87,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, ymm23, ymm24
+0x62,0x85,0x44,0x20,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymm24
+0x62,0x85,0x44,0x27,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymm24
+0x62,0x85,0x44,0xa7,0x18,0xf0
+
+# ATT: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 (%rip){1to16}, %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe5,0x44,0x30,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 -1024(,%rbp,2), %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x44,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2hf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x44,0xa7,0x18,0x71,0x7f
+
+# ATT: vcvtbiasph2hf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x44,0xb7,0x18,0x72,0x80
+
+# ATT: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 (%rip){1to32}, %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8 ymm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe5,0x44,0x50,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 -2048(,%rbp,2), %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x44,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2hf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x44,0xc7,0x18,0x71,0x7f
+
+# ATT: vcvtbiasph2hf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x44,0xd7,0x18,0x72,0x80
+
+# ATT: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe5,0x44,0x10,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2hf8 -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x44,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x44,0x87,0x18,0x71,0x7f
+
+# ATT: vcvtbiasph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x44,0x97,0x18,0x72,0x80
+
+# ATT: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8s ymm22, zmm23, zmm24
+0x62,0x85,0x44,0x40,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmm24
+0x62,0x85,0x44,0x47,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmm24
+0x62,0x85,0x44,0xc7,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, xmm23, xmm24
+0x62,0x85,0x44,0x00,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmm24
+0x62,0x85,0x44,0x07,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x85,0x44,0x87,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, ymm23, ymm24
+0x62,0x85,0x44,0x20,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymm24
+0x62,0x85,0x44,0x27,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymm24
+0x62,0x85,0x44,0xa7,0x1b,0xf0
+
+# ATT: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s (%rip){1to16}, %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe5,0x44,0x30,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s -1024(,%rbp,2), %ymm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x44,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtbiasph2hf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x44,0xa7,0x1b,0x71,0x7f
+
+# ATT: vcvtbiasph2hf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x44,0xb7,0x1b,0x72,0x80
+
+# ATT: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+# INTEL: vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s (%rip){1to32}, %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8s ymm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe5,0x44,0x50,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s -2048(,%rbp,2), %zmm23, %ymm22
+# INTEL: vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x44,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtbiasph2hf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x44,0xc7,0x1b,0x71,0x7f
+
+# ATT: vcvtbiasph2hf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x44,0xd7,0x1b,0x72,0x80
+
+# ATT: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x44,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtbiasph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x44,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe5,0x44,0x10,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtbiasph2hf8s -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x44,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtbiasph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x44,0x87,0x1b,0x71,0x7f
+
+# ATT: vcvtbiasph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x44,0x97,0x1b,0x72,0x80
+
+# ATT: vcvthf82ph %xmm23, %xmm22
+# INTEL: vcvthf82ph xmm22, xmm23
+0x62,0xa5,0x7f,0x08,0x1e,0xf7
+
+# ATT: vcvthf82ph %xmm23, %xmm22 {%k7}
+# INTEL: vcvthf82ph xmm22 {k7}, xmm23
+0x62,0xa5,0x7f,0x0f,0x1e,0xf7
+
+# ATT: vcvthf82ph %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvthf82ph xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7f,0x8f,0x1e,0xf7
+
+# ATT: vcvthf82ph %xmm23, %ymm22
+# INTEL: vcvthf82ph ymm22, xmm23
+0x62,0xa5,0x7f,0x28,0x1e,0xf7
+
+# ATT: vcvthf82ph %xmm23, %ymm22 {%k7}
+# INTEL: vcvthf82ph ymm22 {k7}, xmm23
+0x62,0xa5,0x7f,0x2f,0x1e,0xf7
+
+# ATT: vcvthf82ph %xmm23, %ymm22 {%k7} {z}
+# INTEL: vcvthf82ph ymm22 {k7} {z}, xmm23
+0x62,0xa5,0x7f,0xaf,0x1e,0xf7
+
+# ATT: vcvthf82ph %ymm23, %zmm22
+# INTEL: vcvthf82ph zmm22, ymm23
+0x62,0xa5,0x7f,0x48,0x1e,0xf7
+
+# ATT: vcvthf82ph %ymm23, %zmm22 {%k7}
+# INTEL: vcvthf82ph zmm22 {k7}, ymm23
+0x62,0xa5,0x7f,0x4f,0x1e,0xf7
+
+# ATT: vcvthf82ph %ymm23, %zmm22 {%k7} {z}
+# INTEL: vcvthf82ph zmm22 {k7} {z}, ymm23
+0x62,0xa5,0x7f,0xcf,0x1e,0xf7
+
+# ATT: vcvthf82ph 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvthf82ph xmm22, qword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x08,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvthf82ph 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvthf82ph xmm22 {k7}, qword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x0f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvthf82ph (%rip), %xmm22
+# INTEL: vcvthf82ph xmm22, qword ptr [rip]
+0x62,0xe5,0x7f,0x08,0x1e,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvthf82ph -256(,%rbp,2), %xmm22
+# INTEL: vcvthf82ph xmm22, qword ptr [2*rbp - 256]
+0x62,0xe5,0x7f,0x08,0x1e,0x34,0x6d,0x00,0xff,0xff,0xff
+
+# ATT: vcvthf82ph 1016(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvthf82ph xmm22 {k7} {z}, qword ptr [rcx + 1016]
+0x62,0xe5,0x7f,0x8f,0x1e,0x71,0x7f
+
+# ATT: vcvthf82ph -1024(%rdx), %xmm22 {%k7} {z}
+# INTEL: vcvthf82ph xmm22 {k7} {z}, qword ptr [rdx - 1024]
+0x62,0xe5,0x7f,0x8f,0x1e,0x72,0x80
+
+# ATT: vcvthf82ph 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvthf82ph ymm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x28,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvthf82ph 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvthf82ph ymm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x2f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvthf82ph (%rip), %ymm22
+# INTEL: vcvthf82ph ymm22, xmmword ptr [rip]
+0x62,0xe5,0x7f,0x28,0x1e,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvthf82ph -512(,%rbp,2), %ymm22
+# INTEL: vcvthf82ph ymm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7f,0x28,0x1e,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvthf82ph 2032(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7f,0xaf,0x1e,0x71,0x7f
+
+# ATT: vcvthf82ph -2048(%rdx), %ymm22 {%k7} {z}
+# INTEL: vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rdx - 2048]
+0x62,0xe5,0x7f,0xaf,0x1e,0x72,0x80
+
+# ATT: vcvthf82ph 268435456(%rbp,%r14,8), %zmm22
+# INTEL: vcvthf82ph zmm22, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7f,0x48,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvthf82ph 291(%r8,%rax,4), %zmm22 {%k7}
+# INTEL: vcvthf82ph zmm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7f,0x4f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvthf82ph (%rip), %zmm22
+# INTEL: vcvthf82ph zmm22, ymmword ptr [rip]
+0x62,0xe5,0x7f,0x48,0x1e,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvthf82ph -1024(,%rbp,2), %zmm22
+# INTEL: vcvthf82ph zmm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7f,0x48,0x1e,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvthf82ph 4064(%rcx), %zmm22 {%k7} {z}
+# INTEL: vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7f,0xcf,0x1e,0x71,0x7f
+
+# ATT: vcvthf82ph -4096(%rdx), %zmm22 {%k7} {z}
+# INTEL: vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rdx - 4096]
+0x62,0xe5,0x7f,0xcf,0x1e,0x72,0x80
+
+# ATT: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8 ymm22, ymm23, ymm24
+0x62,0x82,0x47,0x20,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymm24
+0x62,0x82,0x47,0x27,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymm24
+0x62,0x82,0x47,0xa7,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8 zmm22, zmm23, zmm24
+0x62,0x82,0x47,0x40,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmm24
+0x62,0x82,0x47,0x47,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmm24
+0x62,0x82,0x47,0xc7,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8 xmm22, xmm23, xmm24
+0x62,0x82,0x47,0x00,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmm24
+0x62,0x82,0x47,0x07,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x82,0x47,0x87,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 (%rip){1to32}, %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8 zmm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe2,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 -2048(,%rbp,2), %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2bf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x47,0xc7,0x74,0x71,0x7f
+
+# ATT: vcvtne2ph2bf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe2,0x47,0xd7,0x74,0x72,0x80
+
+# ATT: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 (%rip){1to16}, %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8 ymm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe2,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 -1024(,%rbp,2), %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2bf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x47,0xa7,0x74,0x71,0x7f
+
+# ATT: vcvtne2ph2bf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe2,0x47,0xb7,0x74,0x72,0x80
+
+# ATT: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe2,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2bf8 -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x47,0x87,0x74,0x71,0x7f
+
+# ATT: vcvtne2ph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe2,0x47,0x97,0x74,0x72,0x80
+
+# ATT: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8s ymm22, ymm23, ymm24
+0x62,0x85,0x47,0x20,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymm24
+0x62,0x85,0x47,0x27,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymm24
+0x62,0x85,0x47,0xa7,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8s zmm22, zmm23, zmm24
+0x62,0x85,0x47,0x40,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmm24
+0x62,0x85,0x47,0x47,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmm24
+0x62,0x85,0x47,0xc7,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8s xmm22, xmm23, xmm24
+0x62,0x85,0x47,0x00,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmm24
+0x62,0x85,0x47,0x07,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x85,0x47,0x87,0x74,0xf0
+
+# ATT: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s (%rip){1to32}, %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8s zmm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe5,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s -2048(,%rbp,2), %zmm23, %zmm22
+# INTEL: vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2bf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x47,0xc7,0x74,0x71,0x7f
+
+# ATT: vcvtne2ph2bf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x47,0xd7,0x74,0x72,0x80
+
+# ATT: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s (%rip){1to16}, %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8s ymm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe5,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s -1024(,%rbp,2), %ymm23, %ymm22
+# INTEL: vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2bf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x47,0xa7,0x74,0x71,0x7f
+
+# ATT: vcvtne2ph2bf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x47,0xb7,0x74,0x72,0x80
+
+# ATT: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe5,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2bf8s -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x47,0x87,0x74,0x71,0x7f
+
+# ATT: vcvtne2ph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x47,0x97,0x74,0x72,0x80
+
+# ATT: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8 ymm22, ymm23, ymm24
+0x62,0x85,0x47,0x20,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymm24
+0x62,0x85,0x47,0x27,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymm24
+0x62,0x85,0x47,0xa7,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8 zmm22, zmm23, zmm24
+0x62,0x85,0x47,0x40,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmm24
+0x62,0x85,0x47,0x47,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmm24
+0x62,0x85,0x47,0xc7,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8 xmm22, xmm23, xmm24
+0x62,0x85,0x47,0x00,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmm24
+0x62,0x85,0x47,0x07,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x85,0x47,0x87,0x18,0xf0
+
+# ATT: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 (%rip){1to32}, %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8 zmm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe5,0x47,0x50,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 -2048(,%rbp,2), %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x47,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2hf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x47,0xc7,0x18,0x71,0x7f
+
+# ATT: vcvtne2ph2hf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x47,0xd7,0x18,0x72,0x80
+
+# ATT: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 (%rip){1to16}, %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8 ymm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe5,0x47,0x30,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 -1024(,%rbp,2), %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x47,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2hf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x47,0xa7,0x18,0x71,0x7f
+
+# ATT: vcvtne2ph2hf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x47,0xb7,0x18,0x72,0x80
+
+# ATT: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe5,0x47,0x10,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2hf8 -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x47,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x47,0x87,0x18,0x71,0x7f
+
+# ATT: vcvtne2ph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x47,0x97,0x18,0x72,0x80
+
+# ATT: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8s ymm22, ymm23, ymm24
+0x62,0x85,0x47,0x20,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymm24
+0x62,0x85,0x47,0x27,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymm24
+0x62,0x85,0x47,0xa7,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8s zmm22, zmm23, zmm24
+0x62,0x85,0x47,0x40,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmm24
+0x62,0x85,0x47,0x47,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmm24
+0x62,0x85,0x47,0xc7,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8s xmm22, xmm23, xmm24
+0x62,0x85,0x47,0x00,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmm24
+0x62,0x85,0x47,0x07,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmm24
+0x62,0x85,0x47,0x87,0x1b,0xf0
+
+# ATT: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+# INTEL: vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s (%rip){1to32}, %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8s zmm22, zmm23, word ptr [rip]{1to32}
+0x62,0xe5,0x47,0x50,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s -2048(,%rbp,2), %zmm23, %zmm22
+# INTEL: vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x47,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtne2ph2hf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x47,0xc7,0x1b,0x71,0x7f
+
+# ATT: vcvtne2ph2hf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x47,0xd7,0x1b,0x72,0x80
+
+# ATT: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+# INTEL: vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s (%rip){1to16}, %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8s ymm22, ymm23, word ptr [rip]{1to16}
+0x62,0xe5,0x47,0x30,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s -1024(,%rbp,2), %ymm23, %ymm22
+# INTEL: vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x47,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtne2ph2hf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x47,0xa7,0x1b,0x71,0x7f
+
+# ATT: vcvtne2ph2hf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x47,0xb7,0x1b,0x72,0x80
+
+# ATT: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x47,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtne2ph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+# INTEL: vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x47,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s (%rip){1to8}, %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
+0x62,0xe5,0x47,0x10,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtne2ph2hf8s -512(,%rbp,2), %xmm23, %xmm22
+# INTEL: vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x47,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtne2ph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x47,0x87,0x1b,0x71,0x7f
+
+# ATT: vcvtne2ph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x47,0x97,0x1b,0x72,0x80
+
+# ATT: vcvtneph2bf8 %xmm23, %xmm22
+# INTEL: vcvtneph2bf8 xmm22, xmm23
+0x62,0xa2,0x7e,0x08,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %xmm23, %xmm22 {%k7}
+# INTEL: vcvtneph2bf8 xmm22 {k7}, xmm23
+0x62,0xa2,0x7e,0x0f,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, xmm23
+0x62,0xa2,0x7e,0x8f,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %zmm23, %ymm22
+# INTEL: vcvtneph2bf8 ymm22, zmm23
+0x62,0xa2,0x7e,0x48,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %zmm23, %ymm22 {%k7}
+# INTEL: vcvtneph2bf8 ymm22 {k7}, zmm23
+0x62,0xa2,0x7e,0x4f,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 ymm22 {k7} {z}, zmm23
+0x62,0xa2,0x7e,0xcf,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %ymm23, %xmm22
+# INTEL: vcvtneph2bf8 xmm22, ymm23
+0x62,0xa2,0x7e,0x28,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %ymm23, %xmm22 {%k7}
+# INTEL: vcvtneph2bf8 xmm22 {k7}, ymm23
+0x62,0xa2,0x7e,0x2f,0x74,0xf7
+
+# ATT: vcvtneph2bf8 %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, ymm23
+0x62,0xa2,0x7e,0xaf,0x74,0xf7
+
+# ATT: vcvtneph2bf8x 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtneph2bf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8x 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtneph2bf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8 (%rip){1to8}, %xmm22
+# INTEL: vcvtneph2bf8 xmm22, word ptr [rip]{1to8}
+0x62,0xe2,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2bf8x -512(,%rbp,2), %xmm22
+# INTEL: vcvtneph2bf8 xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe2,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2bf8x 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe2,0x7e,0x8f,0x74,0x71,0x7f
+
+# ATT: vcvtneph2bf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe2,0x7e,0x9f,0x74,0x72,0x80
+
+# ATT: vcvtneph2bf8 (%rip){1to16}, %xmm22
+# INTEL: vcvtneph2bf8 xmm22, word ptr [rip]{1to16}
+0x62,0xe2,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2bf8y -1024(,%rbp,2), %xmm22
+# INTEL: vcvtneph2bf8 xmm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe2,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2bf8y 4064(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe2,0x7e,0xaf,0x74,0x71,0x7f
+
+# ATT: vcvtneph2bf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe2,0x7e,0xbf,0x74,0x72,0x80
+
+# ATT: vcvtneph2bf8 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtneph2bf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa2,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtneph2bf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc2,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8 (%rip){1to32}, %ymm22
+# INTEL: vcvtneph2bf8 ymm22, word ptr [rip]{1to32}
+0x62,0xe2,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2bf8 -2048(,%rbp,2), %ymm22
+# INTEL: vcvtneph2bf8 ymm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe2,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2bf8 8128(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe2,0x7e,0xcf,0x74,0x71,0x7f
+
+# ATT: vcvtneph2bf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2bf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe2,0x7e,0xdf,0x74,0x72,0x80
+
+# ATT: vcvtneph2bf8s %xmm23, %xmm22
+# INTEL: vcvtneph2bf8s xmm22, xmm23
+0x62,0xa5,0x7e,0x08,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %xmm23, %xmm22 {%k7}
+# INTEL: vcvtneph2bf8s xmm22 {k7}, xmm23
+0x62,0xa5,0x7e,0x0f,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7e,0x8f,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %zmm23, %ymm22
+# INTEL: vcvtneph2bf8s ymm22, zmm23
+0x62,0xa5,0x7e,0x48,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %zmm23, %ymm22 {%k7}
+# INTEL: vcvtneph2bf8s ymm22 {k7}, zmm23
+0x62,0xa5,0x7e,0x4f,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s ymm22 {k7} {z}, zmm23
+0x62,0xa5,0x7e,0xcf,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %ymm23, %xmm22
+# INTEL: vcvtneph2bf8s xmm22, ymm23
+0x62,0xa5,0x7e,0x28,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %ymm23, %xmm22 {%k7}
+# INTEL: vcvtneph2bf8s xmm22 {k7}, ymm23
+0x62,0xa5,0x7e,0x2f,0x74,0xf7
+
+# ATT: vcvtneph2bf8s %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, ymm23
+0x62,0xa5,0x7e,0xaf,0x74,0xf7
+
+# ATT: vcvtneph2bf8sx 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtneph2bf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8sx 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtneph2bf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8s (%rip){1to8}, %xmm22
+# INTEL: vcvtneph2bf8s xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2bf8sx -512(,%rbp,2), %xmm22
+# INTEL: vcvtneph2bf8s xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2bf8sx 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7e,0x8f,0x74,0x71,0x7f
+
+# ATT: vcvtneph2bf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7e,0x9f,0x74,0x72,0x80
+
+# ATT: vcvtneph2bf8s (%rip){1to16}, %xmm22
+# INTEL: vcvtneph2bf8s xmm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2bf8sy -1024(,%rbp,2), %xmm22
+# INTEL: vcvtneph2bf8s xmm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2bf8sy 4064(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7e,0xaf,0x74,0x71,0x7f
+
+# ATT: vcvtneph2bf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7e,0xbf,0x74,0x72,0x80
+
+# ATT: vcvtneph2bf8s 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtneph2bf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2bf8s 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtneph2bf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2bf8s (%rip){1to32}, %ymm22
+# INTEL: vcvtneph2bf8s ymm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2bf8s -2048(,%rbp,2), %ymm22
+# INTEL: vcvtneph2bf8s ymm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2bf8s 8128(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7e,0xcf,0x74,0x71,0x7f
+
+# ATT: vcvtneph2bf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2bf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7e,0xdf,0x74,0x72,0x80
+
+# ATT: vcvtneph2hf8 %xmm23, %xmm22
+# INTEL: vcvtneph2hf8 xmm22, xmm23
+0x62,0xa5,0x7e,0x08,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %xmm23, %xmm22 {%k7}
+# INTEL: vcvtneph2hf8 xmm22 {k7}, xmm23
+0x62,0xa5,0x7e,0x0f,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7e,0x8f,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %zmm23, %ymm22
+# INTEL: vcvtneph2hf8 ymm22, zmm23
+0x62,0xa5,0x7e,0x48,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %zmm23, %ymm22 {%k7}
+# INTEL: vcvtneph2hf8 ymm22 {k7}, zmm23
+0x62,0xa5,0x7e,0x4f,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 ymm22 {k7} {z}, zmm23
+0x62,0xa5,0x7e,0xcf,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %ymm23, %xmm22
+# INTEL: vcvtneph2hf8 xmm22, ymm23
+0x62,0xa5,0x7e,0x28,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %ymm23, %xmm22 {%k7}
+# INTEL: vcvtneph2hf8 xmm22 {k7}, ymm23
+0x62,0xa5,0x7e,0x2f,0x18,0xf7
+
+# ATT: vcvtneph2hf8 %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, ymm23
+0x62,0xa5,0x7e,0xaf,0x18,0xf7
+
+# ATT: vcvtneph2hf8x 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtneph2hf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7e,0x08,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8x 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtneph2hf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7e,0x0f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8 (%rip){1to8}, %xmm22
+# INTEL: vcvtneph2hf8 xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7e,0x18,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2hf8x -512(,%rbp,2), %xmm22
+# INTEL: vcvtneph2hf8 xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7e,0x08,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2hf8x 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7e,0x8f,0x18,0x71,0x7f
+
+# ATT: vcvtneph2hf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7e,0x9f,0x18,0x72,0x80
+
+# ATT: vcvtneph2hf8 (%rip){1to16}, %xmm22
+# INTEL: vcvtneph2hf8 xmm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7e,0x38,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2hf8y -1024(,%rbp,2), %xmm22
+# INTEL: vcvtneph2hf8 xmm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7e,0x28,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2hf8y 4064(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7e,0xaf,0x18,0x71,0x7f
+
+# ATT: vcvtneph2hf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7e,0xbf,0x18,0x72,0x80
+
+# ATT: vcvtneph2hf8 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtneph2hf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7e,0x48,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtneph2hf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7e,0x4f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8 (%rip){1to32}, %ymm22
+# INTEL: vcvtneph2hf8 ymm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7e,0x58,0x18,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2hf8 -2048(,%rbp,2), %ymm22
+# INTEL: vcvtneph2hf8 ymm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7e,0x48,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2hf8 8128(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7e,0xcf,0x18,0x71,0x7f
+
+# ATT: vcvtneph2hf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2hf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7e,0xdf,0x18,0x72,0x80
+
+# ATT: vcvtneph2hf8s %xmm23, %xmm22
+# INTEL: vcvtneph2hf8s xmm22, xmm23
+0x62,0xa5,0x7e,0x08,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %xmm23, %xmm22 {%k7}
+# INTEL: vcvtneph2hf8s xmm22 {k7}, xmm23
+0x62,0xa5,0x7e,0x0f,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %xmm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, xmm23
+0x62,0xa5,0x7e,0x8f,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %zmm23, %ymm22
+# INTEL: vcvtneph2hf8s ymm22, zmm23
+0x62,0xa5,0x7e,0x48,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %zmm23, %ymm22 {%k7}
+# INTEL: vcvtneph2hf8s ymm22 {k7}, zmm23
+0x62,0xa5,0x7e,0x4f,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %zmm23, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s ymm22 {k7} {z}, zmm23
+0x62,0xa5,0x7e,0xcf,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %ymm23, %xmm22
+# INTEL: vcvtneph2hf8s xmm22, ymm23
+0x62,0xa5,0x7e,0x28,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %ymm23, %xmm22 {%k7}
+# INTEL: vcvtneph2hf8s xmm22 {k7}, ymm23
+0x62,0xa5,0x7e,0x2f,0x1b,0xf7
+
+# ATT: vcvtneph2hf8s %ymm23, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, ymm23
+0x62,0xa5,0x7e,0xaf,0x1b,0xf7
+
+# ATT: vcvtneph2hf8sx 268435456(%rbp,%r14,8), %xmm22
+# INTEL: vcvtneph2hf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7e,0x08,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8sx 291(%r8,%rax,4), %xmm22 {%k7}
+# INTEL: vcvtneph2hf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7e,0x0f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8s (%rip){1to8}, %xmm22
+# INTEL: vcvtneph2hf8s xmm22, word ptr [rip]{1to8}
+0x62,0xe5,0x7e,0x18,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2hf8sx -512(,%rbp,2), %xmm22
+# INTEL: vcvtneph2hf8s xmm22, xmmword ptr [2*rbp - 512]
+0x62,0xe5,0x7e,0x08,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff
+
+# ATT: vcvtneph2hf8sx 2032(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+0x62,0xe5,0x7e,0x8f,0x1b,0x71,0x7f
+
+# ATT: vcvtneph2hf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+0x62,0xe5,0x7e,0x9f,0x1b,0x72,0x80
+
+# ATT: vcvtneph2hf8s (%rip){1to16}, %xmm22
+# INTEL: vcvtneph2hf8s xmm22, word ptr [rip]{1to16}
+0x62,0xe5,0x7e,0x38,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2hf8sy -1024(,%rbp,2), %xmm22
+# INTEL: vcvtneph2hf8s xmm22, ymmword ptr [2*rbp - 1024]
+0x62,0xe5,0x7e,0x28,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff
+
+# ATT: vcvtneph2hf8sy 4064(%rcx), %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+0x62,0xe5,0x7e,0xaf,0x1b,0x71,0x7f
+
+# ATT: vcvtneph2hf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+0x62,0xe5,0x7e,0xbf,0x1b,0x72,0x80
+
+# ATT: vcvtneph2hf8s 268435456(%rbp,%r14,8), %ymm22
+# INTEL: vcvtneph2hf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+0x62,0xa5,0x7e,0x48,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10
+
+# ATT: vcvtneph2hf8s 291(%r8,%rax,4), %ymm22 {%k7}
+# INTEL: vcvtneph2hf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+0x62,0xc5,0x7e,0x4f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00
+
+# ATT: vcvtneph2hf8s (%rip){1to32}, %ymm22
+# INTEL: vcvtneph2hf8s ymm22, word ptr [rip]{1to32}
+0x62,0xe5,0x7e,0x58,0x1b,0x35,0x00,0x00,0x00,0x00
+
+# ATT: vcvtneph2hf8s -2048(,%rbp,2), %ymm22
+# INTEL: vcvtneph2hf8s ymm22, zmmword ptr [2*rbp - 2048]
+0x62,0xe5,0x7e,0x48,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff
+
+# ATT: vcvtneph2hf8s 8128(%rcx), %ymm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+0x62,0xe5,0x7e,0xcf,0x1b,0x71,0x7f
+
+# ATT: vcvtneph2hf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
+# INTEL: vcvtneph2hf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+0x62,0xe5,0x7e,0xdf,0x1b,0x72,0x80
+
diff --git a/llvm/test/MC/X86/avx10.2convert-32-att.s b/llvm/test/MC/X86/avx10.2convert-32-att.s
new file mode 100644
index 00000000000000..beb48245578010
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2convert-32-att.s
@@ -0,0 +1,1490 @@
+// RUN: llvm-mc -triple i386 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvt2ps2phx %ymm4, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x28,0x67,0xd4]
+ vcvt2ps2phx %ymm4, %ymm3, %ymm2
+
+// CHECK: vcvt2ps2phx {rn-sae}, %ymm4, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x61,0x18,0x67,0xd4]
+ vcvt2ps2phx {rn-sae}, %ymm4, %ymm3, %ymm2
+
+// CHECK: vcvt2ps2phx %ymm4, %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x65,0x2f,0x67,0xd4]
+ vcvt2ps2phx %ymm4, %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvt2ps2phx {rz-sae}, %ymm4, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x61,0xff,0x67,0xd4]
+ vcvt2ps2phx {rz-sae}, %ymm4, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx %zmm4, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x48,0x67,0xd4]
+ vcvt2ps2phx %zmm4, %zmm3, %zmm2
+
+// CHECK: vcvt2ps2phx {rn-sae}, %zmm4, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x18,0x67,0xd4]
+ vcvt2ps2phx {rn-sae}, %zmm4, %zmm3, %zmm2
+
+// CHECK: vcvt2ps2phx %zmm4, %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x65,0x4f,0x67,0xd4]
+ vcvt2ps2phx %zmm4, %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvt2ps2phx {rz-sae}, %zmm4, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0xff,0x67,0xd4]
+ vcvt2ps2phx {rz-sae}, %zmm4, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x08,0x67,0xd4]
+ vcvt2ps2phx %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvt2ps2phx %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x65,0x0f,0x67,0xd4]
+ vcvt2ps2phx %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvt2ps2phx %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0x8f,0x67,0xd4]
+ vcvt2ps2phx %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx 268435456(%esp,%esi,8), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x48,0x67,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx 268435456(%esp,%esi,8), %zmm3, %zmm2
+
+// CHECK: vcvt2ps2phx 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x65,0x4f,0x67,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvt2ps2phx (%eax){1to16}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x58,0x67,0x10]
+ vcvt2ps2phx (%eax){1to16}, %zmm3, %zmm2
+
+// CHECK: vcvt2ps2phx -2048(,%ebp,2), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x48,0x67,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvt2ps2phx -2048(,%ebp,2), %zmm3, %zmm2
+
+// CHECK: vcvt2ps2phx 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0xcf,0x67,0x51,0x7f]
+ vcvt2ps2phx 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx -512(%edx){1to16}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0xdf,0x67,0x52,0x80]
+ vcvt2ps2phx -512(%edx){1to16}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx 268435456(%esp,%esi,8), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x28,0x67,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx 268435456(%esp,%esi,8), %ymm3, %ymm2
+
+// CHECK: vcvt2ps2phx 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x65,0x2f,0x67,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvt2ps2phx (%eax){1to8}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x38,0x67,0x10]
+ vcvt2ps2phx (%eax){1to8}, %ymm3, %ymm2
+
+// CHECK: vcvt2ps2phx -1024(,%ebp,2), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x28,0x67,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvt2ps2phx -1024(,%ebp,2), %ymm3, %ymm2
+
+// CHECK: vcvt2ps2phx 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0xaf,0x67,0x51,0x7f]
+ vcvt2ps2phx 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0xbf,0x67,0x52,0x80]
+ vcvt2ps2phx -512(%edx){1to8}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x08,0x67,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvt2ps2phx 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x65,0x0f,0x67,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvt2ps2phx (%eax){1to4}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x18,0x67,0x10]
+ vcvt2ps2phx (%eax){1to4}, %xmm3, %xmm2
+
+// CHECK: vcvt2ps2phx -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x65,0x08,0x67,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvt2ps2phx -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvt2ps2phx 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0x8f,0x67,0x51,0x7f]
+ vcvt2ps2phx 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvt2ps2phx -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x65,0x9f,0x67,0x52,0x80]
+ vcvt2ps2phx -512(%edx){1to4}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x48,0x74,0xd4]
+ vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x64,0x4f,0x74,0xd4]
+ vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0xcf,0x74,0xd4]
+ vcvtbiasph2bf8 %zmm4, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x08,0x74,0xd4]
+ vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x64,0x0f,0x74,0xd4]
+ vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0x8f,0x74,0xd4]
+ vcvtbiasph2bf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x28,0x74,0xd4]
+ vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x64,0x2f,0x74,0xd4]
+ vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0xaf,0x74,0xd4]
+ vcvtbiasph2bf8 %ymm4, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 268435456(%esp,%esi,8), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 268435456(%esp,%esi,8), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x64,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8 (%eax){1to16}, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x38,0x74,0x10]
+ vcvtbiasph2bf8 (%eax){1to16}, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 -1024(,%ebp,2), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8 -1024(,%ebp,2), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0xaf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0xbf,0x74,0x52,0x80]
+ vcvtbiasph2bf8 -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 268435456(%esp,%esi,8), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 268435456(%esp,%esi,8), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x64,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8 (%eax){1to32}, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x58,0x74,0x10]
+ vcvtbiasph2bf8 (%eax){1to32}, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8 -2048(,%ebp,2), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8 -2048(,%ebp,2), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0xcf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0xdf,0x74,0x52,0x80]
+ vcvtbiasph2bf8 -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x64,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8 (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x18,0x74,0x10]
+ vcvtbiasph2bf8 (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x64,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8 -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0x8f,0x74,0x51,0x7f]
+ vcvtbiasph2bf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x64,0x9f,0x74,0x52,0x80]
+ vcvtbiasph2bf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x74,0xd4]
+ vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x74,0xd4]
+ vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x74,0xd4]
+ vcvtbiasph2bf8s %zmm4, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x74,0xd4]
+ vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x74,0xd4]
+ vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x74,0xd4]
+ vcvtbiasph2bf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x74,0xd4]
+ vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x74,0xd4]
+ vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x74,0xd4]
+ vcvtbiasph2bf8s %ymm4, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s 268435456(%esp,%esi,8), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s 268435456(%esp,%esi,8), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8s (%eax){1to16}, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x38,0x74,0x10]
+ vcvtbiasph2bf8s (%eax){1to16}, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s -1024(,%ebp,2), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8s -1024(,%ebp,2), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8s 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xbf,0x74,0x52,0x80]
+ vcvtbiasph2bf8s -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s 268435456(%esp,%esi,8), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s 268435456(%esp,%esi,8), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8s 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8s (%eax){1to32}, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x58,0x74,0x10]
+ vcvtbiasph2bf8s (%eax){1to32}, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8s -2048(,%ebp,2), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8s -2048(,%ebp,2), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2bf8s 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8s 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xdf,0x74,0x52,0x80]
+ vcvtbiasph2bf8s -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2bf8s (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x18,0x74,0x10]
+ vcvtbiasph2bf8s (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8s -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2bf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x74,0x51,0x7f]
+ vcvtbiasph2bf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x9f,0x74,0x52,0x80]
+ vcvtbiasph2bf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x18,0xd4]
+ vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x18,0xd4]
+ vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x18,0xd4]
+ vcvtbiasph2hf8 %zmm4, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x18,0xd4]
+ vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x18,0xd4]
+ vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x18,0xd4]
+ vcvtbiasph2hf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x18,0xd4]
+ vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x18,0xd4]
+ vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x18,0xd4]
+ vcvtbiasph2hf8 %ymm4, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 268435456(%esp,%esi,8), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 268435456(%esp,%esi,8), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8 (%eax){1to16}, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x38,0x18,0x10]
+ vcvtbiasph2hf8 (%eax){1to16}, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 -1024(,%ebp,2), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8 -1024(,%ebp,2), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x18,0x51,0x7f]
+ vcvtbiasph2hf8 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xbf,0x18,0x52,0x80]
+ vcvtbiasph2hf8 -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 268435456(%esp,%esi,8), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 268435456(%esp,%esi,8), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8 (%eax){1to32}, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x58,0x18,0x10]
+ vcvtbiasph2hf8 (%eax){1to32}, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8 -2048(,%ebp,2), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8 -2048(,%ebp,2), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x18,0x51,0x7f]
+ vcvtbiasph2hf8 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xdf,0x18,0x52,0x80]
+ vcvtbiasph2hf8 -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8 (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x18,0x18,0x10]
+ vcvtbiasph2hf8 (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8 -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x18,0x51,0x7f]
+ vcvtbiasph2hf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x9f,0x18,0x52,0x80]
+ vcvtbiasph2hf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x1b,0xd4]
+ vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x1b,0xd4]
+ vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x1b,0xd4]
+ vcvtbiasph2hf8s %zmm4, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x1b,0xd4]
+ vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x1b,0xd4]
+ vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x1b,0xd4]
+ vcvtbiasph2hf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x1b,0xd4]
+ vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x1b,0xd4]
+ vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x1b,0xd4]
+ vcvtbiasph2hf8s %ymm4, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s 268435456(%esp,%esi,8), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s 268435456(%esp,%esi,8), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s 291(%edi,%eax,4), %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8s (%eax){1to16}, %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x38,0x1b,0x10]
+ vcvtbiasph2hf8s (%eax){1to16}, %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s -1024(,%ebp,2), %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8s -1024(,%ebp,2), %ymm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x1b,0x51,0x7f]
+ vcvtbiasph2hf8s 4064(%ecx), %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xbf,0x1b,0x52,0x80]
+ vcvtbiasph2hf8s -256(%edx){1to16}, %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s 268435456(%esp,%esi,8), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s 268435456(%esp,%esi,8), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8s 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s 291(%edi,%eax,4), %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8s (%eax){1to32}, %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x58,0x1b,0x10]
+ vcvtbiasph2hf8s (%eax){1to32}, %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8s -2048(,%ebp,2), %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8s -2048(,%ebp,2), %zmm3, %ymm2
+
+// CHECK: vcvtbiasph2hf8s 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x1b,0x51,0x7f]
+ vcvtbiasph2hf8s 8128(%ecx), %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0xdf,0x1b,0x52,0x80]
+ vcvtbiasph2hf8s -256(%edx){1to32}, %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtbiasph2hf8s (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x18,0x1b,0x10]
+ vcvtbiasph2hf8s (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8s -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtbiasph2hf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x1b,0x51,0x7f]
+ vcvtbiasph2hf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x64,0x9f,0x1b,0x52,0x80]
+ vcvtbiasph2hf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvthf82ph %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0xd3]
+ vcvthf82ph %xmm3, %xmm2
+
+// CHECK: vcvthf82ph %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x1e,0xd3]
+ vcvthf82ph %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvthf82ph %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x1e,0xd3]
+ vcvthf82ph %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvthf82ph %xmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0xd3]
+ vcvthf82ph %xmm3, %ymm2
+
+// CHECK: vcvthf82ph %xmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x1e,0xd3]
+ vcvthf82ph %xmm3, %ymm2 {%k7}
+
+// CHECK: vcvthf82ph %xmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x1e,0xd3]
+ vcvthf82ph %xmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvthf82ph %ymm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0xd3]
+ vcvthf82ph %ymm3, %zmm2
+
+// CHECK: vcvthf82ph %ymm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x1e,0xd3]
+ vcvthf82ph %ymm3, %zmm2 {%k7}
+
+// CHECK: vcvthf82ph %ymm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x1e,0xd3]
+ vcvthf82ph %ymm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvthf82ph 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvthf82ph 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvthf82ph 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvthf82ph 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvthf82ph (%eax), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0x10]
+ vcvthf82ph (%eax), %xmm2
+
+// CHECK: vcvthf82ph -256(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0x14,0x6d,0x00,0xff,0xff,0xff]
+ vcvthf82ph -256(,%ebp,2), %xmm2
+
+// CHECK: vcvthf82ph 1016(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x1e,0x51,0x7f]
+ vcvthf82ph 1016(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvthf82ph -1024(%edx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x1e,0x52,0x80]
+ vcvthf82ph -1024(%edx), %xmm2 {%k7} {z}
+
+// CHECK: vcvthf82ph 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvthf82ph 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvthf82ph 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvthf82ph 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvthf82ph (%eax), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0x10]
+ vcvthf82ph (%eax), %ymm2
+
+// CHECK: vcvthf82ph -512(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvthf82ph -512(,%ebp,2), %ymm2
+
+// CHECK: vcvthf82ph 2032(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x1e,0x51,0x7f]
+ vcvthf82ph 2032(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvthf82ph -2048(%edx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x1e,0x52,0x80]
+ vcvthf82ph -2048(%edx), %ymm2 {%k7} {z}
+
+// CHECK: vcvthf82ph 268435456(%esp,%esi,8), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvthf82ph 268435456(%esp,%esi,8), %zmm2
+
+// CHECK: vcvthf82ph 291(%edi,%eax,4), %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvthf82ph 291(%edi,%eax,4), %zmm2 {%k7}
+
+// CHECK: vcvthf82ph (%eax), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0x10]
+ vcvthf82ph (%eax), %zmm2
+
+// CHECK: vcvthf82ph -1024(,%ebp,2), %zmm2
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvthf82ph -1024(,%ebp,2), %zmm2
+
+// CHECK: vcvthf82ph 4064(%ecx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x1e,0x51,0x7f]
+ vcvthf82ph 4064(%ecx), %zmm2 {%k7} {z}
+
+// CHECK: vcvthf82ph -4096(%edx), %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x1e,0x52,0x80]
+ vcvthf82ph -4096(%edx), %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x28,0x74,0xd4]
+ vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x67,0x2f,0x74,0xd4]
+ vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0xaf,0x74,0xd4]
+ vcvtne2ph2bf8 %ymm4, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x48,0x74,0xd4]
+ vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x67,0x4f,0x74,0xd4]
+ vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0xcf,0x74,0xd4]
+ vcvtne2ph2bf8 %zmm4, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x08,0x74,0xd4]
+ vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x67,0x0f,0x74,0xd4]
+ vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0x8f,0x74,0xd4]
+ vcvtne2ph2bf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 268435456(%esp,%esi,8), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 268435456(%esp,%esi,8), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x67,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8 (%eax){1to32}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x58,0x74,0x10]
+ vcvtne2ph2bf8 (%eax){1to32}, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8 -2048(,%ebp,2), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8 -2048(,%ebp,2), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0xcf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0xdf,0x74,0x52,0x80]
+ vcvtne2ph2bf8 -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 268435456(%esp,%esi,8), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 268435456(%esp,%esi,8), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x67,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8 (%eax){1to16}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x38,0x74,0x10]
+ vcvtne2ph2bf8 (%eax){1to16}, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8 -1024(,%ebp,2), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8 -1024(,%ebp,2), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0xaf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0xbf,0x74,0x52,0x80]
+ vcvtne2ph2bf8 -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x67,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8 (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x18,0x74,0x10]
+ vcvtne2ph2bf8 (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8 -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x67,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8 -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0x8f,0x74,0x51,0x7f]
+ vcvtne2ph2bf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x67,0x9f,0x74,0x52,0x80]
+ vcvtne2ph2bf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x74,0xd4]
+ vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x74,0xd4]
+ vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x74,0xd4]
+ vcvtne2ph2bf8s %ymm4, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x74,0xd4]
+ vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x74,0xd4]
+ vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x74,0xd4]
+ vcvtne2ph2bf8s %zmm4, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x74,0xd4]
+ vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x74,0xd4]
+ vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x74,0xd4]
+ vcvtne2ph2bf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s 268435456(%esp,%esi,8), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s 268435456(%esp,%esi,8), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8s 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8s (%eax){1to32}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x58,0x74,0x10]
+ vcvtne2ph2bf8s (%eax){1to32}, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8s -2048(,%ebp,2), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8s -2048(,%ebp,2), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2bf8s 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8s 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xdf,0x74,0x52,0x80]
+ vcvtne2ph2bf8s -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s 268435456(%esp,%esi,8), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s 268435456(%esp,%esi,8), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8s 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8s (%eax){1to16}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x38,0x74,0x10]
+ vcvtne2ph2bf8s (%eax){1to16}, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8s -1024(,%ebp,2), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8s -1024(,%ebp,2), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2bf8s 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8s 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xbf,0x74,0x52,0x80]
+ vcvtne2ph2bf8s -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2bf8s (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x18,0x74,0x10]
+ vcvtne2ph2bf8s (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8s -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8s -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2bf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x74,0x51,0x7f]
+ vcvtne2ph2bf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x9f,0x74,0x52,0x80]
+ vcvtne2ph2bf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x18,0xd4]
+ vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x18,0xd4]
+ vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x18,0xd4]
+ vcvtne2ph2hf8 %ymm4, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x18,0xd4]
+ vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x18,0xd4]
+ vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x18,0xd4]
+ vcvtne2ph2hf8 %zmm4, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x18,0xd4]
+ vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x18,0xd4]
+ vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x18,0xd4]
+ vcvtne2ph2hf8 %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 268435456(%esp,%esi,8), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 268435456(%esp,%esi,8), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8 (%eax){1to32}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x58,0x18,0x10]
+ vcvtne2ph2hf8 (%eax){1to32}, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8 -2048(,%ebp,2), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8 -2048(,%ebp,2), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x18,0x51,0x7f]
+ vcvtne2ph2hf8 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xdf,0x18,0x52,0x80]
+ vcvtne2ph2hf8 -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 268435456(%esp,%esi,8), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 268435456(%esp,%esi,8), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8 (%eax){1to16}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x38,0x18,0x10]
+ vcvtne2ph2hf8 (%eax){1to16}, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8 -1024(,%ebp,2), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8 -1024(,%ebp,2), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x18,0x51,0x7f]
+ vcvtne2ph2hf8 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xbf,0x18,0x52,0x80]
+ vcvtne2ph2hf8 -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8 (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x18,0x18,0x10]
+ vcvtne2ph2hf8 (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8 -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8 -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x18,0x51,0x7f]
+ vcvtne2ph2hf8 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x9f,0x18,0x52,0x80]
+ vcvtne2ph2hf8 -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x1b,0xd4]
+ vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x1b,0xd4]
+ vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x1b,0xd4]
+ vcvtne2ph2hf8s %ymm4, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x1b,0xd4]
+ vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x1b,0xd4]
+ vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x1b,0xd4]
+ vcvtne2ph2hf8s %zmm4, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x1b,0xd4]
+ vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x1b,0xd4]
+ vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x1b,0xd4]
+ vcvtne2ph2hf8s %xmm4, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s 268435456(%esp,%esi,8), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s 268435456(%esp,%esi,8), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8s 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s 291(%edi,%eax,4), %zmm3, %zmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8s (%eax){1to32}, %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x58,0x1b,0x10]
+ vcvtne2ph2hf8s (%eax){1to32}, %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8s -2048(,%ebp,2), %zmm3, %zmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8s -2048(,%ebp,2), %zmm3, %zmm2
+
+// CHECK: vcvtne2ph2hf8s 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x1b,0x51,0x7f]
+ vcvtne2ph2hf8s 8128(%ecx), %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xdf,0x1b,0x52,0x80]
+ vcvtne2ph2hf8s -256(%edx){1to32}, %zmm3, %zmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s 268435456(%esp,%esi,8), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s 268435456(%esp,%esi,8), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8s 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s 291(%edi,%eax,4), %ymm3, %ymm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8s (%eax){1to16}, %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x38,0x1b,0x10]
+ vcvtne2ph2hf8s (%eax){1to16}, %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8s -1024(,%ebp,2), %ymm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8s -1024(,%ebp,2), %ymm3, %ymm2
+
+// CHECK: vcvtne2ph2hf8s 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x1b,0x51,0x7f]
+ vcvtne2ph2hf8s 4064(%ecx), %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0xbf,0x1b,0x52,0x80]
+ vcvtne2ph2hf8s -256(%edx){1to16}, %ymm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s 268435456(%esp,%esi,8), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s 291(%edi,%eax,4), %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtne2ph2hf8s (%eax){1to8}, %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x18,0x1b,0x10]
+ vcvtne2ph2hf8s (%eax){1to8}, %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8s -512(,%ebp,2), %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8s -512(,%ebp,2), %xmm3, %xmm2
+
+// CHECK: vcvtne2ph2hf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x1b,0x51,0x7f]
+ vcvtne2ph2hf8s 2032(%ecx), %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x67,0x9f,0x1b,0x52,0x80]
+ vcvtne2ph2hf8s -256(%edx){1to8}, %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x74,0xd3]
+ vcvtneph2bf8 %xmm3, %xmm2
+
+// CHECK: vcvtneph2bf8 %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x0f,0x74,0xd3]
+ vcvtneph2bf8 %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2bf8 %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x8f,0x74,0xd3]
+ vcvtneph2bf8 %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x74,0xd3]
+ vcvtneph2bf8 %zmm3, %ymm2
+
+// CHECK: vcvtneph2bf8 %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x4f,0x74,0xd3]
+ vcvtneph2bf8 %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtneph2bf8 %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xcf,0x74,0xd3]
+ vcvtneph2bf8 %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x74,0xd3]
+ vcvtneph2bf8 %ymm3, %xmm2
+
+// CHECK: vcvtneph2bf8 %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x2f,0x74,0xd3]
+ vcvtneph2bf8 %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2bf8 %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xaf,0x74,0xd3]
+ vcvtneph2bf8 %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8x 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8x 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtneph2bf8x 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8x 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtneph2bf8 (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x18,0x74,0x10]
+ vcvtneph2bf8 (%eax){1to8}, %xmm2
+
+// CHECK: vcvtneph2bf8x -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8x -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2bf8x 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x8f,0x74,0x51,0x7f]
+ vcvtneph2bf8x 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x9f,0x74,0x52,0x80]
+ vcvtneph2bf8 -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 (%eax){1to16}, %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x38,0x74,0x10]
+ vcvtneph2bf8 (%eax){1to16}, %xmm2
+
+// CHECK: vcvtneph2bf8y -1024(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8y -1024(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2bf8y 4064(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xaf,0x74,0x51,0x7f]
+ vcvtneph2bf8y 4064(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 -256(%edx){1to16}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xbf,0x74,0x52,0x80]
+ vcvtneph2bf8 -256(%edx){1to16}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtneph2bf8 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtneph2bf8 (%eax){1to32}, %ymm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x58,0x74,0x10]
+ vcvtneph2bf8 (%eax){1to32}, %ymm2
+
+// CHECK: vcvtneph2bf8 -2048(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8 -2048(,%ebp,2), %ymm2
+
+// CHECK: vcvtneph2bf8 8128(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xcf,0x74,0x51,0x7f]
+ vcvtneph2bf8 8128(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 -256(%edx){1to32}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xdf,0x74,0x52,0x80]
+ vcvtneph2bf8 -256(%edx){1to32}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x74,0xd3]
+ vcvtneph2bf8s %xmm3, %xmm2
+
+// CHECK: vcvtneph2bf8s %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x74,0xd3]
+ vcvtneph2bf8s %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2bf8s %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x74,0xd3]
+ vcvtneph2bf8s %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x74,0xd3]
+ vcvtneph2bf8s %zmm3, %ymm2
+
+// CHECK: vcvtneph2bf8s %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x74,0xd3]
+ vcvtneph2bf8s %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtneph2bf8s %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x74,0xd3]
+ vcvtneph2bf8s %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x74,0xd3]
+ vcvtneph2bf8s %ymm3, %xmm2
+
+// CHECK: vcvtneph2bf8s %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x2f,0x74,0xd3]
+ vcvtneph2bf8s %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2bf8s %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x74,0xd3]
+ vcvtneph2bf8s %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8sx 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8sx 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtneph2bf8sx 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8sx 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtneph2bf8s (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x18,0x74,0x10]
+ vcvtneph2bf8s (%eax){1to8}, %xmm2
+
+// CHECK: vcvtneph2bf8sx -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8sx -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2bf8sx 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x74,0x51,0x7f]
+ vcvtneph2bf8sx 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x9f,0x74,0x52,0x80]
+ vcvtneph2bf8s -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s (%eax){1to16}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x38,0x74,0x10]
+ vcvtneph2bf8s (%eax){1to16}, %xmm2
+
+// CHECK: vcvtneph2bf8sy -1024(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8sy -1024(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2bf8sy 4064(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x74,0x51,0x7f]
+ vcvtneph2bf8sy 4064(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s -256(%edx){1to16}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xbf,0x74,0x52,0x80]
+ vcvtneph2bf8s -256(%edx){1to16}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8s 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtneph2bf8s 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8s 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtneph2bf8s (%eax){1to32}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x58,0x74,0x10]
+ vcvtneph2bf8s (%eax){1to32}, %ymm2
+
+// CHECK: vcvtneph2bf8s -2048(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8s -2048(,%ebp,2), %ymm2
+
+// CHECK: vcvtneph2bf8s 8128(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x74,0x51,0x7f]
+ vcvtneph2bf8s 8128(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s -256(%edx){1to32}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xdf,0x74,0x52,0x80]
+ vcvtneph2bf8s -256(%edx){1to32}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x18,0xd3]
+ vcvtneph2hf8 %xmm3, %xmm2
+
+// CHECK: vcvtneph2hf8 %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x18,0xd3]
+ vcvtneph2hf8 %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2hf8 %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x18,0xd3]
+ vcvtneph2hf8 %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x18,0xd3]
+ vcvtneph2hf8 %zmm3, %ymm2
+
+// CHECK: vcvtneph2hf8 %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x18,0xd3]
+ vcvtneph2hf8 %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtneph2hf8 %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x18,0xd3]
+ vcvtneph2hf8 %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x18,0xd3]
+ vcvtneph2hf8 %ymm3, %xmm2
+
+// CHECK: vcvtneph2hf8 %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x2f,0x18,0xd3]
+ vcvtneph2hf8 %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2hf8 %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x18,0xd3]
+ vcvtneph2hf8 %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8x 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8x 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtneph2hf8x 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8x 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtneph2hf8 (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x18,0x18,0x10]
+ vcvtneph2hf8 (%eax){1to8}, %xmm2
+
+// CHECK: vcvtneph2hf8x -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8x -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2hf8x 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x18,0x51,0x7f]
+ vcvtneph2hf8x 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x9f,0x18,0x52,0x80]
+ vcvtneph2hf8 -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 (%eax){1to16}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x38,0x18,0x10]
+ vcvtneph2hf8 (%eax){1to16}, %xmm2
+
+// CHECK: vcvtneph2hf8y -1024(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8y -1024(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2hf8y 4064(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x18,0x51,0x7f]
+ vcvtneph2hf8y 4064(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 -256(%edx){1to16}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xbf,0x18,0x52,0x80]
+ vcvtneph2hf8 -256(%edx){1to16}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtneph2hf8 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtneph2hf8 (%eax){1to32}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x58,0x18,0x10]
+ vcvtneph2hf8 (%eax){1to32}, %ymm2
+
+// CHECK: vcvtneph2hf8 -2048(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8 -2048(,%ebp,2), %ymm2
+
+// CHECK: vcvtneph2hf8 8128(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x18,0x51,0x7f]
+ vcvtneph2hf8 8128(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 -256(%edx){1to32}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xdf,0x18,0x52,0x80]
+ vcvtneph2hf8 -256(%edx){1to32}, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s %xmm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x1b,0xd3]
+ vcvtneph2hf8s %xmm3, %xmm2
+
+// CHECK: vcvtneph2hf8s %xmm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x1b,0xd3]
+ vcvtneph2hf8s %xmm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2hf8s %xmm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x1b,0xd3]
+ vcvtneph2hf8s %xmm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s %zmm3, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x1b,0xd3]
+ vcvtneph2hf8s %zmm3, %ymm2
+
+// CHECK: vcvtneph2hf8s %zmm3, %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x1b,0xd3]
+ vcvtneph2hf8s %zmm3, %ymm2 {%k7}
+
+// CHECK: vcvtneph2hf8s %zmm3, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x1b,0xd3]
+ vcvtneph2hf8s %zmm3, %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s %ymm3, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x1b,0xd3]
+ vcvtneph2hf8s %ymm3, %xmm2
+
+// CHECK: vcvtneph2hf8s %ymm3, %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x2f,0x1b,0xd3]
+ vcvtneph2hf8s %ymm3, %xmm2 {%k7}
+
+// CHECK: vcvtneph2hf8s %ymm3, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x1b,0xd3]
+ vcvtneph2hf8s %ymm3, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8sx 268435456(%esp,%esi,8), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8sx 268435456(%esp,%esi,8), %xmm2
+
+// CHECK: vcvtneph2hf8sx 291(%edi,%eax,4), %xmm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8sx 291(%edi,%eax,4), %xmm2 {%k7}
+
+// CHECK: vcvtneph2hf8s (%eax){1to8}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x18,0x1b,0x10]
+ vcvtneph2hf8s (%eax){1to8}, %xmm2
+
+// CHECK: vcvtneph2hf8sx -512(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8sx -512(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2hf8sx 2032(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x1b,0x51,0x7f]
+ vcvtneph2hf8sx 2032(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s -256(%edx){1to8}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x9f,0x1b,0x52,0x80]
+ vcvtneph2hf8s -256(%edx){1to8}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s (%eax){1to16}, %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x38,0x1b,0x10]
+ vcvtneph2hf8s (%eax){1to16}, %xmm2
+
+// CHECK: vcvtneph2hf8sy -1024(,%ebp,2), %xmm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8sy -1024(,%ebp,2), %xmm2
+
+// CHECK: vcvtneph2hf8sy 4064(%ecx), %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x1b,0x51,0x7f]
+ vcvtneph2hf8sy 4064(%ecx), %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s -256(%edx){1to16}, %xmm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xbf,0x1b,0x52,0x80]
+ vcvtneph2hf8s -256(%edx){1to16}, %xmm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s 268435456(%esp,%esi,8), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8s 268435456(%esp,%esi,8), %ymm2
+
+// CHECK: vcvtneph2hf8s 291(%edi,%eax,4), %ymm2 {%k7}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8s 291(%edi,%eax,4), %ymm2 {%k7}
+
+// CHECK: vcvtneph2hf8s (%eax){1to32}, %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x58,0x1b,0x10]
+ vcvtneph2hf8s (%eax){1to32}, %ymm2
+
+// CHECK: vcvtneph2hf8s -2048(,%ebp,2), %ymm2
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8s -2048(,%ebp,2), %ymm2
+
+// CHECK: vcvtneph2hf8s 8128(%ecx), %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x1b,0x51,0x7f]
+ vcvtneph2hf8s 8128(%ecx), %ymm2 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s -256(%edx){1to32}, %ymm2 {%k7} {z}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xdf,0x1b,0x52,0x80]
+ vcvtneph2hf8s -256(%edx){1to32}, %ymm2 {%k7} {z}
+
diff --git a/llvm/test/MC/X86/avx10.2convert-32-intel.s b/llvm/test/MC/X86/avx10.2convert-32-intel.s
new file mode 100644
index 00000000000000..493cdae7a64259
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2convert-32-intel.s
@@ -0,0 +1,1490 @@
+// RUN: llvm-mc -triple i386 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvt2ps2phx ymm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x28,0x67,0xd4]
+ vcvt2ps2phx ymm2, ymm3, ymm4
+
+// CHECK: vcvt2ps2phx ymm2, ymm3, ymm4, {rn-sae}
+// CHECK: encoding: [0x62,0xf2,0x61,0x18,0x67,0xd4]
+ vcvt2ps2phx ymm2, ymm3, ymm4, {rn-sae}
+
+// CHECK: vcvt2ps2phx ymm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x2f,0x67,0xd4]
+ vcvt2ps2phx ymm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvt2ps2phx ymm2 {k7} {z}, ymm3, ymm4, {rz-sae}
+// CHECK: encoding: [0x62,0xf2,0x61,0xff,0x67,0xd4]
+ vcvt2ps2phx ymm2 {k7} {z}, ymm3, ymm4, {rz-sae}
+
+// CHECK: vcvt2ps2phx zmm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x48,0x67,0xd4]
+ vcvt2ps2phx zmm2, zmm3, zmm4
+
+// CHECK: vcvt2ps2phx zmm2, zmm3, zmm4, {rn-sae}
+// CHECK: encoding: [0x62,0xf2,0x65,0x18,0x67,0xd4]
+ vcvt2ps2phx zmm2, zmm3, zmm4, {rn-sae}
+
+// CHECK: vcvt2ps2phx zmm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x4f,0x67,0xd4]
+ vcvt2ps2phx zmm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvt2ps2phx zmm2 {k7} {z}, zmm3, zmm4, {rz-sae}
+// CHECK: encoding: [0x62,0xf2,0x65,0xff,0x67,0xd4]
+ vcvt2ps2phx zmm2 {k7} {z}, zmm3, zmm4, {rz-sae}
+
+// CHECK: vcvt2ps2phx xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x08,0x67,0xd4]
+ vcvt2ps2phx xmm2, xmm3, xmm4
+
+// CHECK: vcvt2ps2phx xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x0f,0x67,0xd4]
+ vcvt2ps2phx xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvt2ps2phx xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x65,0x8f,0x67,0xd4]
+ vcvt2ps2phx xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvt2ps2phx zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x65,0x48,0x67,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvt2ps2phx zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x65,0x4f,0x67,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvt2ps2phx zmm2, zmm3, dword ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x65,0x58,0x67,0x10]
+ vcvt2ps2phx zmm2, zmm3, dword ptr [eax]{1to16}
+
+// CHECK: vcvt2ps2phx zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf2,0x65,0x48,0x67,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvt2ps2phx zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvt2ps2phx zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x65,0xcf,0x67,0x51,0x7f]
+ vcvt2ps2phx zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvt2ps2phx zmm2 {k7} {z}, zmm3, dword ptr [edx - 512]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x65,0xdf,0x67,0x52,0x80]
+ vcvt2ps2phx zmm2 {k7} {z}, zmm3, dword ptr [edx - 512]{1to16}
+
+// CHECK: vcvt2ps2phx ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x65,0x28,0x67,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvt2ps2phx ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x65,0x2f,0x67,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvt2ps2phx ymm2, ymm3, dword ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x65,0x38,0x67,0x10]
+ vcvt2ps2phx ymm2, ymm3, dword ptr [eax]{1to8}
+
+// CHECK: vcvt2ps2phx ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf2,0x65,0x28,0x67,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvt2ps2phx ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvt2ps2phx ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x65,0xaf,0x67,0x51,0x7f]
+ vcvt2ps2phx ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvt2ps2phx ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x65,0xbf,0x67,0x52,0x80]
+ vcvt2ps2phx ymm2 {k7} {z}, ymm3, dword ptr [edx - 512]{1to8}
+
+// CHECK: vcvt2ps2phx xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x65,0x08,0x67,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvt2ps2phx xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x65,0x0f,0x67,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvt2ps2phx xmm2, xmm3, dword ptr [eax]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x65,0x18,0x67,0x10]
+ vcvt2ps2phx xmm2, xmm3, dword ptr [eax]{1to4}
+
+// CHECK: vcvt2ps2phx xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf2,0x65,0x08,0x67,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvt2ps2phx xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvt2ps2phx xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x65,0x8f,0x67,0x51,0x7f]
+ vcvt2ps2phx xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvt2ps2phx xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
+// CHECK: encoding: [0x62,0xf2,0x65,0x9f,0x67,0x52,0x80]
+ vcvt2ps2phx xmm2 {k7} {z}, xmm3, dword ptr [edx - 512]{1to4}
+
+// CHECK: vcvtbiasph2bf8 ymm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x48,0x74,0xd4]
+ vcvtbiasph2bf8 ymm2, zmm3, zmm4
+
+// CHECK: vcvtbiasph2bf8 ymm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x4f,0x74,0xd4]
+ vcvtbiasph2bf8 ymm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x64,0xcf,0x74,0xd4]
+ vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2bf8 xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x08,0x74,0xd4]
+ vcvtbiasph2bf8 xmm2, xmm3, xmm4
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x0f,0x74,0xd4]
+ vcvtbiasph2bf8 xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x8f,0x74,0xd4]
+ vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2bf8 xmm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x28,0x74,0xd4]
+ vcvtbiasph2bf8 xmm2, ymm3, ymm4
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x64,0x2f,0x74,0xd4]
+ vcvtbiasph2bf8 xmm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x64,0xaf,0x74,0xd4]
+ vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2bf8 xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x64,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x64,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2bf8 xmm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x64,0x38,0x74,0x10]
+ vcvtbiasph2bf8 xmm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtbiasph2bf8 xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf2,0x64,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8 xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x64,0xaf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x64,0xbf,0x74,0x52,0x80]
+ vcvtbiasph2bf8 xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtbiasph2bf8 ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x64,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2bf8 ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x64,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2bf8 ymm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf2,0x64,0x58,0x74,0x10]
+ vcvtbiasph2bf8 ymm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtbiasph2bf8 ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf2,0x64,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8 ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x64,0xcf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf2,0x64,0xdf,0x74,0x52,0x80]
+ vcvtbiasph2bf8 ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtbiasph2bf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x64,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x64,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2bf8 xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x64,0x18,0x74,0x10]
+ vcvtbiasph2bf8 xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtbiasph2bf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf2,0x64,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x64,0x8f,0x74,0x51,0x7f]
+ vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x64,0x9f,0x74,0x52,0x80]
+ vcvtbiasph2bf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtbiasph2bf8s ymm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x74,0xd4]
+ vcvtbiasph2bf8s ymm2, zmm3, zmm4
+
+// CHECK: vcvtbiasph2bf8s ymm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x74,0xd4]
+ vcvtbiasph2bf8s ymm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x74,0xd4]
+ vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2bf8s xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x74,0xd4]
+ vcvtbiasph2bf8s xmm2, xmm3, xmm4
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x74,0xd4]
+ vcvtbiasph2bf8s xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x74,0xd4]
+ vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2bf8s xmm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x74,0xd4]
+ vcvtbiasph2bf8s xmm2, ymm3, ymm4
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x74,0xd4]
+ vcvtbiasph2bf8s xmm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x74,0xd4]
+ vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2bf8s xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2bf8s xmm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x64,0x38,0x74,0x10]
+ vcvtbiasph2bf8s xmm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtbiasph2bf8s xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8s xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x64,0xbf,0x74,0x52,0x80]
+ vcvtbiasph2bf8s xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtbiasph2bf8s ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2bf8s ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2bf8s ymm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x64,0x58,0x74,0x10]
+ vcvtbiasph2bf8s ymm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtbiasph2bf8s ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8s ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x74,0x51,0x7f]
+ vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x64,0xdf,0x74,0x52,0x80]
+ vcvtbiasph2bf8s ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtbiasph2bf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2bf8s xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x64,0x18,0x74,0x10]
+ vcvtbiasph2bf8s xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtbiasph2bf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x74,0x51,0x7f]
+ vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x64,0x9f,0x74,0x52,0x80]
+ vcvtbiasph2bf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtbiasph2hf8 ymm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x18,0xd4]
+ vcvtbiasph2hf8 ymm2, zmm3, zmm4
+
+// CHECK: vcvtbiasph2hf8 ymm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x18,0xd4]
+ vcvtbiasph2hf8 ymm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x18,0xd4]
+ vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2hf8 xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x18,0xd4]
+ vcvtbiasph2hf8 xmm2, xmm3, xmm4
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x18,0xd4]
+ vcvtbiasph2hf8 xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x18,0xd4]
+ vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2hf8 xmm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x18,0xd4]
+ vcvtbiasph2hf8 xmm2, ymm3, ymm4
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x18,0xd4]
+ vcvtbiasph2hf8 xmm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x18,0xd4]
+ vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2hf8 xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2hf8 xmm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x64,0x38,0x18,0x10]
+ vcvtbiasph2hf8 xmm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtbiasph2hf8 xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8 xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x18,0x51,0x7f]
+ vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x64,0xbf,0x18,0x52,0x80]
+ vcvtbiasph2hf8 xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtbiasph2hf8 ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2hf8 ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2hf8 ymm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x64,0x58,0x18,0x10]
+ vcvtbiasph2hf8 ymm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtbiasph2hf8 ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8 ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x18,0x51,0x7f]
+ vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x64,0xdf,0x18,0x52,0x80]
+ vcvtbiasph2hf8 ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtbiasph2hf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2hf8 xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x64,0x18,0x18,0x10]
+ vcvtbiasph2hf8 xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtbiasph2hf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x18,0x51,0x7f]
+ vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x64,0x9f,0x18,0x52,0x80]
+ vcvtbiasph2hf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtbiasph2hf8s ymm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x1b,0xd4]
+ vcvtbiasph2hf8s ymm2, zmm3, zmm4
+
+// CHECK: vcvtbiasph2hf8s ymm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x1b,0xd4]
+ vcvtbiasph2hf8s ymm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x1b,0xd4]
+ vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtbiasph2hf8s xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x1b,0xd4]
+ vcvtbiasph2hf8s xmm2, xmm3, xmm4
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x1b,0xd4]
+ vcvtbiasph2hf8s xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x1b,0xd4]
+ vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtbiasph2hf8s xmm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x1b,0xd4]
+ vcvtbiasph2hf8s xmm2, ymm3, ymm4
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x1b,0xd4]
+ vcvtbiasph2hf8s xmm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x1b,0xd4]
+ vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtbiasph2hf8s xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s xmm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x2f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s xmm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2hf8s xmm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x64,0x38,0x1b,0x10]
+ vcvtbiasph2hf8s xmm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtbiasph2hf8s xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x64,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8s xmm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x64,0xaf,0x1b,0x51,0x7f]
+ vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x64,0xbf,0x1b,0x52,0x80]
+ vcvtbiasph2hf8s xmm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtbiasph2hf8s ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s ymm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2hf8s ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s ymm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2hf8s ymm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x64,0x58,0x1b,0x10]
+ vcvtbiasph2hf8s ymm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtbiasph2hf8s ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x64,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8s ymm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x64,0xcf,0x1b,0x51,0x7f]
+ vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x64,0xdf,0x1b,0x52,0x80]
+ vcvtbiasph2hf8s ymm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtbiasph2hf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x64,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtbiasph2hf8s xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x64,0x18,0x1b,0x10]
+ vcvtbiasph2hf8s xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtbiasph2hf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x64,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x64,0x8f,0x1b,0x51,0x7f]
+ vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x64,0x9f,0x1b,0x52,0x80]
+ vcvtbiasph2hf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvthf82ph xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0xd3]
+ vcvthf82ph xmm2, xmm3
+
+// CHECK: vcvthf82ph xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x1e,0xd3]
+ vcvthf82ph xmm2 {k7}, xmm3
+
+// CHECK: vcvthf82ph xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x1e,0xd3]
+ vcvthf82ph xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvthf82ph ymm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0xd3]
+ vcvthf82ph ymm2, xmm3
+
+// CHECK: vcvthf82ph ymm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x1e,0xd3]
+ vcvthf82ph ymm2 {k7}, xmm3
+
+// CHECK: vcvthf82ph ymm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x1e,0xd3]
+ vcvthf82ph ymm2 {k7} {z}, xmm3
+
+// CHECK: vcvthf82ph zmm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0xd3]
+ vcvthf82ph zmm2, ymm3
+
+// CHECK: vcvthf82ph zmm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x1e,0xd3]
+ vcvthf82ph zmm2 {k7}, ymm3
+
+// CHECK: vcvthf82ph zmm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x1e,0xd3]
+ vcvthf82ph zmm2 {k7} {z}, ymm3
+
+// CHECK: vcvthf82ph xmm2, qword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvthf82ph xmm2, qword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvthf82ph xmm2 {k7}, qword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x0f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvthf82ph xmm2 {k7}, qword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvthf82ph xmm2, qword ptr [eax]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0x10]
+ vcvthf82ph xmm2, qword ptr [eax]
+
+// CHECK: vcvthf82ph xmm2, qword ptr [2*ebp - 256]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x08,0x1e,0x14,0x6d,0x00,0xff,0xff,0xff]
+ vcvthf82ph xmm2, qword ptr [2*ebp - 256]
+
+// CHECK: vcvthf82ph xmm2 {k7} {z}, qword ptr [ecx + 1016]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x1e,0x51,0x7f]
+ vcvthf82ph xmm2 {k7} {z}, qword ptr [ecx + 1016]
+
+// CHECK: vcvthf82ph xmm2 {k7} {z}, qword ptr [edx - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x8f,0x1e,0x52,0x80]
+ vcvthf82ph xmm2 {k7} {z}, qword ptr [edx - 1024]
+
+// CHECK: vcvthf82ph ymm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvthf82ph ymm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvthf82ph ymm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x2f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvthf82ph ymm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvthf82ph ymm2, xmmword ptr [eax]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0x10]
+ vcvthf82ph ymm2, xmmword ptr [eax]
+
+// CHECK: vcvthf82ph ymm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x28,0x1e,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvthf82ph ymm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvthf82ph ymm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x1e,0x51,0x7f]
+ vcvthf82ph ymm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvthf82ph ymm2 {k7} {z}, xmmword ptr [edx - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xaf,0x1e,0x52,0x80]
+ vcvthf82ph ymm2 {k7} {z}, xmmword ptr [edx - 2048]
+
+// CHECK: vcvthf82ph zmm2, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvthf82ph zmm2, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvthf82ph zmm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x4f,0x1e,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvthf82ph zmm2 {k7}, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvthf82ph zmm2, ymmword ptr [eax]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0x10]
+ vcvthf82ph zmm2, ymmword ptr [eax]
+
+// CHECK: vcvthf82ph zmm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7f,0x48,0x1e,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvthf82ph zmm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvthf82ph zmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x1e,0x51,0x7f]
+ vcvthf82ph zmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvthf82ph zmm2 {k7} {z}, ymmword ptr [edx - 4096]
+// CHECK: encoding: [0x62,0xf5,0x7f,0xcf,0x1e,0x52,0x80]
+ vcvthf82ph zmm2 {k7} {z}, ymmword ptr [edx - 4096]
+
+// CHECK: vcvtne2ph2bf8 ymm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x28,0x74,0xd4]
+ vcvtne2ph2bf8 ymm2, ymm3, ymm4
+
+// CHECK: vcvtne2ph2bf8 ymm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x2f,0x74,0xd4]
+ vcvtne2ph2bf8 ymm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf2,0x67,0xaf,0x74,0xd4]
+ vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2bf8 zmm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x48,0x74,0xd4]
+ vcvtne2ph2bf8 zmm2, zmm3, zmm4
+
+// CHECK: vcvtne2ph2bf8 zmm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x4f,0x74,0xd4]
+ vcvtne2ph2bf8 zmm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf2,0x67,0xcf,0x74,0xd4]
+ vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2bf8 xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x08,0x74,0xd4]
+ vcvtne2ph2bf8 xmm2, xmm3, xmm4
+
+// CHECK: vcvtne2ph2bf8 xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x0f,0x74,0xd4]
+ vcvtne2ph2bf8 xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf2,0x67,0x8f,0x74,0xd4]
+ vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2bf8 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x67,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2bf8 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x67,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2bf8 zmm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf2,0x67,0x58,0x74,0x10]
+ vcvtne2ph2bf8 zmm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtne2ph2bf8 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf2,0x67,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x67,0xcf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf2,0x67,0xdf,0x74,0x52,0x80]
+ vcvtne2ph2bf8 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtne2ph2bf8 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x67,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2bf8 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x67,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2bf8 ymm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x67,0x38,0x74,0x10]
+ vcvtne2ph2bf8 ymm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtne2ph2bf8 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf2,0x67,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x67,0xaf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x67,0xbf,0x74,0x52,0x80]
+ vcvtne2ph2bf8 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtne2ph2bf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x67,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2bf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x67,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2bf8 xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x67,0x18,0x74,0x10]
+ vcvtne2ph2bf8 xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtne2ph2bf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf2,0x67,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x67,0x8f,0x74,0x51,0x7f]
+ vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x67,0x9f,0x74,0x52,0x80]
+ vcvtne2ph2bf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtne2ph2bf8s ymm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x74,0xd4]
+ vcvtne2ph2bf8s ymm2, ymm3, ymm4
+
+// CHECK: vcvtne2ph2bf8s ymm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x74,0xd4]
+ vcvtne2ph2bf8s ymm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x74,0xd4]
+ vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2bf8s zmm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x74,0xd4]
+ vcvtne2ph2bf8s zmm2, zmm3, zmm4
+
+// CHECK: vcvtne2ph2bf8s zmm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x74,0xd4]
+ vcvtne2ph2bf8s zmm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x74,0xd4]
+ vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2bf8s xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x74,0xd4]
+ vcvtne2ph2bf8s xmm2, xmm3, xmm4
+
+// CHECK: vcvtne2ph2bf8s xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x74,0xd4]
+ vcvtne2ph2bf8s xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x74,0xd4]
+ vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2bf8s zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2bf8s zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2bf8s zmm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x67,0x58,0x74,0x10]
+ vcvtne2ph2bf8s zmm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtne2ph2bf8s zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8s zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x67,0xdf,0x74,0x52,0x80]
+ vcvtne2ph2bf8s zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtne2ph2bf8s ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2bf8s ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2bf8s ymm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x67,0x38,0x74,0x10]
+ vcvtne2ph2bf8s ymm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtne2ph2bf8s ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8s ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x74,0x51,0x7f]
+ vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x67,0xbf,0x74,0x52,0x80]
+ vcvtne2ph2bf8s ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtne2ph2bf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2bf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2bf8s xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x67,0x18,0x74,0x10]
+ vcvtne2ph2bf8s xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtne2ph2bf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x74,0x51,0x7f]
+ vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x67,0x9f,0x74,0x52,0x80]
+ vcvtne2ph2bf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtne2ph2hf8 ymm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x18,0xd4]
+ vcvtne2ph2hf8 ymm2, ymm3, ymm4
+
+// CHECK: vcvtne2ph2hf8 ymm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x18,0xd4]
+ vcvtne2ph2hf8 ymm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x18,0xd4]
+ vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2hf8 zmm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x18,0xd4]
+ vcvtne2ph2hf8 zmm2, zmm3, zmm4
+
+// CHECK: vcvtne2ph2hf8 zmm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x18,0xd4]
+ vcvtne2ph2hf8 zmm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x18,0xd4]
+ vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2hf8 xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x18,0xd4]
+ vcvtne2ph2hf8 xmm2, xmm3, xmm4
+
+// CHECK: vcvtne2ph2hf8 xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x18,0xd4]
+ vcvtne2ph2hf8 xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x18,0xd4]
+ vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2hf8 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2hf8 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2hf8 zmm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x67,0x58,0x18,0x10]
+ vcvtne2ph2hf8 zmm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtne2ph2hf8 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8 zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x18,0x51,0x7f]
+ vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x67,0xdf,0x18,0x52,0x80]
+ vcvtne2ph2hf8 zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtne2ph2hf8 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2hf8 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2hf8 ymm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x67,0x38,0x18,0x10]
+ vcvtne2ph2hf8 ymm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtne2ph2hf8 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8 ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x18,0x51,0x7f]
+ vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x67,0xbf,0x18,0x52,0x80]
+ vcvtne2ph2hf8 ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtne2ph2hf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2hf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2hf8 xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x67,0x18,0x18,0x10]
+ vcvtne2ph2hf8 xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtne2ph2hf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8 xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x18,0x51,0x7f]
+ vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x67,0x9f,0x18,0x52,0x80]
+ vcvtne2ph2hf8 xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtne2ph2hf8s ymm2, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x1b,0xd4]
+ vcvtne2ph2hf8s ymm2, ymm3, ymm4
+
+// CHECK: vcvtne2ph2hf8s ymm2 {k7}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x1b,0xd4]
+ vcvtne2ph2hf8s ymm2 {k7}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, ymm4
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x1b,0xd4]
+ vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, ymm4
+
+// CHECK: vcvtne2ph2hf8s zmm2, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x1b,0xd4]
+ vcvtne2ph2hf8s zmm2, zmm3, zmm4
+
+// CHECK: vcvtne2ph2hf8s zmm2 {k7}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x1b,0xd4]
+ vcvtne2ph2hf8s zmm2 {k7}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, zmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x1b,0xd4]
+ vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, zmm4
+
+// CHECK: vcvtne2ph2hf8s xmm2, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x1b,0xd4]
+ vcvtne2ph2hf8s xmm2, xmm3, xmm4
+
+// CHECK: vcvtne2ph2hf8s xmm2 {k7}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x1b,0xd4]
+ vcvtne2ph2hf8s xmm2 {k7}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, xmm4
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x1b,0xd4]
+ vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, xmm4
+
+// CHECK: vcvtne2ph2hf8s zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s zmm2, zmm3, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2hf8s zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s zmm2 {k7}, zmm3, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2hf8s zmm2, zmm3, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x67,0x58,0x1b,0x10]
+ vcvtne2ph2hf8s zmm2, zmm3, word ptr [eax]{1to32}
+
+// CHECK: vcvtne2ph2hf8s zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x67,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8s zmm2, zmm3, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x67,0xcf,0x1b,0x51,0x7f]
+ vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x67,0xdf,0x1b,0x52,0x80]
+ vcvtne2ph2hf8s zmm2 {k7} {z}, zmm3, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtne2ph2hf8s ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s ymm2, ymm3, ymmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2hf8s ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x2f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s ymm2 {k7}, ymm3, ymmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2hf8s ymm2, ymm3, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x67,0x38,0x1b,0x10]
+ vcvtne2ph2hf8s ymm2, ymm3, word ptr [eax]{1to16}
+
+// CHECK: vcvtne2ph2hf8s ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x67,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8s ymm2, ymm3, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x67,0xaf,0x1b,0x51,0x7f]
+ vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x67,0xbf,0x1b,0x52,0x80]
+ vcvtne2ph2hf8s ymm2 {k7} {z}, ymm3, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtne2ph2hf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s xmm2, xmm3, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtne2ph2hf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x67,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s xmm2 {k7}, xmm3, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtne2ph2hf8s xmm2, xmm3, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x67,0x18,0x1b,0x10]
+ vcvtne2ph2hf8s xmm2, xmm3, word ptr [eax]{1to8}
+
+// CHECK: vcvtne2ph2hf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x67,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8s xmm2, xmm3, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x67,0x8f,0x1b,0x51,0x7f]
+ vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x67,0x9f,0x1b,0x52,0x80]
+ vcvtne2ph2hf8s xmm2 {k7} {z}, xmm3, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtneph2bf8 xmm2, xmm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x74,0xd3]
+ vcvtneph2bf8 xmm2, xmm3
+
+// CHECK: vcvtneph2bf8 xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x0f,0x74,0xd3]
+ vcvtneph2bf8 xmm2 {k7}, xmm3
+
+// CHECK: vcvtneph2bf8 xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x8f,0x74,0xd3]
+ vcvtneph2bf8 xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtneph2bf8 ymm2, zmm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x74,0xd3]
+ vcvtneph2bf8 ymm2, zmm3
+
+// CHECK: vcvtneph2bf8 ymm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x4f,0x74,0xd3]
+ vcvtneph2bf8 ymm2 {k7}, zmm3
+
+// CHECK: vcvtneph2bf8 ymm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0xcf,0x74,0xd3]
+ vcvtneph2bf8 ymm2 {k7} {z}, zmm3
+
+// CHECK: vcvtneph2bf8 xmm2, ymm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x74,0xd3]
+ vcvtneph2bf8 xmm2, ymm3
+
+// CHECK: vcvtneph2bf8 xmm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0x2f,0x74,0xd3]
+ vcvtneph2bf8 xmm2 {k7}, ymm3
+
+// CHECK: vcvtneph2bf8 xmm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf2,0x7e,0xaf,0x74,0xd3]
+ vcvtneph2bf8 xmm2 {k7} {z}, ymm3
+
+// CHECK: vcvtneph2bf8 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2bf8 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2bf8 xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x18,0x74,0x10]
+ vcvtneph2bf8 xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtneph2bf8 xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8 xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtneph2bf8 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x8f,0x74,0x51,0x7f]
+ vcvtneph2bf8 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtneph2bf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x9f,0x74,0x52,0x80]
+ vcvtneph2bf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtneph2bf8 xmm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x38,0x74,0x10]
+ vcvtneph2bf8 xmm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtneph2bf8 xmm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8 xmm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtneph2bf8 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf2,0x7e,0xaf,0x74,0x51,0x7f]
+ vcvtneph2bf8 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtneph2bf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xbf,0x74,0x52,0x80]
+ vcvtneph2bf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtneph2bf8 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2bf8 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2bf8 ymm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf2,0x7e,0x58,0x74,0x10]
+ vcvtneph2bf8 ymm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtneph2bf8 ymm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf2,0x7e,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8 ymm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtneph2bf8 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf2,0x7e,0xcf,0x74,0x51,0x7f]
+ vcvtneph2bf8 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtneph2bf8 ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf2,0x7e,0xdf,0x74,0x52,0x80]
+ vcvtneph2bf8 ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtneph2bf8s xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x74,0xd3]
+ vcvtneph2bf8s xmm2, xmm3
+
+// CHECK: vcvtneph2bf8s xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x74,0xd3]
+ vcvtneph2bf8s xmm2 {k7}, xmm3
+
+// CHECK: vcvtneph2bf8s xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x74,0xd3]
+ vcvtneph2bf8s xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtneph2bf8s ymm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x74,0xd3]
+ vcvtneph2bf8s ymm2, zmm3
+
+// CHECK: vcvtneph2bf8s ymm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x74,0xd3]
+ vcvtneph2bf8s ymm2 {k7}, zmm3
+
+// CHECK: vcvtneph2bf8s ymm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x74,0xd3]
+ vcvtneph2bf8s ymm2 {k7} {z}, zmm3
+
+// CHECK: vcvtneph2bf8s xmm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x74,0xd3]
+ vcvtneph2bf8s xmm2, ymm3
+
+// CHECK: vcvtneph2bf8s xmm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x2f,0x74,0xd3]
+ vcvtneph2bf8s xmm2 {k7}, ymm3
+
+// CHECK: vcvtneph2bf8s xmm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x74,0xd3]
+ vcvtneph2bf8s xmm2 {k7} {z}, ymm3
+
+// CHECK: vcvtneph2bf8s xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8s xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2bf8s xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8s xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2bf8s xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x18,0x74,0x10]
+ vcvtneph2bf8s xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtneph2bf8s xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x74,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8s xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtneph2bf8s xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x74,0x51,0x7f]
+ vcvtneph2bf8s xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtneph2bf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x9f,0x74,0x52,0x80]
+ vcvtneph2bf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtneph2bf8s xmm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x38,0x74,0x10]
+ vcvtneph2bf8s xmm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtneph2bf8s xmm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x74,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8s xmm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtneph2bf8s xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x74,0x51,0x7f]
+ vcvtneph2bf8s xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtneph2bf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xbf,0x74,0x52,0x80]
+ vcvtneph2bf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtneph2bf8s ymm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x74,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8s ymm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2bf8s ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x74,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8s ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2bf8s ymm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x58,0x74,0x10]
+ vcvtneph2bf8s ymm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtneph2bf8s ymm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x74,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8s ymm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtneph2bf8s ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x74,0x51,0x7f]
+ vcvtneph2bf8s ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtneph2bf8s ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xdf,0x74,0x52,0x80]
+ vcvtneph2bf8s ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtneph2hf8 xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x18,0xd3]
+ vcvtneph2hf8 xmm2, xmm3
+
+// CHECK: vcvtneph2hf8 xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x18,0xd3]
+ vcvtneph2hf8 xmm2 {k7}, xmm3
+
+// CHECK: vcvtneph2hf8 xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x18,0xd3]
+ vcvtneph2hf8 xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtneph2hf8 ymm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x18,0xd3]
+ vcvtneph2hf8 ymm2, zmm3
+
+// CHECK: vcvtneph2hf8 ymm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x18,0xd3]
+ vcvtneph2hf8 ymm2 {k7}, zmm3
+
+// CHECK: vcvtneph2hf8 ymm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x18,0xd3]
+ vcvtneph2hf8 ymm2 {k7} {z}, zmm3
+
+// CHECK: vcvtneph2hf8 xmm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x18,0xd3]
+ vcvtneph2hf8 xmm2, ymm3
+
+// CHECK: vcvtneph2hf8 xmm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x2f,0x18,0xd3]
+ vcvtneph2hf8 xmm2 {k7}, ymm3
+
+// CHECK: vcvtneph2hf8 xmm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x18,0xd3]
+ vcvtneph2hf8 xmm2 {k7} {z}, ymm3
+
+// CHECK: vcvtneph2hf8 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8 xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2hf8 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8 xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2hf8 xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x18,0x18,0x10]
+ vcvtneph2hf8 xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtneph2hf8 xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x18,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8 xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtneph2hf8 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x18,0x51,0x7f]
+ vcvtneph2hf8 xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtneph2hf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x9f,0x18,0x52,0x80]
+ vcvtneph2hf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtneph2hf8 xmm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x38,0x18,0x10]
+ vcvtneph2hf8 xmm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtneph2hf8 xmm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x18,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8 xmm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtneph2hf8 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x18,0x51,0x7f]
+ vcvtneph2hf8 xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtneph2hf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xbf,0x18,0x52,0x80]
+ vcvtneph2hf8 xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtneph2hf8 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x18,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8 ymm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2hf8 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x18,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8 ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2hf8 ymm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x58,0x18,0x10]
+ vcvtneph2hf8 ymm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtneph2hf8 ymm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x18,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8 ymm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtneph2hf8 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x18,0x51,0x7f]
+ vcvtneph2hf8 ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtneph2hf8 ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xdf,0x18,0x52,0x80]
+ vcvtneph2hf8 ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
+// CHECK: vcvtneph2hf8s xmm2, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x1b,0xd3]
+ vcvtneph2hf8s xmm2, xmm3
+
+// CHECK: vcvtneph2hf8s xmm2 {k7}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x1b,0xd3]
+ vcvtneph2hf8s xmm2 {k7}, xmm3
+
+// CHECK: vcvtneph2hf8s xmm2 {k7} {z}, xmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x1b,0xd3]
+ vcvtneph2hf8s xmm2 {k7} {z}, xmm3
+
+// CHECK: vcvtneph2hf8s ymm2, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x1b,0xd3]
+ vcvtneph2hf8s ymm2, zmm3
+
+// CHECK: vcvtneph2hf8s ymm2 {k7}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x1b,0xd3]
+ vcvtneph2hf8s ymm2 {k7}, zmm3
+
+// CHECK: vcvtneph2hf8s ymm2 {k7} {z}, zmm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x1b,0xd3]
+ vcvtneph2hf8s ymm2 {k7} {z}, zmm3
+
+// CHECK: vcvtneph2hf8s xmm2, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x1b,0xd3]
+ vcvtneph2hf8s xmm2, ymm3
+
+// CHECK: vcvtneph2hf8s xmm2 {k7}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0x2f,0x1b,0xd3]
+ vcvtneph2hf8s xmm2 {k7}, ymm3
+
+// CHECK: vcvtneph2hf8s xmm2 {k7} {z}, ymm3
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x1b,0xd3]
+ vcvtneph2hf8s xmm2 {k7} {z}, ymm3
+
+// CHECK: vcvtneph2hf8s xmm2, xmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8s xmm2, xmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2hf8s xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x0f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8s xmm2 {k7}, xmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2hf8s xmm2, word ptr [eax]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x18,0x1b,0x10]
+ vcvtneph2hf8s xmm2, word ptr [eax]{1to8}
+
+// CHECK: vcvtneph2hf8s xmm2, xmmword ptr [2*ebp - 512]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x08,0x1b,0x14,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8s xmm2, xmmword ptr [2*ebp - 512]
+
+// CHECK: vcvtneph2hf8s xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x8f,0x1b,0x51,0x7f]
+ vcvtneph2hf8s xmm2 {k7} {z}, xmmword ptr [ecx + 2032]
+
+// CHECK: vcvtneph2hf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x9f,0x1b,0x52,0x80]
+ vcvtneph2hf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to8}
+
+// CHECK: vcvtneph2hf8s xmm2, word ptr [eax]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x38,0x1b,0x10]
+ vcvtneph2hf8s xmm2, word ptr [eax]{1to16}
+
+// CHECK: vcvtneph2hf8s xmm2, ymmword ptr [2*ebp - 1024]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x28,0x1b,0x14,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8s xmm2, ymmword ptr [2*ebp - 1024]
+
+// CHECK: vcvtneph2hf8s xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+// CHECK: encoding: [0x62,0xf5,0x7e,0xaf,0x1b,0x51,0x7f]
+ vcvtneph2hf8s xmm2 {k7} {z}, ymmword ptr [ecx + 4064]
+
+// CHECK: vcvtneph2hf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xbf,0x1b,0x52,0x80]
+ vcvtneph2hf8s xmm2 {k7} {z}, word ptr [edx - 256]{1to16}
+
+// CHECK: vcvtneph2hf8s ymm2, zmmword ptr [esp + 8*esi + 268435456]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x1b,0x94,0xf4,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8s ymm2, zmmword ptr [esp + 8*esi + 268435456]
+
+// CHECK: vcvtneph2hf8s ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x4f,0x1b,0x94,0x87,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8s ymm2 {k7}, zmmword ptr [edi + 4*eax + 291]
+
+// CHECK: vcvtneph2hf8s ymm2, word ptr [eax]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7e,0x58,0x1b,0x10]
+ vcvtneph2hf8s ymm2, word ptr [eax]{1to32}
+
+// CHECK: vcvtneph2hf8s ymm2, zmmword ptr [2*ebp - 2048]
+// CHECK: encoding: [0x62,0xf5,0x7e,0x48,0x1b,0x14,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8s ymm2, zmmword ptr [2*ebp - 2048]
+
+// CHECK: vcvtneph2hf8s ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+// CHECK: encoding: [0x62,0xf5,0x7e,0xcf,0x1b,0x51,0x7f]
+ vcvtneph2hf8s ymm2 {k7} {z}, zmmword ptr [ecx + 8128]
+
+// CHECK: vcvtneph2hf8s ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+// CHECK: encoding: [0x62,0xf5,0x7e,0xdf,0x1b,0x52,0x80]
+ vcvtneph2hf8s ymm2 {k7} {z}, word ptr [edx - 256]{1to32}
+
diff --git a/llvm/test/MC/X86/avx10.2convert-64-att.s b/llvm/test/MC/X86/avx10.2convert-64-att.s
new file mode 100644
index 00000000000000..ccf1e004c07f25
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2convert-64-att.s
@@ -0,0 +1,1490 @@
+// RUN: llvm-mc -triple x86_64 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvt2ps2phx %ymm24, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0x82,0x45,0x20,0x67,0xf0]
+ vcvt2ps2phx %ymm24, %ymm23, %ymm22
+
+// CHECK: vcvt2ps2phx {rn-sae}, %ymm24, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0x82,0x41,0x10,0x67,0xf0]
+ vcvt2ps2phx {rn-sae}, %ymm24, %ymm23, %ymm22
+
+// CHECK: vcvt2ps2phx %ymm24, %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x45,0x27,0x67,0xf0]
+ vcvt2ps2phx %ymm24, %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvt2ps2phx {rz-sae}, %ymm24, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x41,0xf7,0x67,0xf0]
+ vcvt2ps2phx {rz-sae}, %ymm24, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx %zmm24, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0x82,0x45,0x40,0x67,0xf0]
+ vcvt2ps2phx %zmm24, %zmm23, %zmm22
+
+// CHECK: vcvt2ps2phx {rn-sae}, %zmm24, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0x82,0x45,0x10,0x67,0xf0]
+ vcvt2ps2phx {rn-sae}, %zmm24, %zmm23, %zmm22
+
+// CHECK: vcvt2ps2phx %zmm24, %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x45,0x47,0x67,0xf0]
+ vcvt2ps2phx %zmm24, %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvt2ps2phx {rz-sae}, %zmm24, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x45,0xf7,0x67,0xf0]
+ vcvt2ps2phx {rz-sae}, %zmm24, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x82,0x45,0x00,0x67,0xf0]
+ vcvt2ps2phx %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x45,0x07,0x67,0xf0]
+ vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x45,0x87,0x67,0xf0]
+ vcvt2ps2phx %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx 268435456(%rbp,%r14,8), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa2,0x45,0x40,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx 268435456(%rbp,%r14,8), %zmm23, %zmm22
+
+// CHECK: vcvt2ps2phx 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x45,0x47,0x67,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvt2ps2phx (%rip){1to16}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe2,0x45,0x50,0x67,0x35,0x00,0x00,0x00,0x00]
+ vcvt2ps2phx (%rip){1to16}, %zmm23, %zmm22
+
+// CHECK: vcvt2ps2phx -2048(,%rbp,2), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe2,0x45,0x40,0x67,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvt2ps2phx -2048(,%rbp,2), %zmm23, %zmm22
+
+// CHECK: vcvt2ps2phx 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x45,0xc7,0x67,0x71,0x7f]
+ vcvt2ps2phx 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x45,0xd7,0x67,0x72,0x80]
+ vcvt2ps2phx -512(%rdx){1to16}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx 268435456(%rbp,%r14,8), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa2,0x45,0x20,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx 268435456(%rbp,%r14,8), %ymm23, %ymm22
+
+// CHECK: vcvt2ps2phx 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x45,0x27,0x67,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvt2ps2phx (%rip){1to8}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x45,0x30,0x67,0x35,0x00,0x00,0x00,0x00]
+ vcvt2ps2phx (%rip){1to8}, %ymm23, %ymm22
+
+// CHECK: vcvt2ps2phx -1024(,%rbp,2), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x45,0x20,0x67,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvt2ps2phx -1024(,%rbp,2), %ymm23, %ymm22
+
+// CHECK: vcvt2ps2phx 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x45,0xa7,0x67,0x71,0x7f]
+ vcvt2ps2phx 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x45,0xb7,0x67,0x72,0x80]
+ vcvt2ps2phx -512(%rdx){1to8}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvt2ps2phx 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x45,0x07,0x67,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvt2ps2phx (%rip){1to4}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x67,0x35,0x00,0x00,0x00,0x00]
+ vcvt2ps2phx (%rip){1to4}, %xmm23, %xmm22
+
+// CHECK: vcvt2ps2phx -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x67,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvt2ps2phx -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvt2ps2phx 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x45,0x87,0x67,0x71,0x7f]
+ vcvt2ps2phx 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvt2ps2phx -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x45,0x97,0x67,0x72,0x80]
+ vcvt2ps2phx -512(%rdx){1to4}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0x82,0x44,0x40,0x74,0xf0]
+ vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x44,0x47,0x74,0xf0]
+ vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x44,0xc7,0x74,0xf0]
+ vcvtbiasph2bf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x82,0x44,0x00,0x74,0xf0]
+ vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x44,0x07,0x74,0xf0]
+ vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x44,0x87,0x74,0xf0]
+ vcvtbiasph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0x82,0x44,0x20,0x74,0xf0]
+ vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x44,0x27,0x74,0xf0]
+ vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x44,0xa7,0x74,0xf0]
+ vcvtbiasph2bf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa2,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8 (%rip){1to16}, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8 (%rip){1to16}, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 -1024(,%rbp,2), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8 -1024(,%rbp,2), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x44,0xa7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x44,0xb7,0x74,0x72,0x80]
+ vcvtbiasph2bf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa2,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8 (%rip){1to32}, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8 (%rip){1to32}, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8 -2048(,%rbp,2), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8 -2048(,%rbp,2), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x44,0xc7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x44,0xd7,0x74,0x72,0x80]
+ vcvtbiasph2bf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa2,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8 (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8 (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8 -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x44,0x87,0x74,0x71,0x7f]
+ vcvtbiasph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x44,0x97,0x74,0x72,0x80]
+ vcvtbiasph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0x85,0x44,0x40,0x74,0xf0]
+ vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x47,0x74,0xf0]
+ vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0xc7,0x74,0xf0]
+ vcvtbiasph2bf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x44,0x00,0x74,0xf0]
+ vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x07,0x74,0xf0]
+ vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0x87,0x74,0xf0]
+ vcvtbiasph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x44,0x20,0x74,0xf0]
+ vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x27,0x74,0xf0]
+ vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0xa7,0x74,0xf0]
+ vcvtbiasph2bf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8s (%rip){1to16}, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8s (%rip){1to16}, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s -1024(,%rbp,2), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8s -1024(,%rbp,2), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xa7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xb7,0x74,0x72,0x80]
+ vcvtbiasph2bf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8s (%rip){1to32}, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8s (%rip){1to32}, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8s -2048(,%rbp,2), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8s -2048(,%rbp,2), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2bf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xc7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xd7,0x74,0x72,0x80]
+ vcvtbiasph2bf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2bf8s (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8s (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8s -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0x87,0x74,0x71,0x7f]
+ vcvtbiasph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0x97,0x74,0x72,0x80]
+ vcvtbiasph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0x85,0x44,0x40,0x18,0xf0]
+ vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x47,0x18,0xf0]
+ vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0xc7,0x18,0xf0]
+ vcvtbiasph2hf8 %zmm24, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x44,0x00,0x18,0xf0]
+ vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x07,0x18,0xf0]
+ vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0x87,0x18,0xf0]
+ vcvtbiasph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x44,0x20,0x18,0xf0]
+ vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x27,0x18,0xf0]
+ vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0xa7,0x18,0xf0]
+ vcvtbiasph2hf8 %ymm24, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 268435456(%rbp,%r14,8), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8 (%rip){1to16}, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x30,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8 (%rip){1to16}, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 -1024(,%rbp,2), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8 -1024(,%rbp,2), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xa7,0x18,0x71,0x7f]
+ vcvtbiasph2hf8 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xb7,0x18,0x72,0x80]
+ vcvtbiasph2hf8 -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 268435456(%rbp,%r14,8), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8 (%rip){1to32}, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x50,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8 (%rip){1to32}, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8 -2048(,%rbp,2), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8 -2048(,%rbp,2), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xc7,0x18,0x71,0x7f]
+ vcvtbiasph2hf8 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xd7,0x18,0x72,0x80]
+ vcvtbiasph2hf8 -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8 (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x10,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8 (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8 -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0x87,0x18,0x71,0x7f]
+ vcvtbiasph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0x97,0x18,0x72,0x80]
+ vcvtbiasph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0x85,0x44,0x40,0x1b,0xf0]
+ vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x47,0x1b,0xf0]
+ vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0xc7,0x1b,0xf0]
+ vcvtbiasph2hf8s %zmm24, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x44,0x00,0x1b,0xf0]
+ vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x07,0x1b,0xf0]
+ vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0x87,0x1b,0xf0]
+ vcvtbiasph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x44,0x20,0x1b,0xf0]
+ vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x44,0x27,0x1b,0xf0]
+ vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x44,0xa7,0x1b,0xf0]
+ vcvtbiasph2hf8s %ymm24, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s 291(%r8,%rax,4), %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8s (%rip){1to16}, %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x30,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8s (%rip){1to16}, %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s -1024(,%rbp,2), %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8s -1024(,%rbp,2), %ymm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xa7,0x1b,0x71,0x7f]
+ vcvtbiasph2hf8s 4064(%rcx), %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xb7,0x1b,0x72,0x80]
+ vcvtbiasph2hf8s -256(%rdx){1to16}, %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s 291(%r8,%rax,4), %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8s (%rip){1to32}, %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x50,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8s (%rip){1to32}, %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8s -2048(,%rbp,2), %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8s -2048(,%rbp,2), %zmm23, %ymm22
+
+// CHECK: vcvtbiasph2hf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xc7,0x1b,0x71,0x7f]
+ vcvtbiasph2hf8s 8128(%rcx), %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0xd7,0x1b,0x72,0x80]
+ vcvtbiasph2hf8s -256(%rdx){1to32}, %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x44,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x44,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtbiasph2hf8s (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x10,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8s (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x44,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8s -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtbiasph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0x87,0x1b,0x71,0x7f]
+ vcvtbiasph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtbiasph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x44,0x97,0x1b,0x72,0x80]
+ vcvtbiasph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvthf82ph %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x1e,0xf7]
+ vcvthf82ph %xmm23, %xmm22
+
+// CHECK: vcvthf82ph %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x1e,0xf7]
+ vcvthf82ph %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvthf82ph %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x1e,0xf7]
+ vcvthf82ph %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvthf82ph %xmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x1e,0xf7]
+ vcvthf82ph %xmm23, %ymm22
+
+// CHECK: vcvthf82ph %xmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x1e,0xf7]
+ vcvthf82ph %xmm23, %ymm22 {%k7}
+
+// CHECK: vcvthf82ph %xmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x1e,0xf7]
+ vcvthf82ph %xmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvthf82ph %ymm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x1e,0xf7]
+ vcvthf82ph %ymm23, %zmm22
+
+// CHECK: vcvthf82ph %ymm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x1e,0xf7]
+ vcvthf82ph %ymm23, %zmm22 {%k7}
+
+// CHECK: vcvthf82ph %ymm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x1e,0xf7]
+ vcvthf82ph %ymm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvthf82ph 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvthf82ph 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvthf82ph 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvthf82ph 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvthf82ph (%rip), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x1e,0x35,0x00,0x00,0x00,0x00]
+ vcvthf82ph (%rip), %xmm22
+
+// CHECK: vcvthf82ph -256(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x1e,0x34,0x6d,0x00,0xff,0xff,0xff]
+ vcvthf82ph -256(,%rbp,2), %xmm22
+
+// CHECK: vcvthf82ph 1016(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x1e,0x71,0x7f]
+ vcvthf82ph 1016(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvthf82ph -1024(%rdx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x1e,0x72,0x80]
+ vcvthf82ph -1024(%rdx), %xmm22 {%k7} {z}
+
+// CHECK: vcvthf82ph 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvthf82ph 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvthf82ph 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvthf82ph 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvthf82ph (%rip), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x1e,0x35,0x00,0x00,0x00,0x00]
+ vcvthf82ph (%rip), %ymm22
+
+// CHECK: vcvthf82ph -512(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x1e,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvthf82ph -512(,%rbp,2), %ymm22
+
+// CHECK: vcvthf82ph 2032(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x1e,0x71,0x7f]
+ vcvthf82ph 2032(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvthf82ph -2048(%rdx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x1e,0x72,0x80]
+ vcvthf82ph -2048(%rdx), %ymm22 {%k7} {z}
+
+// CHECK: vcvthf82ph 268435456(%rbp,%r14,8), %zmm22
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvthf82ph 268435456(%rbp,%r14,8), %zmm22
+
+// CHECK: vcvthf82ph 291(%r8,%rax,4), %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvthf82ph 291(%r8,%rax,4), %zmm22 {%k7}
+
+// CHECK: vcvthf82ph (%rip), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x1e,0x35,0x00,0x00,0x00,0x00]
+ vcvthf82ph (%rip), %zmm22
+
+// CHECK: vcvthf82ph -1024(,%rbp,2), %zmm22
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x1e,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvthf82ph -1024(,%rbp,2), %zmm22
+
+// CHECK: vcvthf82ph 4064(%rcx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x1e,0x71,0x7f]
+ vcvthf82ph 4064(%rcx), %zmm22 {%k7} {z}
+
+// CHECK: vcvthf82ph -4096(%rdx), %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x1e,0x72,0x80]
+ vcvthf82ph -4096(%rdx), %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0x82,0x47,0x20,0x74,0xf0]
+ vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x47,0x27,0x74,0xf0]
+ vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x47,0xa7,0x74,0xf0]
+ vcvtne2ph2bf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0x82,0x47,0x40,0x74,0xf0]
+ vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x47,0x47,0x74,0xf0]
+ vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x47,0xc7,0x74,0xf0]
+ vcvtne2ph2bf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x82,0x47,0x00,0x74,0xf0]
+ vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x82,0x47,0x07,0x74,0xf0]
+ vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x82,0x47,0x87,0x74,0xf0]
+ vcvtne2ph2bf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa2,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8 (%rip){1to32}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe2,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8 (%rip){1to32}, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8 -2048(,%rbp,2), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe2,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8 -2048(,%rbp,2), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x47,0xc7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x47,0xd7,0x74,0x72,0x80]
+ vcvtne2ph2bf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa2,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8 (%rip){1to16}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8 (%rip){1to16}, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8 -1024(,%rbp,2), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8 -1024(,%rbp,2), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x47,0xa7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x47,0xb7,0x74,0x72,0x80]
+ vcvtne2ph2bf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa2,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8 (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8 (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8 -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8 -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x47,0x87,0x74,0x71,0x7f]
+ vcvtne2ph2bf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x47,0x97,0x74,0x72,0x80]
+ vcvtne2ph2bf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0x85,0x47,0x20,0x74,0xf0]
+ vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x27,0x74,0xf0]
+ vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0xa7,0x74,0xf0]
+ vcvtne2ph2bf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0x85,0x47,0x40,0x74,0xf0]
+ vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x47,0x74,0xf0]
+ vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0xc7,0x74,0xf0]
+ vcvtne2ph2bf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x47,0x00,0x74,0xf0]
+ vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x07,0x74,0xf0]
+ vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0x87,0x74,0xf0]
+ vcvtne2ph2bf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8s (%rip){1to32}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8s (%rip){1to32}, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8s -2048(,%rbp,2), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8s -2048(,%rbp,2), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2bf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xc7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xd7,0x74,0x72,0x80]
+ vcvtne2ph2bf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8s (%rip){1to16}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8s (%rip){1to16}, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8s -1024(,%rbp,2), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8s -1024(,%rbp,2), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2bf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xa7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xb7,0x74,0x72,0x80]
+ vcvtne2ph2bf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2bf8s (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8s (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8s -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8s -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0x87,0x74,0x71,0x7f]
+ vcvtne2ph2bf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0x97,0x74,0x72,0x80]
+ vcvtne2ph2bf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0x85,0x47,0x20,0x18,0xf0]
+ vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x27,0x18,0xf0]
+ vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0xa7,0x18,0xf0]
+ vcvtne2ph2hf8 %ymm24, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0x85,0x47,0x40,0x18,0xf0]
+ vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x47,0x18,0xf0]
+ vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0xc7,0x18,0xf0]
+ vcvtne2ph2hf8 %zmm24, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x47,0x00,0x18,0xf0]
+ vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x07,0x18,0xf0]
+ vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0x87,0x18,0xf0]
+ vcvtne2ph2hf8 %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 268435456(%rbp,%r14,8), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8 (%rip){1to32}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x50,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8 (%rip){1to32}, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8 -2048(,%rbp,2), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8 -2048(,%rbp,2), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xc7,0x18,0x71,0x7f]
+ vcvtne2ph2hf8 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xd7,0x18,0x72,0x80]
+ vcvtne2ph2hf8 -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 268435456(%rbp,%r14,8), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8 (%rip){1to16}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x30,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8 (%rip){1to16}, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8 -1024(,%rbp,2), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8 -1024(,%rbp,2), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xa7,0x18,0x71,0x7f]
+ vcvtne2ph2hf8 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xb7,0x18,0x72,0x80]
+ vcvtne2ph2hf8 -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8 (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x10,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8 (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8 -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8 -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0x87,0x18,0x71,0x7f]
+ vcvtne2ph2hf8 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0x97,0x18,0x72,0x80]
+ vcvtne2ph2hf8 -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0x85,0x47,0x20,0x1b,0xf0]
+ vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x27,0x1b,0xf0]
+ vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0xa7,0x1b,0xf0]
+ vcvtne2ph2hf8s %ymm24, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0x85,0x47,0x40,0x1b,0xf0]
+ vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x47,0x1b,0xf0]
+ vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0xc7,0x1b,0xf0]
+ vcvtne2ph2hf8s %zmm24, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0x85,0x47,0x00,0x1b,0xf0]
+ vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0x85,0x47,0x07,0x1b,0xf0]
+ vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0x85,0x47,0x87,0x1b,0xf0]
+ vcvtne2ph2hf8s %xmm24, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s 291(%r8,%rax,4), %zmm23, %zmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8s (%rip){1to32}, %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x50,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8s (%rip){1to32}, %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8s -2048(,%rbp,2), %zmm23, %zmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8s -2048(,%rbp,2), %zmm23, %zmm22
+
+// CHECK: vcvtne2ph2hf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xc7,0x1b,0x71,0x7f]
+ vcvtne2ph2hf8s 8128(%rcx), %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xd7,0x1b,0x72,0x80]
+ vcvtne2ph2hf8s -256(%rdx){1to32}, %zmm23, %zmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s 291(%r8,%rax,4), %ymm23, %ymm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8s (%rip){1to16}, %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x30,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8s (%rip){1to16}, %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8s -1024(,%rbp,2), %ymm23, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8s -1024(,%rbp,2), %ymm23, %ymm22
+
+// CHECK: vcvtne2ph2hf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xa7,0x1b,0x71,0x7f]
+ vcvtne2ph2hf8s 4064(%rcx), %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0xb7,0x1b,0x72,0x80]
+ vcvtne2ph2hf8s -256(%rdx){1to16}, %ymm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x47,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s 268435456(%rbp,%r14,8), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x47,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s 291(%r8,%rax,4), %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtne2ph2hf8s (%rip){1to8}, %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x10,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8s (%rip){1to8}, %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8s -512(,%rbp,2), %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x47,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8s -512(,%rbp,2), %xmm23, %xmm22
+
+// CHECK: vcvtne2ph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0x87,0x1b,0x71,0x7f]
+ vcvtne2ph2hf8s 2032(%rcx), %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtne2ph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x47,0x97,0x1b,0x72,0x80]
+ vcvtne2ph2hf8s -256(%rdx){1to8}, %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa2,0x7e,0x08,0x74,0xf7]
+ vcvtneph2bf8 %xmm23, %xmm22
+
+// CHECK: vcvtneph2bf8 %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa2,0x7e,0x0f,0x74,0xf7]
+ vcvtneph2bf8 %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2bf8 %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa2,0x7e,0x8f,0x74,0xf7]
+ vcvtneph2bf8 %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa2,0x7e,0x48,0x74,0xf7]
+ vcvtneph2bf8 %zmm23, %ymm22
+
+// CHECK: vcvtneph2bf8 %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa2,0x7e,0x4f,0x74,0xf7]
+ vcvtneph2bf8 %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtneph2bf8 %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa2,0x7e,0xcf,0x74,0xf7]
+ vcvtneph2bf8 %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa2,0x7e,0x28,0x74,0xf7]
+ vcvtneph2bf8 %ymm23, %xmm22
+
+// CHECK: vcvtneph2bf8 %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa2,0x7e,0x2f,0x74,0xf7]
+ vcvtneph2bf8 %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2bf8 %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa2,0x7e,0xaf,0x74,0xf7]
+ vcvtneph2bf8 %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8x 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa2,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8x 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtneph2bf8x 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8x 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtneph2bf8 (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8 (%rip){1to8}, %xmm22
+
+// CHECK: vcvtneph2bf8x -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe2,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8x -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2bf8x 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x7e,0x8f,0x74,0x71,0x7f]
+ vcvtneph2bf8x 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x7e,0x9f,0x74,0x72,0x80]
+ vcvtneph2bf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 (%rip){1to16}, %xmm22
+// CHECK: encoding: [0x62,0xe2,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8 (%rip){1to16}, %xmm22
+
+// CHECK: vcvtneph2bf8y -1024(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe2,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8y -1024(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2bf8y 4064(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x7e,0xaf,0x74,0x71,0x7f]
+ vcvtneph2bf8y 4064(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x7e,0xbf,0x74,0x72,0x80]
+ vcvtneph2bf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa2,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtneph2bf8 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc2,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtneph2bf8 (%rip){1to32}, %ymm22
+// CHECK: encoding: [0x62,0xe2,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8 (%rip){1to32}, %ymm22
+
+// CHECK: vcvtneph2bf8 -2048(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe2,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8 -2048(,%rbp,2), %ymm22
+
+// CHECK: vcvtneph2bf8 8128(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x7e,0xcf,0x74,0x71,0x7f]
+ vcvtneph2bf8 8128(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe2,0x7e,0xdf,0x74,0x72,0x80]
+ vcvtneph2bf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x74,0xf7]
+ vcvtneph2bf8s %xmm23, %xmm22
+
+// CHECK: vcvtneph2bf8s %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x0f,0x74,0xf7]
+ vcvtneph2bf8s %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2bf8s %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x8f,0x74,0xf7]
+ vcvtneph2bf8s %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x74,0xf7]
+ vcvtneph2bf8s %zmm23, %ymm22
+
+// CHECK: vcvtneph2bf8s %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x4f,0x74,0xf7]
+ vcvtneph2bf8s %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtneph2bf8s %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0xcf,0x74,0xf7]
+ vcvtneph2bf8s %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x28,0x74,0xf7]
+ vcvtneph2bf8s %ymm23, %xmm22
+
+// CHECK: vcvtneph2bf8s %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x2f,0x74,0xf7]
+ vcvtneph2bf8s %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2bf8s %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0xaf,0x74,0xf7]
+ vcvtneph2bf8s %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8sx 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8sx 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtneph2bf8sx 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8sx 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtneph2bf8s (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8s (%rip){1to8}, %xmm22
+
+// CHECK: vcvtneph2bf8sx -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8sx -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2bf8sx 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x8f,0x74,0x71,0x7f]
+ vcvtneph2bf8sx 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x9f,0x74,0x72,0x80]
+ vcvtneph2bf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s (%rip){1to16}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8s (%rip){1to16}, %xmm22
+
+// CHECK: vcvtneph2bf8sy -1024(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8sy -1024(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2bf8sy 4064(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xaf,0x74,0x71,0x7f]
+ vcvtneph2bf8sy 4064(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xbf,0x74,0x72,0x80]
+ vcvtneph2bf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8s 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtneph2bf8s 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8s 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtneph2bf8s (%rip){1to32}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8s (%rip){1to32}, %ymm22
+
+// CHECK: vcvtneph2bf8s -2048(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8s -2048(,%rbp,2), %ymm22
+
+// CHECK: vcvtneph2bf8s 8128(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xcf,0x74,0x71,0x7f]
+ vcvtneph2bf8s 8128(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2bf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xdf,0x74,0x72,0x80]
+ vcvtneph2bf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x18,0xf7]
+ vcvtneph2hf8 %xmm23, %xmm22
+
+// CHECK: vcvtneph2hf8 %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x0f,0x18,0xf7]
+ vcvtneph2hf8 %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2hf8 %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x8f,0x18,0xf7]
+ vcvtneph2hf8 %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x18,0xf7]
+ vcvtneph2hf8 %zmm23, %ymm22
+
+// CHECK: vcvtneph2hf8 %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x4f,0x18,0xf7]
+ vcvtneph2hf8 %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtneph2hf8 %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0xcf,0x18,0xf7]
+ vcvtneph2hf8 %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x28,0x18,0xf7]
+ vcvtneph2hf8 %ymm23, %xmm22
+
+// CHECK: vcvtneph2hf8 %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x2f,0x18,0xf7]
+ vcvtneph2hf8 %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2hf8 %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0xaf,0x18,0xf7]
+ vcvtneph2hf8 %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8x 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8x 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtneph2hf8x 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7e,0x0f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8x 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtneph2hf8 (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x18,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8 (%rip){1to8}, %xmm22
+
+// CHECK: vcvtneph2hf8x -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x08,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8x -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2hf8x 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x8f,0x18,0x71,0x7f]
+ vcvtneph2hf8x 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x9f,0x18,0x72,0x80]
+ vcvtneph2hf8 -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 (%rip){1to16}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x38,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8 (%rip){1to16}, %xmm22
+
+// CHECK: vcvtneph2hf8y -1024(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x28,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8y -1024(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2hf8y 4064(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xaf,0x18,0x71,0x7f]
+ vcvtneph2hf8y 4064(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xbf,0x18,0x72,0x80]
+ vcvtneph2hf8 -256(%rdx){1to16}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtneph2hf8 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7e,0x4f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtneph2hf8 (%rip){1to32}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x58,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8 (%rip){1to32}, %ymm22
+
+// CHECK: vcvtneph2hf8 -2048(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x48,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8 -2048(,%rbp,2), %ymm22
+
+// CHECK: vcvtneph2hf8 8128(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xcf,0x18,0x71,0x7f]
+ vcvtneph2hf8 8128(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xdf,0x18,0x72,0x80]
+ vcvtneph2hf8 -256(%rdx){1to32}, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s %xmm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x1b,0xf7]
+ vcvtneph2hf8s %xmm23, %xmm22
+
+// CHECK: vcvtneph2hf8s %xmm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x0f,0x1b,0xf7]
+ vcvtneph2hf8s %xmm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2hf8s %xmm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x8f,0x1b,0xf7]
+ vcvtneph2hf8s %xmm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s %zmm23, %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x1b,0xf7]
+ vcvtneph2hf8s %zmm23, %ymm22
+
+// CHECK: vcvtneph2hf8s %zmm23, %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x4f,0x1b,0xf7]
+ vcvtneph2hf8s %zmm23, %ymm22 {%k7}
+
+// CHECK: vcvtneph2hf8s %zmm23, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0xcf,0x1b,0xf7]
+ vcvtneph2hf8s %zmm23, %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s %ymm23, %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x28,0x1b,0xf7]
+ vcvtneph2hf8s %ymm23, %xmm22
+
+// CHECK: vcvtneph2hf8s %ymm23, %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xa5,0x7e,0x2f,0x1b,0xf7]
+ vcvtneph2hf8s %ymm23, %xmm22 {%k7}
+
+// CHECK: vcvtneph2hf8s %ymm23, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xa5,0x7e,0xaf,0x1b,0xf7]
+ vcvtneph2hf8s %ymm23, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8sx 268435456(%rbp,%r14,8), %xmm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8sx 268435456(%rbp,%r14,8), %xmm22
+
+// CHECK: vcvtneph2hf8sx 291(%r8,%rax,4), %xmm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7e,0x0f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8sx 291(%r8,%rax,4), %xmm22 {%k7}
+
+// CHECK: vcvtneph2hf8s (%rip){1to8}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x18,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8s (%rip){1to8}, %xmm22
+
+// CHECK: vcvtneph2hf8sx -512(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x08,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8sx -512(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2hf8sx 2032(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x8f,0x1b,0x71,0x7f]
+ vcvtneph2hf8sx 2032(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x9f,0x1b,0x72,0x80]
+ vcvtneph2hf8s -256(%rdx){1to8}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s (%rip){1to16}, %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x38,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8s (%rip){1to16}, %xmm22
+
+// CHECK: vcvtneph2hf8sy -1024(,%rbp,2), %xmm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x28,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8sy -1024(,%rbp,2), %xmm22
+
+// CHECK: vcvtneph2hf8sy 4064(%rcx), %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xaf,0x1b,0x71,0x7f]
+ vcvtneph2hf8sy 4064(%rcx), %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xbf,0x1b,0x72,0x80]
+ vcvtneph2hf8s -256(%rdx){1to16}, %xmm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s 268435456(%rbp,%r14,8), %ymm22
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8s 268435456(%rbp,%r14,8), %ymm22
+
+// CHECK: vcvtneph2hf8s 291(%r8,%rax,4), %ymm22 {%k7}
+// CHECK: encoding: [0x62,0xc5,0x7e,0x4f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8s 291(%r8,%rax,4), %ymm22 {%k7}
+
+// CHECK: vcvtneph2hf8s (%rip){1to32}, %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x58,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8s (%rip){1to32}, %ymm22
+
+// CHECK: vcvtneph2hf8s -2048(,%rbp,2), %ymm22
+// CHECK: encoding: [0x62,0xe5,0x7e,0x48,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8s -2048(,%rbp,2), %ymm22
+
+// CHECK: vcvtneph2hf8s 8128(%rcx), %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xcf,0x1b,0x71,0x7f]
+ vcvtneph2hf8s 8128(%rcx), %ymm22 {%k7} {z}
+
+// CHECK: vcvtneph2hf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xdf,0x1b,0x72,0x80]
+ vcvtneph2hf8s -256(%rdx){1to32}, %ymm22 {%k7} {z}
+
diff --git a/llvm/test/MC/X86/avx10.2convert-64-intel.s b/llvm/test/MC/X86/avx10.2convert-64-intel.s
new file mode 100644
index 00000000000000..2f0cd1b2809357
--- /dev/null
+++ b/llvm/test/MC/X86/avx10.2convert-64-intel.s
@@ -0,0 +1,1490 @@
+// RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
+
+// CHECK: vcvt2ps2phx ymm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x45,0x20,0x67,0xf0]
+ vcvt2ps2phx ymm22, ymm23, ymm24
+
+// CHECK: vcvt2ps2phx ymm22, ymm23, ymm24, {rn-sae}
+// CHECK: encoding: [0x62,0x82,0x41,0x10,0x67,0xf0]
+ vcvt2ps2phx ymm22, ymm23, ymm24, {rn-sae}
+
+// CHECK: vcvt2ps2phx ymm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x45,0x27,0x67,0xf0]
+ vcvt2ps2phx ymm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymm24, {rz-sae}
+// CHECK: encoding: [0x62,0x82,0x41,0xf7,0x67,0xf0]
+ vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymm24, {rz-sae}
+
+// CHECK: vcvt2ps2phx zmm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x45,0x40,0x67,0xf0]
+ vcvt2ps2phx zmm22, zmm23, zmm24
+
+// CHECK: vcvt2ps2phx zmm22, zmm23, zmm24, {rn-sae}
+// CHECK: encoding: [0x62,0x82,0x45,0x10,0x67,0xf0]
+ vcvt2ps2phx zmm22, zmm23, zmm24, {rn-sae}
+
+// CHECK: vcvt2ps2phx zmm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x45,0x47,0x67,0xf0]
+ vcvt2ps2phx zmm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmm24, {rz-sae}
+// CHECK: encoding: [0x62,0x82,0x45,0xf7,0x67,0xf0]
+ vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmm24, {rz-sae}
+
+// CHECK: vcvt2ps2phx xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x45,0x00,0x67,0xf0]
+ vcvt2ps2phx xmm22, xmm23, xmm24
+
+// CHECK: vcvt2ps2phx xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x45,0x07,0x67,0xf0]
+ vcvt2ps2phx xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x45,0x87,0x67,0xf0]
+ vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvt2ps2phx zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x45,0x40,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvt2ps2phx zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x45,0x47,0x67,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvt2ps2phx zmm22, zmm23, dword ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x45,0x50,0x67,0x35,0x00,0x00,0x00,0x00]
+ vcvt2ps2phx zmm22, zmm23, dword ptr [rip]{1to16}
+
+// CHECK: vcvt2ps2phx zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe2,0x45,0x40,0x67,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvt2ps2phx zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe2,0x45,0xc7,0x67,0x71,0x7f]
+ vcvt2ps2phx zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvt2ps2phx zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x45,0xd7,0x67,0x72,0x80]
+ vcvt2ps2phx zmm22 {k7} {z}, zmm23, dword ptr [rdx - 512]{1to16}
+
+// CHECK: vcvt2ps2phx ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x45,0x20,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvt2ps2phx ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x45,0x27,0x67,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvt2ps2phx ymm22, ymm23, dword ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x45,0x30,0x67,0x35,0x00,0x00,0x00,0x00]
+ vcvt2ps2phx ymm22, ymm23, dword ptr [rip]{1to8}
+
+// CHECK: vcvt2ps2phx ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe2,0x45,0x20,0x67,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvt2ps2phx ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe2,0x45,0xa7,0x67,0x71,0x7f]
+ vcvt2ps2phx ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvt2ps2phx ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x45,0xb7,0x67,0x72,0x80]
+ vcvt2ps2phx ymm22 {k7} {z}, ymm23, dword ptr [rdx - 512]{1to8}
+
+// CHECK: vcvt2ps2phx xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x45,0x00,0x67,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvt2ps2phx xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvt2ps2phx xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x45,0x07,0x67,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvt2ps2phx xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvt2ps2phx xmm22, xmm23, dword ptr [rip]{1to4}
+// CHECK: encoding: [0x62,0xe2,0x45,0x10,0x67,0x35,0x00,0x00,0x00,0x00]
+ vcvt2ps2phx xmm22, xmm23, dword ptr [rip]{1to4}
+
+// CHECK: vcvt2ps2phx xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe2,0x45,0x00,0x67,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvt2ps2phx xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe2,0x45,0x87,0x67,0x71,0x7f]
+ vcvt2ps2phx xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvt2ps2phx xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
+// CHECK: encoding: [0x62,0xe2,0x45,0x97,0x67,0x72,0x80]
+ vcvt2ps2phx xmm22 {k7} {z}, xmm23, dword ptr [rdx - 512]{1to4}
+
+// CHECK: vcvtbiasph2bf8 ymm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x44,0x40,0x74,0xf0]
+ vcvtbiasph2bf8 ymm22, zmm23, zmm24
+
+// CHECK: vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x44,0x47,0x74,0xf0]
+ vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x44,0xc7,0x74,0xf0]
+ vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2bf8 xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x44,0x00,0x74,0xf0]
+ vcvtbiasph2bf8 xmm22, xmm23, xmm24
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x44,0x07,0x74,0xf0]
+ vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x44,0x87,0x74,0xf0]
+ vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2bf8 xmm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x44,0x20,0x74,0xf0]
+ vcvtbiasph2bf8 xmm22, ymm23, ymm24
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x44,0x27,0x74,0xf0]
+ vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x44,0xa7,0x74,0xf0]
+ vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2bf8 xmm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8 xmm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe2,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe2,0x44,0xa7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x44,0xb7,0x74,0x72,0x80]
+ vcvtbiasph2bf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2bf8 ymm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe2,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8 ymm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe2,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe2,0x44,0xc7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe2,0x44,0xd7,0x74,0x72,0x80]
+ vcvtbiasph2bf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe2,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe2,0x44,0x87,0x74,0x71,0x7f]
+ vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x44,0x97,0x74,0x72,0x80]
+ vcvtbiasph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtbiasph2bf8s ymm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x40,0x74,0xf0]
+ vcvtbiasph2bf8s ymm22, zmm23, zmm24
+
+// CHECK: vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x47,0x74,0xf0]
+ vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0xc7,0x74,0xf0]
+ vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2bf8s xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x00,0x74,0xf0]
+ vcvtbiasph2bf8s xmm22, xmm23, xmm24
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x07,0x74,0xf0]
+ vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x87,0x74,0xf0]
+ vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2bf8s xmm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0x20,0x74,0xf0]
+ vcvtbiasph2bf8s xmm22, ymm23, ymm24
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0x27,0x74,0xf0]
+ vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0xa7,0x74,0xf0]
+ vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2bf8s xmm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x44,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8s xmm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x44,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2bf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x44,0xa7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x44,0xb7,0x74,0x72,0x80]
+ vcvtbiasph2bf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2bf8s ymm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x44,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8s ymm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x44,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2bf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x44,0xc7,0x74,0x71,0x7f]
+ vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x44,0xd7,0x74,0x72,0x80]
+ vcvtbiasph2bf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x44,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x44,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x44,0x87,0x74,0x71,0x7f]
+ vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x44,0x97,0x74,0x72,0x80]
+ vcvtbiasph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtbiasph2hf8 ymm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x40,0x18,0xf0]
+ vcvtbiasph2hf8 ymm22, zmm23, zmm24
+
+// CHECK: vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x47,0x18,0xf0]
+ vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0xc7,0x18,0xf0]
+ vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2hf8 xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x00,0x18,0xf0]
+ vcvtbiasph2hf8 xmm22, xmm23, xmm24
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x07,0x18,0xf0]
+ vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x87,0x18,0xf0]
+ vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2hf8 xmm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0x20,0x18,0xf0]
+ vcvtbiasph2hf8 xmm22, ymm23, ymm24
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0x27,0x18,0xf0]
+ vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0xa7,0x18,0xf0]
+ vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2hf8 xmm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x44,0x30,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8 xmm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x44,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8 xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x44,0xa7,0x18,0x71,0x7f]
+ vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x44,0xb7,0x18,0x72,0x80]
+ vcvtbiasph2hf8 xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2hf8 ymm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x44,0x50,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8 ymm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x44,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8 ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x44,0xc7,0x18,0x71,0x7f]
+ vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x44,0xd7,0x18,0x72,0x80]
+ vcvtbiasph2hf8 ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x44,0x10,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x44,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x44,0x87,0x18,0x71,0x7f]
+ vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x44,0x97,0x18,0x72,0x80]
+ vcvtbiasph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtbiasph2hf8s ymm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x40,0x1b,0xf0]
+ vcvtbiasph2hf8s ymm22, zmm23, zmm24
+
+// CHECK: vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x47,0x1b,0xf0]
+ vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x44,0xc7,0x1b,0xf0]
+ vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtbiasph2hf8s xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x00,0x1b,0xf0]
+ vcvtbiasph2hf8s xmm22, xmm23, xmm24
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x07,0x1b,0xf0]
+ vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x44,0x87,0x1b,0xf0]
+ vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtbiasph2hf8s xmm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0x20,0x1b,0xf0]
+ vcvtbiasph2hf8s xmm22, ymm23, ymm24
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0x27,0x1b,0xf0]
+ vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x44,0xa7,0x1b,0xf0]
+ vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s xmm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2hf8s xmm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x44,0x30,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8s xmm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x44,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtbiasph2hf8s xmm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x44,0xa7,0x1b,0x71,0x7f]
+ vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x44,0xb7,0x1b,0x72,0x80]
+ vcvtbiasph2hf8s xmm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s ymm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2hf8s ymm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x44,0x50,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8s ymm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x44,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtbiasph2hf8s ymm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x44,0xc7,0x1b,0x71,0x7f]
+ vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x44,0xd7,0x1b,0x72,0x80]
+ vcvtbiasph2hf8s ymm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x44,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x44,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtbiasph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtbiasph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x44,0x10,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtbiasph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x44,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtbiasph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x44,0x87,0x1b,0x71,0x7f]
+ vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x44,0x97,0x1b,0x72,0x80]
+ vcvtbiasph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvthf82ph xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x1e,0xf7]
+ vcvthf82ph xmm22, xmm23
+
+// CHECK: vcvthf82ph xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x0f,0x1e,0xf7]
+ vcvthf82ph xmm22 {k7}, xmm23
+
+// CHECK: vcvthf82ph xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x8f,0x1e,0xf7]
+ vcvthf82ph xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvthf82ph ymm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x1e,0xf7]
+ vcvthf82ph ymm22, xmm23
+
+// CHECK: vcvthf82ph ymm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x2f,0x1e,0xf7]
+ vcvthf82ph ymm22 {k7}, xmm23
+
+// CHECK: vcvthf82ph ymm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xaf,0x1e,0xf7]
+ vcvthf82ph ymm22 {k7} {z}, xmm23
+
+// CHECK: vcvthf82ph zmm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x1e,0xf7]
+ vcvthf82ph zmm22, ymm23
+
+// CHECK: vcvthf82ph zmm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0x4f,0x1e,0xf7]
+ vcvthf82ph zmm22 {k7}, ymm23
+
+// CHECK: vcvthf82ph zmm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7f,0xcf,0x1e,0xf7]
+ vcvthf82ph zmm22 {k7} {z}, ymm23
+
+// CHECK: vcvthf82ph xmm22, qword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x08,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvthf82ph xmm22, qword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvthf82ph xmm22 {k7}, qword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x0f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvthf82ph xmm22 {k7}, qword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvthf82ph xmm22, qword ptr [rip]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x1e,0x35,0x00,0x00,0x00,0x00]
+ vcvthf82ph xmm22, qword ptr [rip]
+
+// CHECK: vcvthf82ph xmm22, qword ptr [2*rbp - 256]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x08,0x1e,0x34,0x6d,0x00,0xff,0xff,0xff]
+ vcvthf82ph xmm22, qword ptr [2*rbp - 256]
+
+// CHECK: vcvthf82ph xmm22 {k7} {z}, qword ptr [rcx + 1016]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x1e,0x71,0x7f]
+ vcvthf82ph xmm22 {k7} {z}, qword ptr [rcx + 1016]
+
+// CHECK: vcvthf82ph xmm22 {k7} {z}, qword ptr [rdx - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x8f,0x1e,0x72,0x80]
+ vcvthf82ph xmm22 {k7} {z}, qword ptr [rdx - 1024]
+
+// CHECK: vcvthf82ph ymm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x28,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvthf82ph ymm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvthf82ph ymm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x2f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvthf82ph ymm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvthf82ph ymm22, xmmword ptr [rip]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x1e,0x35,0x00,0x00,0x00,0x00]
+ vcvthf82ph ymm22, xmmword ptr [rip]
+
+// CHECK: vcvthf82ph ymm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x28,0x1e,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvthf82ph ymm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x1e,0x71,0x7f]
+ vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rdx - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xaf,0x1e,0x72,0x80]
+ vcvthf82ph ymm22 {k7} {z}, xmmword ptr [rdx - 2048]
+
+// CHECK: vcvthf82ph zmm22, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7f,0x48,0x1e,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvthf82ph zmm22, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvthf82ph zmm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7f,0x4f,0x1e,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvthf82ph zmm22 {k7}, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvthf82ph zmm22, ymmword ptr [rip]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x1e,0x35,0x00,0x00,0x00,0x00]
+ vcvthf82ph zmm22, ymmword ptr [rip]
+
+// CHECK: vcvthf82ph zmm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7f,0x48,0x1e,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvthf82ph zmm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x1e,0x71,0x7f]
+ vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rdx - 4096]
+// CHECK: encoding: [0x62,0xe5,0x7f,0xcf,0x1e,0x72,0x80]
+ vcvthf82ph zmm22 {k7} {z}, ymmword ptr [rdx - 4096]
+
+// CHECK: vcvtne2ph2bf8 ymm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x47,0x20,0x74,0xf0]
+ vcvtne2ph2bf8 ymm22, ymm23, ymm24
+
+// CHECK: vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x47,0x27,0x74,0xf0]
+ vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x82,0x47,0xa7,0x74,0xf0]
+ vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2bf8 zmm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x47,0x40,0x74,0xf0]
+ vcvtne2ph2bf8 zmm22, zmm23, zmm24
+
+// CHECK: vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x47,0x47,0x74,0xf0]
+ vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x82,0x47,0xc7,0x74,0xf0]
+ vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2bf8 xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x47,0x00,0x74,0xf0]
+ vcvtne2ph2bf8 xmm22, xmm23, xmm24
+
+// CHECK: vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x47,0x07,0x74,0xf0]
+ vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x82,0x47,0x87,0x74,0xf0]
+ vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2bf8 zmm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe2,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8 zmm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe2,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe2,0x47,0xc7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe2,0x47,0xd7,0x74,0x72,0x80]
+ vcvtne2ph2bf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2bf8 ymm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8 ymm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe2,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe2,0x47,0xa7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x47,0xb7,0x74,0x72,0x80]
+ vcvtne2ph2bf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8 xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe2,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe2,0x47,0x87,0x74,0x71,0x7f]
+ vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x47,0x97,0x74,0x72,0x80]
+ vcvtne2ph2bf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtne2ph2bf8s ymm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0x20,0x74,0xf0]
+ vcvtne2ph2bf8s ymm22, ymm23, ymm24
+
+// CHECK: vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0x27,0x74,0xf0]
+ vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0xa7,0x74,0xf0]
+ vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2bf8s zmm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x40,0x74,0xf0]
+ vcvtne2ph2bf8s zmm22, zmm23, zmm24
+
+// CHECK: vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x47,0x74,0xf0]
+ vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0xc7,0x74,0xf0]
+ vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2bf8s xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x00,0x74,0xf0]
+ vcvtne2ph2bf8s xmm22, xmm23, xmm24
+
+// CHECK: vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x07,0x74,0xf0]
+ vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x87,0x74,0xf0]
+ vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x40,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x47,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2bf8s zmm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x47,0x50,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8s zmm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x47,0x40,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2bf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x47,0xc7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x47,0xd7,0x74,0x72,0x80]
+ vcvtne2ph2bf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x20,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x27,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2bf8s ymm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x47,0x30,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8s ymm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x47,0x20,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2bf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x47,0xa7,0x74,0x71,0x7f]
+ vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x47,0xb7,0x74,0x72,0x80]
+ vcvtne2ph2bf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x00,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x07,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2bf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x47,0x10,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2bf8s xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x47,0x00,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2bf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x47,0x87,0x74,0x71,0x7f]
+ vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x47,0x97,0x74,0x72,0x80]
+ vcvtne2ph2bf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtne2ph2hf8 ymm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0x20,0x18,0xf0]
+ vcvtne2ph2hf8 ymm22, ymm23, ymm24
+
+// CHECK: vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0x27,0x18,0xf0]
+ vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0xa7,0x18,0xf0]
+ vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2hf8 zmm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x40,0x18,0xf0]
+ vcvtne2ph2hf8 zmm22, zmm23, zmm24
+
+// CHECK: vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x47,0x18,0xf0]
+ vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0xc7,0x18,0xf0]
+ vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2hf8 xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x00,0x18,0xf0]
+ vcvtne2ph2hf8 xmm22, xmm23, xmm24
+
+// CHECK: vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x07,0x18,0xf0]
+ vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x87,0x18,0xf0]
+ vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x40,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x47,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2hf8 zmm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x47,0x50,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8 zmm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x47,0x40,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8 zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x47,0xc7,0x18,0x71,0x7f]
+ vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x47,0xd7,0x18,0x72,0x80]
+ vcvtne2ph2hf8 zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x20,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x27,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2hf8 ymm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x47,0x30,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8 ymm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x47,0x20,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8 ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x47,0xa7,0x18,0x71,0x7f]
+ vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x47,0xb7,0x18,0x72,0x80]
+ vcvtne2ph2hf8 ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x00,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x07,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8 xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x47,0x10,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8 xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x47,0x00,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8 xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x47,0x87,0x18,0x71,0x7f]
+ vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x47,0x97,0x18,0x72,0x80]
+ vcvtne2ph2hf8 xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtne2ph2hf8s ymm22, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0x20,0x1b,0xf0]
+ vcvtne2ph2hf8s ymm22, ymm23, ymm24
+
+// CHECK: vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0x27,0x1b,0xf0]
+ vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymm24
+// CHECK: encoding: [0x62,0x85,0x47,0xa7,0x1b,0xf0]
+ vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymm24
+
+// CHECK: vcvtne2ph2hf8s zmm22, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x40,0x1b,0xf0]
+ vcvtne2ph2hf8s zmm22, zmm23, zmm24
+
+// CHECK: vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x47,0x1b,0xf0]
+ vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmm24
+// CHECK: encoding: [0x62,0x85,0x47,0xc7,0x1b,0xf0]
+ vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmm24
+
+// CHECK: vcvtne2ph2hf8s xmm22, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x00,0x1b,0xf0]
+ vcvtne2ph2hf8s xmm22, xmm23, xmm24
+
+// CHECK: vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x07,0x1b,0xf0]
+ vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmm24
+// CHECK: encoding: [0x62,0x85,0x47,0x87,0x1b,0xf0]
+ vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmm24
+
+// CHECK: vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x40,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x47,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s zmm22 {k7}, zmm23, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2hf8s zmm22, zmm23, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x47,0x50,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8s zmm22, zmm23, word ptr [rip]{1to32}
+
+// CHECK: vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x47,0x40,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtne2ph2hf8s zmm22, zmm23, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x47,0xc7,0x1b,0x71,0x7f]
+ vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x47,0xd7,0x1b,0x72,0x80]
+ vcvtne2ph2hf8s zmm22 {k7} {z}, zmm23, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x20,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x27,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s ymm22 {k7}, ymm23, ymmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2hf8s ymm22, ymm23, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x47,0x30,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8s ymm22, ymm23, word ptr [rip]{1to16}
+
+// CHECK: vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x47,0x20,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtne2ph2hf8s ymm22, ymm23, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x47,0xa7,0x1b,0x71,0x7f]
+ vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x47,0xb7,0x1b,0x72,0x80]
+ vcvtne2ph2hf8s ymm22 {k7} {z}, ymm23, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x47,0x00,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x47,0x07,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtne2ph2hf8s xmm22 {k7}, xmm23, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtne2ph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x47,0x10,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtne2ph2hf8s xmm22, xmm23, word ptr [rip]{1to8}
+
+// CHECK: vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x47,0x00,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtne2ph2hf8s xmm22, xmm23, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x47,0x87,0x1b,0x71,0x7f]
+ vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x47,0x97,0x1b,0x72,0x80]
+ vcvtne2ph2hf8s xmm22 {k7} {z}, xmm23, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtneph2bf8 xmm22, xmm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x08,0x74,0xf7]
+ vcvtneph2bf8 xmm22, xmm23
+
+// CHECK: vcvtneph2bf8 xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x0f,0x74,0xf7]
+ vcvtneph2bf8 xmm22 {k7}, xmm23
+
+// CHECK: vcvtneph2bf8 xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x8f,0x74,0xf7]
+ vcvtneph2bf8 xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtneph2bf8 ymm22, zmm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x48,0x74,0xf7]
+ vcvtneph2bf8 ymm22, zmm23
+
+// CHECK: vcvtneph2bf8 ymm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x4f,0x74,0xf7]
+ vcvtneph2bf8 ymm22 {k7}, zmm23
+
+// CHECK: vcvtneph2bf8 ymm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0xcf,0x74,0xf7]
+ vcvtneph2bf8 ymm22 {k7} {z}, zmm23
+
+// CHECK: vcvtneph2bf8 xmm22, ymm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x28,0x74,0xf7]
+ vcvtneph2bf8 xmm22, ymm23
+
+// CHECK: vcvtneph2bf8 xmm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0x2f,0x74,0xf7]
+ vcvtneph2bf8 xmm22 {k7}, ymm23
+
+// CHECK: vcvtneph2bf8 xmm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa2,0x7e,0xaf,0x74,0xf7]
+ vcvtneph2bf8 xmm22 {k7} {z}, ymm23
+
+// CHECK: vcvtneph2bf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2bf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2bf8 xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8 xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtneph2bf8 xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe2,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8 xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtneph2bf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe2,0x7e,0x8f,0x74,0x71,0x7f]
+ vcvtneph2bf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe2,0x7e,0x9f,0x74,0x72,0x80]
+ vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtneph2bf8 xmm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8 xmm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtneph2bf8 xmm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe2,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8 xmm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtneph2bf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe2,0x7e,0xaf,0x74,0x71,0x7f]
+ vcvtneph2bf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe2,0x7e,0xbf,0x74,0x72,0x80]
+ vcvtneph2bf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtneph2bf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa2,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2bf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc2,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2bf8 ymm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe2,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8 ymm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtneph2bf8 ymm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe2,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8 ymm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtneph2bf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe2,0x7e,0xcf,0x74,0x71,0x7f]
+ vcvtneph2bf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtneph2bf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe2,0x7e,0xdf,0x74,0x72,0x80]
+ vcvtneph2bf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtneph2bf8s xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x74,0xf7]
+ vcvtneph2bf8s xmm22, xmm23
+
+// CHECK: vcvtneph2bf8s xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x0f,0x74,0xf7]
+ vcvtneph2bf8s xmm22 {k7}, xmm23
+
+// CHECK: vcvtneph2bf8s xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x8f,0x74,0xf7]
+ vcvtneph2bf8s xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtneph2bf8s ymm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x74,0xf7]
+ vcvtneph2bf8s ymm22, zmm23
+
+// CHECK: vcvtneph2bf8s ymm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x4f,0x74,0xf7]
+ vcvtneph2bf8s ymm22 {k7}, zmm23
+
+// CHECK: vcvtneph2bf8s ymm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0xcf,0x74,0xf7]
+ vcvtneph2bf8s ymm22 {k7} {z}, zmm23
+
+// CHECK: vcvtneph2bf8s xmm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x28,0x74,0xf7]
+ vcvtneph2bf8s xmm22, ymm23
+
+// CHECK: vcvtneph2bf8s xmm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x2f,0x74,0xf7]
+ vcvtneph2bf8s xmm22 {k7}, ymm23
+
+// CHECK: vcvtneph2bf8s xmm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0xaf,0x74,0xf7]
+ vcvtneph2bf8s xmm22 {k7} {z}, ymm23
+
+// CHECK: vcvtneph2bf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2bf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7e,0x0f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2bf8s xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x18,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8s xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtneph2bf8s xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x08,0x74,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2bf8s xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtneph2bf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x8f,0x74,0x71,0x7f]
+ vcvtneph2bf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x9f,0x74,0x72,0x80]
+ vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtneph2bf8s xmm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x38,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8s xmm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtneph2bf8s xmm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x28,0x74,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2bf8s xmm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtneph2bf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7e,0xaf,0x74,0x71,0x7f]
+ vcvtneph2bf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xbf,0x74,0x72,0x80]
+ vcvtneph2bf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtneph2bf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x74,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2bf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2bf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7e,0x4f,0x74,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2bf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2bf8s ymm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x58,0x74,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2bf8s ymm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtneph2bf8s ymm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x48,0x74,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2bf8s ymm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtneph2bf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7e,0xcf,0x74,0x71,0x7f]
+ vcvtneph2bf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtneph2bf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xdf,0x74,0x72,0x80]
+ vcvtneph2bf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtneph2hf8 xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x18,0xf7]
+ vcvtneph2hf8 xmm22, xmm23
+
+// CHECK: vcvtneph2hf8 xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x0f,0x18,0xf7]
+ vcvtneph2hf8 xmm22 {k7}, xmm23
+
+// CHECK: vcvtneph2hf8 xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x8f,0x18,0xf7]
+ vcvtneph2hf8 xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtneph2hf8 ymm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x18,0xf7]
+ vcvtneph2hf8 ymm22, zmm23
+
+// CHECK: vcvtneph2hf8 ymm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x4f,0x18,0xf7]
+ vcvtneph2hf8 ymm22 {k7}, zmm23
+
+// CHECK: vcvtneph2hf8 ymm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0xcf,0x18,0xf7]
+ vcvtneph2hf8 ymm22 {k7} {z}, zmm23
+
+// CHECK: vcvtneph2hf8 xmm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x28,0x18,0xf7]
+ vcvtneph2hf8 xmm22, ymm23
+
+// CHECK: vcvtneph2hf8 xmm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x2f,0x18,0xf7]
+ vcvtneph2hf8 xmm22 {k7}, ymm23
+
+// CHECK: vcvtneph2hf8 xmm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0xaf,0x18,0xf7]
+ vcvtneph2hf8 xmm22 {k7} {z}, ymm23
+
+// CHECK: vcvtneph2hf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8 xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2hf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7e,0x0f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8 xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2hf8 xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x18,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8 xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtneph2hf8 xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x08,0x18,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8 xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtneph2hf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x8f,0x18,0x71,0x7f]
+ vcvtneph2hf8 xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x9f,0x18,0x72,0x80]
+ vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtneph2hf8 xmm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x38,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8 xmm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtneph2hf8 xmm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x28,0x18,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8 xmm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtneph2hf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7e,0xaf,0x18,0x71,0x7f]
+ vcvtneph2hf8 xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xbf,0x18,0x72,0x80]
+ vcvtneph2hf8 xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtneph2hf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x18,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8 ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2hf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7e,0x4f,0x18,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8 ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2hf8 ymm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x58,0x18,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8 ymm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtneph2hf8 ymm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x48,0x18,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8 ymm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtneph2hf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7e,0xcf,0x18,0x71,0x7f]
+ vcvtneph2hf8 ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtneph2hf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xdf,0x18,0x72,0x80]
+ vcvtneph2hf8 ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
+// CHECK: vcvtneph2hf8s xmm22, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x1b,0xf7]
+ vcvtneph2hf8s xmm22, xmm23
+
+// CHECK: vcvtneph2hf8s xmm22 {k7}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x0f,0x1b,0xf7]
+ vcvtneph2hf8s xmm22 {k7}, xmm23
+
+// CHECK: vcvtneph2hf8s xmm22 {k7} {z}, xmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x8f,0x1b,0xf7]
+ vcvtneph2hf8s xmm22 {k7} {z}, xmm23
+
+// CHECK: vcvtneph2hf8s ymm22, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x1b,0xf7]
+ vcvtneph2hf8s ymm22, zmm23
+
+// CHECK: vcvtneph2hf8s ymm22 {k7}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x4f,0x1b,0xf7]
+ vcvtneph2hf8s ymm22 {k7}, zmm23
+
+// CHECK: vcvtneph2hf8s ymm22 {k7} {z}, zmm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0xcf,0x1b,0xf7]
+ vcvtneph2hf8s ymm22 {k7} {z}, zmm23
+
+// CHECK: vcvtneph2hf8s xmm22, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x28,0x1b,0xf7]
+ vcvtneph2hf8s xmm22, ymm23
+
+// CHECK: vcvtneph2hf8s xmm22 {k7}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0x2f,0x1b,0xf7]
+ vcvtneph2hf8s xmm22 {k7}, ymm23
+
+// CHECK: vcvtneph2hf8s xmm22 {k7} {z}, ymm23
+// CHECK: encoding: [0x62,0xa5,0x7e,0xaf,0x1b,0xf7]
+ vcvtneph2hf8s xmm22 {k7} {z}, ymm23
+
+// CHECK: vcvtneph2hf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7e,0x08,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8s xmm22, xmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2hf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7e,0x0f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8s xmm22 {k7}, xmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2hf8s xmm22, word ptr [rip]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x18,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8s xmm22, word ptr [rip]{1to8}
+
+// CHECK: vcvtneph2hf8s xmm22, xmmword ptr [2*rbp - 512]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x08,0x1b,0x34,0x6d,0x00,0xfe,0xff,0xff]
+ vcvtneph2hf8s xmm22, xmmword ptr [2*rbp - 512]
+
+// CHECK: vcvtneph2hf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x8f,0x1b,0x71,0x7f]
+ vcvtneph2hf8s xmm22 {k7} {z}, xmmword ptr [rcx + 2032]
+
+// CHECK: vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x9f,0x1b,0x72,0x80]
+ vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to8}
+
+// CHECK: vcvtneph2hf8s xmm22, word ptr [rip]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x38,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8s xmm22, word ptr [rip]{1to16}
+
+// CHECK: vcvtneph2hf8s xmm22, ymmword ptr [2*rbp - 1024]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x28,0x1b,0x34,0x6d,0x00,0xfc,0xff,0xff]
+ vcvtneph2hf8s xmm22, ymmword ptr [2*rbp - 1024]
+
+// CHECK: vcvtneph2hf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+// CHECK: encoding: [0x62,0xe5,0x7e,0xaf,0x1b,0x71,0x7f]
+ vcvtneph2hf8s xmm22 {k7} {z}, ymmword ptr [rcx + 4064]
+
+// CHECK: vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xbf,0x1b,0x72,0x80]
+ vcvtneph2hf8s xmm22 {k7} {z}, word ptr [rdx - 256]{1to16}
+
+// CHECK: vcvtneph2hf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+// CHECK: encoding: [0x62,0xa5,0x7e,0x48,0x1b,0xb4,0xf5,0x00,0x00,0x00,0x10]
+ vcvtneph2hf8s ymm22, zmmword ptr [rbp + 8*r14 + 268435456]
+
+// CHECK: vcvtneph2hf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+// CHECK: encoding: [0x62,0xc5,0x7e,0x4f,0x1b,0xb4,0x80,0x23,0x01,0x00,0x00]
+ vcvtneph2hf8s ymm22 {k7}, zmmword ptr [r8 + 4*rax + 291]
+
+// CHECK: vcvtneph2hf8s ymm22, word ptr [rip]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7e,0x58,0x1b,0x35,0x00,0x00,0x00,0x00]
+ vcvtneph2hf8s ymm22, word ptr [rip]{1to32}
+
+// CHECK: vcvtneph2hf8s ymm22, zmmword ptr [2*rbp - 2048]
+// CHECK: encoding: [0x62,0xe5,0x7e,0x48,0x1b,0x34,0x6d,0x00,0xf8,0xff,0xff]
+ vcvtneph2hf8s ymm22, zmmword ptr [2*rbp - 2048]
+
+// CHECK: vcvtneph2hf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+// CHECK: encoding: [0x62,0xe5,0x7e,0xcf,0x1b,0x71,0x7f]
+ vcvtneph2hf8s ymm22 {k7} {z}, zmmword ptr [rcx + 8128]
+
+// CHECK: vcvtneph2hf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+// CHECK: encoding: [0x62,0xe5,0x7e,0xdf,0x1b,0x72,0x80]
+ vcvtneph2hf8s ymm22 {k7} {z}, word ptr [rdx - 256]{1to32}
+
diff --git a/llvm/test/TableGen/x86-fold-tables.inc b/llvm/test/TableGen/x86-fold-tables.inc
index 523db92bc543ea..b88abbb461d087 100644
--- a/llvm/test/TableGen/x86-fold-tables.inc
+++ b/llvm/test/TableGen/x86-fold-tables.inc
@@ -1189,12 +1189,27 @@ static const X86FoldTableEntry Table1[] = {
{X86::VCVTDQ2PSZ256rr, X86::VCVTDQ2PSZ256rm, 0},
{X86::VCVTDQ2PSZrr, X86::VCVTDQ2PSZrm, 0},
{X86::VCVTDQ2PSrr, X86::VCVTDQ2PSrm, 0},
+ {X86::VCVTHF82PHZ128rr, X86::VCVTHF82PHZ128rm, TB_NO_REVERSE},
+ {X86::VCVTHF82PHZ256rr, X86::VCVTHF82PHZ256rm, 0},
+ {X86::VCVTHF82PHZrr, X86::VCVTHF82PHZrm, 0},
{X86::VCVTNEBF162IBSZ128rr, X86::VCVTNEBF162IBSZ128rm, 0},
{X86::VCVTNEBF162IBSZ256rr, X86::VCVTNEBF162IBSZ256rm, 0},
{X86::VCVTNEBF162IBSZrr, X86::VCVTNEBF162IBSZrm, 0},
{X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rm, 0},
{X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rm, 0},
{X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrm, 0},
+ {X86::VCVTNEPH2BF8SZ128rr, X86::VCVTNEPH2BF8SZ128rm, 0},
+ {X86::VCVTNEPH2BF8SZ256rr, X86::VCVTNEPH2BF8SZ256rm, 0},
+ {X86::VCVTNEPH2BF8SZrr, X86::VCVTNEPH2BF8SZrm, 0},
+ {X86::VCVTNEPH2BF8Z128rr, X86::VCVTNEPH2BF8Z128rm, 0},
+ {X86::VCVTNEPH2BF8Z256rr, X86::VCVTNEPH2BF8Z256rm, 0},
+ {X86::VCVTNEPH2BF8Zrr, X86::VCVTNEPH2BF8Zrm, 0},
+ {X86::VCVTNEPH2HF8SZ128rr, X86::VCVTNEPH2HF8SZ128rm, 0},
+ {X86::VCVTNEPH2HF8SZ256rr, X86::VCVTNEPH2HF8SZ256rm, 0},
+ {X86::VCVTNEPH2HF8SZrr, X86::VCVTNEPH2HF8SZrm, 0},
+ {X86::VCVTNEPH2HF8Z128rr, X86::VCVTNEPH2HF8Z128rm, 0},
+ {X86::VCVTNEPH2HF8Z256rr, X86::VCVTNEPH2HF8Z256rm, 0},
+ {X86::VCVTNEPH2HF8Zrr, X86::VCVTNEPH2HF8Zrm, 0},
{X86::VCVTNEPS2BF16Yrr, X86::VCVTNEPS2BF16Yrm, 0},
{X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rm, 0},
{X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rm, 0},
@@ -2440,6 +2455,21 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCMPSSZrri_Int, X86::VCMPSSZrmi_Int, TB_NO_REVERSE},
{X86::VCMPSSrri, X86::VCMPSSrmi, 0},
{X86::VCMPSSrri_Int, X86::VCMPSSrmi_Int, TB_NO_REVERSE},
+ {X86::VCVT2PS2PHXZ128rr, X86::VCVT2PS2PHXZ128rm, 0},
+ {X86::VCVT2PS2PHXZ256rr, X86::VCVT2PS2PHXZ256rm, 0},
+ {X86::VCVT2PS2PHXZrr, X86::VCVT2PS2PHXZrm, 0},
+ {X86::VCVTBIASPH2BF8SZ128rr, X86::VCVTBIASPH2BF8SZ128rm, 0},
+ {X86::VCVTBIASPH2BF8SZ256rr, X86::VCVTBIASPH2BF8SZ256rm, 0},
+ {X86::VCVTBIASPH2BF8SZrr, X86::VCVTBIASPH2BF8SZrm, 0},
+ {X86::VCVTBIASPH2BF8Z128rr, X86::VCVTBIASPH2BF8Z128rm, 0},
+ {X86::VCVTBIASPH2BF8Z256rr, X86::VCVTBIASPH2BF8Z256rm, 0},
+ {X86::VCVTBIASPH2BF8Zrr, X86::VCVTBIASPH2BF8Zrm, 0},
+ {X86::VCVTBIASPH2HF8SZ128rr, X86::VCVTBIASPH2HF8SZ128rm, 0},
+ {X86::VCVTBIASPH2HF8SZ256rr, X86::VCVTBIASPH2HF8SZ256rm, 0},
+ {X86::VCVTBIASPH2HF8SZrr, X86::VCVTBIASPH2HF8SZrm, 0},
+ {X86::VCVTBIASPH2HF8Z128rr, X86::VCVTBIASPH2HF8Z128rm, 0},
+ {X86::VCVTBIASPH2HF8Z256rr, X86::VCVTBIASPH2HF8Z256rm, 0},
+ {X86::VCVTBIASPH2HF8Zrr, X86::VCVTBIASPH2HF8Zrm, 0},
{X86::VCVTDQ2PDZ128rrkz, X86::VCVTDQ2PDZ128rmkz, TB_NO_REVERSE},
{X86::VCVTDQ2PDZ256rrkz, X86::VCVTDQ2PDZ256rmkz, 0},
{X86::VCVTDQ2PDZrrkz, X86::VCVTDQ2PDZrmkz, 0},
@@ -2449,6 +2479,21 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTDQ2PSZ128rrkz, X86::VCVTDQ2PSZ128rmkz, 0},
{X86::VCVTDQ2PSZ256rrkz, X86::VCVTDQ2PSZ256rmkz, 0},
{X86::VCVTDQ2PSZrrkz, X86::VCVTDQ2PSZrmkz, 0},
+ {X86::VCVTHF82PHZ128rrkz, X86::VCVTHF82PHZ128rmkz, TB_NO_REVERSE},
+ {X86::VCVTHF82PHZ256rrkz, X86::VCVTHF82PHZ256rmkz, 0},
+ {X86::VCVTHF82PHZrrkz, X86::VCVTHF82PHZrmkz, 0},
+ {X86::VCVTNE2PH2BF8SZ128rr, X86::VCVTNE2PH2BF8SZ128rm, 0},
+ {X86::VCVTNE2PH2BF8SZ256rr, X86::VCVTNE2PH2BF8SZ256rm, 0},
+ {X86::VCVTNE2PH2BF8SZrr, X86::VCVTNE2PH2BF8SZrm, 0},
+ {X86::VCVTNE2PH2BF8Z128rr, X86::VCVTNE2PH2BF8Z128rm, 0},
+ {X86::VCVTNE2PH2BF8Z256rr, X86::VCVTNE2PH2BF8Z256rm, 0},
+ {X86::VCVTNE2PH2BF8Zrr, X86::VCVTNE2PH2BF8Zrm, 0},
+ {X86::VCVTNE2PH2HF8SZ128rr, X86::VCVTNE2PH2HF8SZ128rm, 0},
+ {X86::VCVTNE2PH2HF8SZ256rr, X86::VCVTNE2PH2HF8SZ256rm, 0},
+ {X86::VCVTNE2PH2HF8SZrr, X86::VCVTNE2PH2HF8SZrm, 0},
+ {X86::VCVTNE2PH2HF8Z128rr, X86::VCVTNE2PH2HF8Z128rm, 0},
+ {X86::VCVTNE2PH2HF8Z256rr, X86::VCVTNE2PH2HF8Z256rm, 0},
+ {X86::VCVTNE2PH2HF8Zrr, X86::VCVTNE2PH2HF8Zrm, 0},
{X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rm, 0},
{X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rm, 0},
{X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrm, 0},
@@ -2458,6 +2503,18 @@ static const X86FoldTableEntry Table2[] = {
{X86::VCVTNEBF162IUBSZ128rrkz, X86::VCVTNEBF162IUBSZ128rmkz, 0},
{X86::VCVTNEBF162IUBSZ256rrkz, X86::VCVTNEBF162IUBSZ256rmkz, 0},
{X86::VCVTNEBF162IUBSZrrkz, X86::VCVTNEBF162IUBSZrmkz, 0},
+ {X86::VCVTNEPH2BF8SZ128rrkz, X86::VCVTNEPH2BF8SZ128rmkz, 0},
+ {X86::VCVTNEPH2BF8SZ256rrkz, X86::VCVTNEPH2BF8SZ256rmkz, 0},
+ {X86::VCVTNEPH2BF8SZrrkz, X86::VCVTNEPH2BF8SZrmkz, 0},
+ {X86::VCVTNEPH2BF8Z128rrkz, X86::VCVTNEPH2BF8Z128rmkz, 0},
+ {X86::VCVTNEPH2BF8Z256rrkz, X86::VCVTNEPH2BF8Z256rmkz, 0},
+ {X86::VCVTNEPH2BF8Zrrkz, X86::VCVTNEPH2BF8Zrmkz, 0},
+ {X86::VCVTNEPH2HF8SZ128rrkz, X86::VCVTNEPH2HF8SZ128rmkz, 0},
+ {X86::VCVTNEPH2HF8SZ256rrkz, X86::VCVTNEPH2HF8SZ256rmkz, 0},
+ {X86::VCVTNEPH2HF8SZrrkz, X86::VCVTNEPH2HF8SZrmkz, 0},
+ {X86::VCVTNEPH2HF8Z128rrkz, X86::VCVTNEPH2HF8Z128rmkz, 0},
+ {X86::VCVTNEPH2HF8Z256rrkz, X86::VCVTNEPH2HF8Z256rmkz, 0},
+ {X86::VCVTNEPH2HF8Zrrkz, X86::VCVTNEPH2HF8Zrmkz, 0},
{X86::VCVTNEPS2BF16Z128rrkz, X86::VCVTNEPS2BF16Z128rmkz, 0},
{X86::VCVTNEPS2BF16Z256rrkz, X86::VCVTNEPS2BF16Z256rmkz, 0},
{X86::VCVTNEPS2BF16Zrrkz, X86::VCVTNEPS2BF16Zrmkz, 0},
@@ -4070,6 +4127,21 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCMPSDZrri_Intk, X86::VCMPSDZrmi_Intk, TB_NO_REVERSE},
{X86::VCMPSHZrri_Intk, X86::VCMPSHZrmi_Intk, TB_NO_REVERSE},
{X86::VCMPSSZrri_Intk, X86::VCMPSSZrmi_Intk, TB_NO_REVERSE},
+ {X86::VCVT2PS2PHXZ128rrkz, X86::VCVT2PS2PHXZ128rmkz, 0},
+ {X86::VCVT2PS2PHXZ256rrkz, X86::VCVT2PS2PHXZ256rmkz, 0},
+ {X86::VCVT2PS2PHXZrrkz, X86::VCVT2PS2PHXZrmkz, 0},
+ {X86::VCVTBIASPH2BF8SZ128rrkz, X86::VCVTBIASPH2BF8SZ128rmkz, 0},
+ {X86::VCVTBIASPH2BF8SZ256rrkz, X86::VCVTBIASPH2BF8SZ256rmkz, 0},
+ {X86::VCVTBIASPH2BF8SZrrkz, X86::VCVTBIASPH2BF8SZrmkz, 0},
+ {X86::VCVTBIASPH2BF8Z128rrkz, X86::VCVTBIASPH2BF8Z128rmkz, 0},
+ {X86::VCVTBIASPH2BF8Z256rrkz, X86::VCVTBIASPH2BF8Z256rmkz, 0},
+ {X86::VCVTBIASPH2BF8Zrrkz, X86::VCVTBIASPH2BF8Zrmkz, 0},
+ {X86::VCVTBIASPH2HF8SZ128rrkz, X86::VCVTBIASPH2HF8SZ128rmkz, 0},
+ {X86::VCVTBIASPH2HF8SZ256rrkz, X86::VCVTBIASPH2HF8SZ256rmkz, 0},
+ {X86::VCVTBIASPH2HF8SZrrkz, X86::VCVTBIASPH2HF8SZrmkz, 0},
+ {X86::VCVTBIASPH2HF8Z128rrkz, X86::VCVTBIASPH2HF8Z128rmkz, 0},
+ {X86::VCVTBIASPH2HF8Z256rrkz, X86::VCVTBIASPH2HF8Z256rmkz, 0},
+ {X86::VCVTBIASPH2HF8Zrrkz, X86::VCVTBIASPH2HF8Zrmkz, 0},
{X86::VCVTDQ2PDZ128rrk, X86::VCVTDQ2PDZ128rmk, TB_NO_REVERSE},
{X86::VCVTDQ2PDZ256rrk, X86::VCVTDQ2PDZ256rmk, 0},
{X86::VCVTDQ2PDZrrk, X86::VCVTDQ2PDZrmk, 0},
@@ -4079,6 +4151,21 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTDQ2PSZ128rrk, X86::VCVTDQ2PSZ128rmk, 0},
{X86::VCVTDQ2PSZ256rrk, X86::VCVTDQ2PSZ256rmk, 0},
{X86::VCVTDQ2PSZrrk, X86::VCVTDQ2PSZrmk, 0},
+ {X86::VCVTHF82PHZ128rrk, X86::VCVTHF82PHZ128rmk, TB_NO_REVERSE},
+ {X86::VCVTHF82PHZ256rrk, X86::VCVTHF82PHZ256rmk, 0},
+ {X86::VCVTHF82PHZrrk, X86::VCVTHF82PHZrmk, 0},
+ {X86::VCVTNE2PH2BF8SZ128rrkz, X86::VCVTNE2PH2BF8SZ128rmkz, 0},
+ {X86::VCVTNE2PH2BF8SZ256rrkz, X86::VCVTNE2PH2BF8SZ256rmkz, 0},
+ {X86::VCVTNE2PH2BF8SZrrkz, X86::VCVTNE2PH2BF8SZrmkz, 0},
+ {X86::VCVTNE2PH2BF8Z128rrkz, X86::VCVTNE2PH2BF8Z128rmkz, 0},
+ {X86::VCVTNE2PH2BF8Z256rrkz, X86::VCVTNE2PH2BF8Z256rmkz, 0},
+ {X86::VCVTNE2PH2BF8Zrrkz, X86::VCVTNE2PH2BF8Zrmkz, 0},
+ {X86::VCVTNE2PH2HF8SZ128rrkz, X86::VCVTNE2PH2HF8SZ128rmkz, 0},
+ {X86::VCVTNE2PH2HF8SZ256rrkz, X86::VCVTNE2PH2HF8SZ256rmkz, 0},
+ {X86::VCVTNE2PH2HF8SZrrkz, X86::VCVTNE2PH2HF8SZrmkz, 0},
+ {X86::VCVTNE2PH2HF8Z128rrkz, X86::VCVTNE2PH2HF8Z128rmkz, 0},
+ {X86::VCVTNE2PH2HF8Z256rrkz, X86::VCVTNE2PH2HF8Z256rmkz, 0},
+ {X86::VCVTNE2PH2HF8Zrrkz, X86::VCVTNE2PH2HF8Zrmkz, 0},
{X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmkz, 0},
{X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmkz, 0},
{X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmkz, 0},
@@ -4088,6 +4175,18 @@ static const X86FoldTableEntry Table3[] = {
{X86::VCVTNEBF162IUBSZ128rrk, X86::VCVTNEBF162IUBSZ128rmk, 0},
{X86::VCVTNEBF162IUBSZ256rrk, X86::VCVTNEBF162IUBSZ256rmk, 0},
{X86::VCVTNEBF162IUBSZrrk, X86::VCVTNEBF162IUBSZrmk, 0},
+ {X86::VCVTNEPH2BF8SZ128rrk, X86::VCVTNEPH2BF8SZ128rmk, 0},
+ {X86::VCVTNEPH2BF8SZ256rrk, X86::VCVTNEPH2BF8SZ256rmk, 0},
+ {X86::VCVTNEPH2BF8SZrrk, X86::VCVTNEPH2BF8SZrmk, 0},
+ {X86::VCVTNEPH2BF8Z128rrk, X86::VCVTNEPH2BF8Z128rmk, 0},
+ {X86::VCVTNEPH2BF8Z256rrk, X86::VCVTNEPH2BF8Z256rmk, 0},
+ {X86::VCVTNEPH2BF8Zrrk, X86::VCVTNEPH2BF8Zrmk, 0},
+ {X86::VCVTNEPH2HF8SZ128rrk, X86::VCVTNEPH2HF8SZ128rmk, 0},
+ {X86::VCVTNEPH2HF8SZ256rrk, X86::VCVTNEPH2HF8SZ256rmk, 0},
+ {X86::VCVTNEPH2HF8SZrrk, X86::VCVTNEPH2HF8SZrmk, 0},
+ {X86::VCVTNEPH2HF8Z128rrk, X86::VCVTNEPH2HF8Z128rmk, 0},
+ {X86::VCVTNEPH2HF8Z256rrk, X86::VCVTNEPH2HF8Z256rmk, 0},
+ {X86::VCVTNEPH2HF8Zrrk, X86::VCVTNEPH2HF8Zrmk, 0},
{X86::VCVTNEPS2BF16Z128rrk, X86::VCVTNEPS2BF16Z128rmk, 0},
{X86::VCVTNEPS2BF16Z256rrk, X86::VCVTNEPS2BF16Z256rmk, 0},
{X86::VCVTNEPS2BF16Zrrk, X86::VCVTNEPS2BF16Zrmk, 0},
@@ -5745,6 +5844,33 @@ static const X86FoldTableEntry Table4[] = {
{X86::VANDPSZ128rrk, X86::VANDPSZ128rmk, 0},
{X86::VANDPSZ256rrk, X86::VANDPSZ256rmk, 0},
{X86::VANDPSZrrk, X86::VANDPSZrmk, 0},
+ {X86::VCVT2PS2PHXZ128rrk, X86::VCVT2PS2PHXZ128rmk, 0},
+ {X86::VCVT2PS2PHXZ256rrk, X86::VCVT2PS2PHXZ256rmk, 0},
+ {X86::VCVT2PS2PHXZrrk, X86::VCVT2PS2PHXZrmk, 0},
+ {X86::VCVTBIASPH2BF8SZ128rrk, X86::VCVTBIASPH2BF8SZ128rmk, 0},
+ {X86::VCVTBIASPH2BF8SZ256rrk, X86::VCVTBIASPH2BF8SZ256rmk, 0},
+ {X86::VCVTBIASPH2BF8SZrrk, X86::VCVTBIASPH2BF8SZrmk, 0},
+ {X86::VCVTBIASPH2BF8Z128rrk, X86::VCVTBIASPH2BF8Z128rmk, 0},
+ {X86::VCVTBIASPH2BF8Z256rrk, X86::VCVTBIASPH2BF8Z256rmk, 0},
+ {X86::VCVTBIASPH2BF8Zrrk, X86::VCVTBIASPH2BF8Zrmk, 0},
+ {X86::VCVTBIASPH2HF8SZ128rrk, X86::VCVTBIASPH2HF8SZ128rmk, 0},
+ {X86::VCVTBIASPH2HF8SZ256rrk, X86::VCVTBIASPH2HF8SZ256rmk, 0},
+ {X86::VCVTBIASPH2HF8SZrrk, X86::VCVTBIASPH2HF8SZrmk, 0},
+ {X86::VCVTBIASPH2HF8Z128rrk, X86::VCVTBIASPH2HF8Z128rmk, 0},
+ {X86::VCVTBIASPH2HF8Z256rrk, X86::VCVTBIASPH2HF8Z256rmk, 0},
+ {X86::VCVTBIASPH2HF8Zrrk, X86::VCVTBIASPH2HF8Zrmk, 0},
+ {X86::VCVTNE2PH2BF8SZ128rrk, X86::VCVTNE2PH2BF8SZ128rmk, 0},
+ {X86::VCVTNE2PH2BF8SZ256rrk, X86::VCVTNE2PH2BF8SZ256rmk, 0},
+ {X86::VCVTNE2PH2BF8SZrrk, X86::VCVTNE2PH2BF8SZrmk, 0},
+ {X86::VCVTNE2PH2BF8Z128rrk, X86::VCVTNE2PH2BF8Z128rmk, 0},
+ {X86::VCVTNE2PH2BF8Z256rrk, X86::VCVTNE2PH2BF8Z256rmk, 0},
+ {X86::VCVTNE2PH2BF8Zrrk, X86::VCVTNE2PH2BF8Zrmk, 0},
+ {X86::VCVTNE2PH2HF8SZ128rrk, X86::VCVTNE2PH2HF8SZ128rmk, 0},
+ {X86::VCVTNE2PH2HF8SZ256rrk, X86::VCVTNE2PH2HF8SZ256rmk, 0},
+ {X86::VCVTNE2PH2HF8SZrrk, X86::VCVTNE2PH2HF8SZrmk, 0},
+ {X86::VCVTNE2PH2HF8Z128rrk, X86::VCVTNE2PH2HF8Z128rmk, 0},
+ {X86::VCVTNE2PH2HF8Z256rrk, X86::VCVTNE2PH2HF8Z256rmk, 0},
+ {X86::VCVTNE2PH2HF8Zrrk, X86::VCVTNE2PH2HF8Zrmk, 0},
{X86::VCVTNE2PS2BF16Z128rrk, X86::VCVTNE2PS2BF16Z128rmk, 0},
{X86::VCVTNE2PS2BF16Z256rrk, X86::VCVTNE2PS2BF16Z256rmk, 0},
{X86::VCVTNE2PS2BF16Zrrk, X86::VCVTNE2PS2BF16Zrmk, 0},
@@ -6956,6 +7082,18 @@ static const X86FoldTableEntry BroadcastTable1[] = {
{X86::VCVTNEBF162IUBSZ128rr, X86::VCVTNEBF162IUBSZ128rmb, TB_BCAST_SH},
{X86::VCVTNEBF162IUBSZ256rr, X86::VCVTNEBF162IUBSZ256rmb, TB_BCAST_SH},
{X86::VCVTNEBF162IUBSZrr, X86::VCVTNEBF162IUBSZrmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZ128rr, X86::VCVTNEPH2BF8SZ128rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZ256rr, X86::VCVTNEPH2BF8SZ256rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZrr, X86::VCVTNEPH2BF8SZrmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Z128rr, X86::VCVTNEPH2BF8Z128rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Z256rr, X86::VCVTNEPH2BF8Z256rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Zrr, X86::VCVTNEPH2BF8Zrmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZ128rr, X86::VCVTNEPH2HF8SZ128rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZ256rr, X86::VCVTNEPH2HF8SZ256rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZrr, X86::VCVTNEPH2HF8SZrmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Z128rr, X86::VCVTNEPH2HF8Z128rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Z256rr, X86::VCVTNEPH2HF8Z256rmb, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Zrr, X86::VCVTNEPH2HF8Zrmb, TB_BCAST_SH},
{X86::VCVTNEPS2BF16Z128rr, X86::VCVTNEPS2BF16Z128rmb, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Z256rr, X86::VCVTNEPS2BF16Z256rmb, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Zrr, X86::VCVTNEPS2BF16Zrmb, TB_BCAST_SS},
@@ -7314,6 +7452,21 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCMPPSZ128rri, X86::VCMPPSZ128rmbi, TB_BCAST_SS},
{X86::VCMPPSZ256rri, X86::VCMPPSZ256rmbi, TB_BCAST_SS},
{X86::VCMPPSZrri, X86::VCMPPSZrmbi, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZ128rr, X86::VCVT2PS2PHXZ128rmb, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZ256rr, X86::VCVT2PS2PHXZ256rmb, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZrr, X86::VCVT2PS2PHXZrmb, TB_BCAST_SS},
+ {X86::VCVTBIASPH2BF8SZ128rr, X86::VCVTBIASPH2BF8SZ128rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8SZ256rr, X86::VCVTBIASPH2BF8SZ256rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8SZrr, X86::VCVTBIASPH2BF8SZrmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Z128rr, X86::VCVTBIASPH2BF8Z128rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Z256rr, X86::VCVTBIASPH2BF8Z256rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Zrr, X86::VCVTBIASPH2BF8Zrmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZ128rr, X86::VCVTBIASPH2HF8SZ128rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZ256rr, X86::VCVTBIASPH2HF8SZ256rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZrr, X86::VCVTBIASPH2HF8SZrmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Z128rr, X86::VCVTBIASPH2HF8Z128rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Z256rr, X86::VCVTBIASPH2HF8Z256rmb, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Zrr, X86::VCVTBIASPH2HF8Zrmb, TB_BCAST_SH},
{X86::VCVTDQ2PDZ128rrkz, X86::VCVTDQ2PDZ128rmbkz, TB_BCAST_D},
{X86::VCVTDQ2PDZ256rrkz, X86::VCVTDQ2PDZ256rmbkz, TB_BCAST_D},
{X86::VCVTDQ2PDZrrkz, X86::VCVTDQ2PDZrmbkz, TB_BCAST_D},
@@ -7323,6 +7476,18 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTDQ2PSZ128rrkz, X86::VCVTDQ2PSZ128rmbkz, TB_BCAST_D},
{X86::VCVTDQ2PSZ256rrkz, X86::VCVTDQ2PSZ256rmbkz, TB_BCAST_D},
{X86::VCVTDQ2PSZrrkz, X86::VCVTDQ2PSZrmbkz, TB_BCAST_D},
+ {X86::VCVTNE2PH2BF8SZ128rr, X86::VCVTNE2PH2BF8SZ128rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZ256rr, X86::VCVTNE2PH2BF8SZ256rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZrr, X86::VCVTNE2PH2BF8SZrmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Z128rr, X86::VCVTNE2PH2BF8Z128rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Z256rr, X86::VCVTNE2PH2BF8Z256rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Zrr, X86::VCVTNE2PH2BF8Zrmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZ128rr, X86::VCVTNE2PH2HF8SZ128rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZ256rr, X86::VCVTNE2PH2HF8SZ256rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZrr, X86::VCVTNE2PH2HF8SZrmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Z128rr, X86::VCVTNE2PH2HF8Z128rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Z256rr, X86::VCVTNE2PH2HF8Z256rmb, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Zrr, X86::VCVTNE2PH2HF8Zrmb, TB_BCAST_SH},
{X86::VCVTNE2PS2BF16Z128rr, X86::VCVTNE2PS2BF16Z128rmb, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rr, X86::VCVTNE2PS2BF16Z256rmb, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrr, X86::VCVTNE2PS2BF16Zrmb, TB_BCAST_SS},
@@ -7332,6 +7497,18 @@ static const X86FoldTableEntry BroadcastTable2[] = {
{X86::VCVTNEBF162IUBSZ128rrkz, X86::VCVTNEBF162IUBSZ128rmbkz, TB_BCAST_SH},
{X86::VCVTNEBF162IUBSZ256rrkz, X86::VCVTNEBF162IUBSZ256rmbkz, TB_BCAST_SH},
{X86::VCVTNEBF162IUBSZrrkz, X86::VCVTNEBF162IUBSZrmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZ128rrkz, X86::VCVTNEPH2BF8SZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZ256rrkz, X86::VCVTNEPH2BF8SZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZrrkz, X86::VCVTNEPH2BF8SZrmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Z128rrkz, X86::VCVTNEPH2BF8Z128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Z256rrkz, X86::VCVTNEPH2BF8Z256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Zrrkz, X86::VCVTNEPH2BF8Zrmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZ128rrkz, X86::VCVTNEPH2HF8SZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZ256rrkz, X86::VCVTNEPH2HF8SZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZrrkz, X86::VCVTNEPH2HF8SZrmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Z128rrkz, X86::VCVTNEPH2HF8Z128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Z256rrkz, X86::VCVTNEPH2HF8Z256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Zrrkz, X86::VCVTNEPH2HF8Zrmbkz, TB_BCAST_SH},
{X86::VCVTNEPS2BF16Z128rrkz, X86::VCVTNEPS2BF16Z128rmbkz, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Z256rrkz, X86::VCVTNEPS2BF16Z256rmbkz, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Zrrkz, X86::VCVTNEPS2BF16Zrmbkz, TB_BCAST_SS},
@@ -8027,6 +8204,21 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCMPPSZ128rrik, X86::VCMPPSZ128rmbik, TB_BCAST_SS},
{X86::VCMPPSZ256rrik, X86::VCMPPSZ256rmbik, TB_BCAST_SS},
{X86::VCMPPSZrrik, X86::VCMPPSZrmbik, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZ128rrkz, X86::VCVT2PS2PHXZ128rmbkz, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZ256rrkz, X86::VCVT2PS2PHXZ256rmbkz, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZrrkz, X86::VCVT2PS2PHXZrmbkz, TB_BCAST_SS},
+ {X86::VCVTBIASPH2BF8SZ128rrkz, X86::VCVTBIASPH2BF8SZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8SZ256rrkz, X86::VCVTBIASPH2BF8SZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8SZrrkz, X86::VCVTBIASPH2BF8SZrmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Z128rrkz, X86::VCVTBIASPH2BF8Z128rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Z256rrkz, X86::VCVTBIASPH2BF8Z256rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Zrrkz, X86::VCVTBIASPH2BF8Zrmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZ128rrkz, X86::VCVTBIASPH2HF8SZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZ256rrkz, X86::VCVTBIASPH2HF8SZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZrrkz, X86::VCVTBIASPH2HF8SZrmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Z128rrkz, X86::VCVTBIASPH2HF8Z128rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Z256rrkz, X86::VCVTBIASPH2HF8Z256rmbkz, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Zrrkz, X86::VCVTBIASPH2HF8Zrmbkz, TB_BCAST_SH},
{X86::VCVTDQ2PDZ128rrk, X86::VCVTDQ2PDZ128rmbk, TB_BCAST_D},
{X86::VCVTDQ2PDZ256rrk, X86::VCVTDQ2PDZ256rmbk, TB_BCAST_D},
{X86::VCVTDQ2PDZrrk, X86::VCVTDQ2PDZrmbk, TB_BCAST_D},
@@ -8036,6 +8228,18 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTDQ2PSZ128rrk, X86::VCVTDQ2PSZ128rmbk, TB_BCAST_D},
{X86::VCVTDQ2PSZ256rrk, X86::VCVTDQ2PSZ256rmbk, TB_BCAST_D},
{X86::VCVTDQ2PSZrrk, X86::VCVTDQ2PSZrmbk, TB_BCAST_D},
+ {X86::VCVTNE2PH2BF8SZ128rrkz, X86::VCVTNE2PH2BF8SZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZ256rrkz, X86::VCVTNE2PH2BF8SZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZrrkz, X86::VCVTNE2PH2BF8SZrmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Z128rrkz, X86::VCVTNE2PH2BF8Z128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Z256rrkz, X86::VCVTNE2PH2BF8Z256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Zrrkz, X86::VCVTNE2PH2BF8Zrmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZ128rrkz, X86::VCVTNE2PH2HF8SZ128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZ256rrkz, X86::VCVTNE2PH2HF8SZ256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZrrkz, X86::VCVTNE2PH2HF8SZrmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Z128rrkz, X86::VCVTNE2PH2HF8Z128rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Z256rrkz, X86::VCVTNE2PH2HF8Z256rmbkz, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Zrrkz, X86::VCVTNE2PH2HF8Zrmbkz, TB_BCAST_SH},
{X86::VCVTNE2PS2BF16Z128rrkz, X86::VCVTNE2PS2BF16Z128rmbkz, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rrkz, X86::VCVTNE2PS2BF16Z256rmbkz, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrrkz, X86::VCVTNE2PS2BF16Zrmbkz, TB_BCAST_SS},
@@ -8045,6 +8249,18 @@ static const X86FoldTableEntry BroadcastTable3[] = {
{X86::VCVTNEBF162IUBSZ128rrk, X86::VCVTNEBF162IUBSZ128rmbk, TB_BCAST_SH},
{X86::VCVTNEBF162IUBSZ256rrk, X86::VCVTNEBF162IUBSZ256rmbk, TB_BCAST_SH},
{X86::VCVTNEBF162IUBSZrrk, X86::VCVTNEBF162IUBSZrmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZ128rrk, X86::VCVTNEPH2BF8SZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZ256rrk, X86::VCVTNEPH2BF8SZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8SZrrk, X86::VCVTNEPH2BF8SZrmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Z128rrk, X86::VCVTNEPH2BF8Z128rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Z256rrk, X86::VCVTNEPH2BF8Z256rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2BF8Zrrk, X86::VCVTNEPH2BF8Zrmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZ128rrk, X86::VCVTNEPH2HF8SZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZ256rrk, X86::VCVTNEPH2HF8SZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8SZrrk, X86::VCVTNEPH2HF8SZrmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Z128rrk, X86::VCVTNEPH2HF8Z128rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Z256rrk, X86::VCVTNEPH2HF8Z256rmbk, TB_BCAST_SH},
+ {X86::VCVTNEPH2HF8Zrrk, X86::VCVTNEPH2HF8Zrmbk, TB_BCAST_SH},
{X86::VCVTNEPS2BF16Z128rrk, X86::VCVTNEPS2BF16Z128rmbk, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Z256rrk, X86::VCVTNEPS2BF16Z256rmbk, TB_BCAST_SS},
{X86::VCVTNEPS2BF16Zrrk, X86::VCVTNEPS2BF16Zrmbk, TB_BCAST_SS},
@@ -8986,6 +9202,33 @@ static const X86FoldTableEntry BroadcastTable4[] = {
{X86::VANDPSZ128rrk, X86::VANDPSZ128rmbk, TB_BCAST_SS},
{X86::VANDPSZ256rrk, X86::VANDPSZ256rmbk, TB_BCAST_SS},
{X86::VANDPSZrrk, X86::VANDPSZrmbk, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZ128rrk, X86::VCVT2PS2PHXZ128rmbk, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZ256rrk, X86::VCVT2PS2PHXZ256rmbk, TB_BCAST_SS},
+ {X86::VCVT2PS2PHXZrrk, X86::VCVT2PS2PHXZrmbk, TB_BCAST_SS},
+ {X86::VCVTBIASPH2BF8SZ128rrk, X86::VCVTBIASPH2BF8SZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8SZ256rrk, X86::VCVTBIASPH2BF8SZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8SZrrk, X86::VCVTBIASPH2BF8SZrmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Z128rrk, X86::VCVTBIASPH2BF8Z128rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Z256rrk, X86::VCVTBIASPH2BF8Z256rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2BF8Zrrk, X86::VCVTBIASPH2BF8Zrmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZ128rrk, X86::VCVTBIASPH2HF8SZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZ256rrk, X86::VCVTBIASPH2HF8SZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8SZrrk, X86::VCVTBIASPH2HF8SZrmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Z128rrk, X86::VCVTBIASPH2HF8Z128rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Z256rrk, X86::VCVTBIASPH2HF8Z256rmbk, TB_BCAST_SH},
+ {X86::VCVTBIASPH2HF8Zrrk, X86::VCVTBIASPH2HF8Zrmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZ128rrk, X86::VCVTNE2PH2BF8SZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZ256rrk, X86::VCVTNE2PH2BF8SZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8SZrrk, X86::VCVTNE2PH2BF8SZrmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Z128rrk, X86::VCVTNE2PH2BF8Z128rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Z256rrk, X86::VCVTNE2PH2BF8Z256rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2BF8Zrrk, X86::VCVTNE2PH2BF8Zrmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZ128rrk, X86::VCVTNE2PH2HF8SZ128rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZ256rrk, X86::VCVTNE2PH2HF8SZ256rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8SZrrk, X86::VCVTNE2PH2HF8SZrmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Z128rrk, X86::VCVTNE2PH2HF8Z128rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Z256rrk, X86::VCVTNE2PH2HF8Z256rmbk, TB_BCAST_SH},
+ {X86::VCVTNE2PH2HF8Zrrk, X86::VCVTNE2PH2HF8Zrmbk, TB_BCAST_SH},
{X86::VCVTNE2PS2BF16Z128rrk, X86::VCVTNE2PS2BF16Z128rmbk, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Z256rrk, X86::VCVTNE2PS2BF16Z256rmbk, TB_BCAST_SS},
{X86::VCVTNE2PS2BF16Zrrk, X86::VCVTNE2PS2BF16Zrmbk, TB_BCAST_SS},
>From 12af436a941c77dc3b44ce610a982a3ce8f936be Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Mon, 12 Aug 2024 09:17:52 +0800
Subject: [PATCH 2/7] add intrinsics of *_maskz_cvtne(s)2ph_p{b|h}f8
---
clang/lib/Headers/avx10_2_512convertintrin.h | 35 +++-
clang/lib/Headers/avx10_2convertintrin.h | 71 ++++++-
.../CodeGen/X86/avx10_2_512convert-builtins.c | 44 ++++-
.../CodeGen/X86/avx10_2convert-builtins.c | 88 +++++++--
.../X86/avx10_2_512convert-intrinsics.ll | 103 ++++++++--
.../CodeGen/X86/avx10_2convert-intrinsics.ll | 183 +++++++++++++++---
6 files changed, 449 insertions(+), 75 deletions(-)
diff --git a/clang/lib/Headers/avx10_2_512convertintrin.h b/clang/lib/Headers/avx10_2_512convertintrin.h
index f80515630ead55..585e46d6d44602 100644
--- a/clang/lib/Headers/avx10_2_512convertintrin.h
+++ b/clang/lib/Headers/avx10_2_512convertintrin.h
@@ -137,6 +137,13 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph_pbf8(
(__mmask64)__U, (__v64qi)_mm512_cvtne2ph_pbf8(__A, __B), (__v64qi)__W);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtne2ph_pbf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtne2ph_pbf8(__A, __B),
+ (__v64qi)(__m512i)_mm512_setzero_si512());
+}
+
static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvtnes2ph_pbf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2bf8s_512((__v32hf)(__A),
@@ -149,6 +156,13 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtnes2ph_pbf8(
(__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_pbf8(__A, __B), (__v64qi)__W);
}
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtnes2ph_pbf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_pbf8(__A, __B),
+ (__v64qi)(__m512i)_mm512_setzero_si512());
+}
+
static __inline__ __m512i __DEFAULT_FN_ATTRS512
_mm512_cvtne2ph_phf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2hf8_512((__v32hf)(__A),
@@ -162,16 +176,29 @@ static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph_phf8(
}
static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_cvtne2ph2hf8s_phf8(__m512h __A, __m512h __B) {
+_mm512_maskz_cvtne2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtne2ph_phf8(__A, __B),
+ (__v64qi)(__m512i)_mm512_setzero_si512());
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_cvtnes2ph_phf8(__m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_vcvtne2ph2hf8s_512((__v32hf)(__A),
(__v32hf)(__B));
}
-static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtne2ph2hf8s_phf8(
+static __inline__ __m512i __DEFAULT_FN_ATTRS512 _mm512_mask_cvtnes2ph_phf8(
__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
return (__m512i)__builtin_ia32_selectb_512(
- (__mmask64)__U, (__v64qi)_mm512_cvtne2ph2hf8s_phf8(__A, __B),
- (__v64qi)__W);
+ (__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_phf8(__A, __B), (__v64qi)__W);
+}
+
+static __inline__ __m512i __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtnes2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ return (__m512i)__builtin_ia32_selectb_512(
+ (__mmask64)__U, (__v64qi)_mm512_cvtnes2ph_phf8(__A, __B),
+ (__v64qi)(__m512i)_mm512_setzero_si512());
}
static __inline__ __m512h __DEFAULT_FN_ATTRS512
diff --git a/clang/lib/Headers/avx10_2convertintrin.h b/clang/lib/Headers/avx10_2convertintrin.h
index 374b1fb1afc8cd..b569fa2d8da34d 100644
--- a/clang/lib/Headers/avx10_2convertintrin.h
+++ b/clang/lib/Headers/avx10_2convertintrin.h
@@ -227,6 +227,13 @@ _mm_mask_cvtne2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
(__mmask16)__U, (__v16qi)_mm_cvtne2ph_pbf8(__A, __B), (__v16qi)__W);
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtne2ph_pbf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtne2ph_pbf8(__A, __B),
+ (__v16qi)(__m128i)_mm_setzero_si128());
+}
+
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_cvtne2ph_pbf8(__m256h __A, __m256h __B) {
return (__m256i)__builtin_ia32_vcvtne2ph2bf8_256((__v16hf)(__A),
@@ -239,6 +246,13 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtne2ph_pbf8(
(__mmask16)__U, (__v32qi)_mm256_cvtne2ph_pbf8(__A, __B), (__v32qi)__W);
}
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtne2ph_pbf8(__mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtne2ph_pbf8(__A, __B),
+ (__v32qi)(__m256i)_mm256_setzero_si256());
+}
+
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_cvtnes2ph_pbf8(__m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_vcvtne2ph2bf8s_128((__v8hf)(__A),
@@ -251,6 +265,13 @@ _mm_mask_cvtnes2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
(__mmask16)__U, (__v16qi)_mm_cvtnes2ph_pbf8(__A, __B), (__v16qi)__W);
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtnes2ph_pbf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtnes2ph_pbf8(__A, __B),
+ (__v16qi)(__m128i)_mm_setzero_si128());
+}
+
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_cvtnes2ph_pbf8(__m256h __A, __m256h __B) {
return (__m256i)__builtin_ia32_vcvtne2ph2bf8s_256((__v16hf)(__A),
@@ -263,6 +284,13 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtnes2ph_pbf8(
(__mmask16)__U, (__v32qi)_mm256_cvtnes2ph_pbf8(__A, __B), (__v32qi)__W);
}
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtnes2ph_pbf8(__mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtnes2ph_pbf8(__A, __B),
+ (__v32qi)(__m256i)_mm256_setzero_si256());
+}
+
static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_cvtne2ph_phf8(__m128h __A,
__m128h __B) {
return (__m128i)__builtin_ia32_vcvtne2ph2hf8_128((__v8hf)(__A),
@@ -275,6 +303,13 @@ _mm_mask_cvtne2ph_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
(__mmask16)__U, (__v16qi)_mm_cvtne2ph_phf8(__A, __B), (__v16qi)__W);
}
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtne2ph_phf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtne2ph_phf8(__A, __B),
+ (__v16qi)(__m128i)_mm_setzero_si128());
+}
+
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_cvtne2ph_phf8(__m256h __A, __m256h __B) {
return (__m256i)__builtin_ia32_vcvtne2ph2hf8_256((__v16hf)(__A),
@@ -287,29 +322,49 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtne2ph_phf8(
(__mmask16)__U, (__v32qi)_mm256_cvtne2ph_phf8(__A, __B), (__v32qi)__W);
}
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtne2ph_phf8(__mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtne2ph_phf8(__A, __B),
+ (__v32qi)(__m256i)_mm256_setzero_si256());
+}
+
static __inline__ __m128i __DEFAULT_FN_ATTRS128
-_mm_cvtne2ph2hf8s_phf8(__m128h __A, __m128h __B) {
+_mm_cvtnes2ph_phf8(__m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_vcvtne2ph2hf8s_128((__v8hf)(__A),
(__v8hf)(__B));
}
-static __inline__ __m128i __DEFAULT_FN_ATTRS128 _mm_mask_cvtne2ph2hf8s_phf8(
- __m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_mask_cvtnes2ph_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ return (__m128i)__builtin_ia32_selectb_128(
+ (__mmask16)__U, (__v16qi)_mm_cvtnes2ph_phf8(__A, __B), (__v16qi)__W);
+}
+
+static __inline__ __m128i __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtnes2ph_phf8(__mmask16 __U, __m128h __A, __m128h __B) {
return (__m128i)__builtin_ia32_selectb_128(
- (__mmask16)__U, (__v16qi)_mm_cvtne2ph2hf8s_phf8(__A, __B), (__v16qi)__W);
+ (__mmask16)__U, (__v16qi)_mm_cvtnes2ph_phf8(__A, __B),
+ (__v16qi)(__m128i)_mm_setzero_si128());
}
static __inline__ __m256i __DEFAULT_FN_ATTRS256
-_mm256_cvtne2ph2hf8s_phf8(__m256h __A, __m256h __B) {
+_mm256_cvtnes2ph_phf8(__m256h __A, __m256h __B) {
return (__m256i)__builtin_ia32_vcvtne2ph2hf8s_256((__v16hf)(__A),
(__v16hf)(__B));
}
-static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtne2ph2hf8s_phf8(
+static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtnes2ph_phf8(
__m256i __W, __mmask32 __U, __m256h __A, __m256h __B) {
return (__m256i)__builtin_ia32_selectb_256(
- (__mmask16)__U, (__v32qi)_mm256_cvtne2ph2hf8s_phf8(__A, __B),
- (__v32qi)__W);
+ (__mmask16)__U, (__v32qi)_mm256_cvtnes2ph_phf8(__A, __B), (__v32qi)__W);
+}
+
+static __inline__ __m256i __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtnes2ph_phf8(__mmask32 __U, __m256h __A, __m256h __B) {
+ return (__m256i)__builtin_ia32_selectb_256(
+ (__mmask16)__U, (__v32qi)_mm256_cvtnes2ph_phf8(__A, __B),
+ (__v32qi)(__m256i)_mm256_setzero_si256());
}
static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtnehf8_ph(__m128i __A) {
diff --git a/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c b/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
index f35f742122c6a4..1956eb88dc5d51 100644
--- a/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
+++ b/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
@@ -115,6 +115,14 @@ __m512i test_mm512_mask_cvtne2ph_pbf8(__m512i __W, __mmask32 __U, __m512h __A, _
return _mm512_mask_cvtne2ph_pbf8(__W, __U, __A, __B);
}
+__m512i test_mm512_maskz_cvtne2ph_pbf8(__mmask32 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtne2ph_pbf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(
+ // CHECK: zeroinitializer
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ return _mm512_maskz_cvtne2ph_pbf8(__U, __A, __B);
+}
+
__m512i test_mm512_cvtnes2ph_pbf8(__m512h __A, __m512h __B) {
// CHECK-LABEL: @test_mm512_cvtnes2ph_pbf8(
// CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(
@@ -129,6 +137,14 @@ __m512i test_mm512_mask_cvtnes2ph_pbf8(__m512i __W, __mmask64 __U, __m512h __A,
return _mm512_mask_cvtnes2ph_pbf8(__W, __U, __A, __B);
}
+__m512i test_mm512_maskz_cvtnes2ph_pbf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtnes2ph_pbf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(
+ // CHECK: zeroinitializer
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ return _mm512_maskz_cvtnes2ph_pbf8(__U, __A, __B);
+}
+
__m512i test_mm512_cvtne2ph_phf8(__m512h __A, __m512h __B) {
// CHECK-LABEL: @test_mm512_cvtne2ph_phf8(
// CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(
@@ -143,18 +159,34 @@ __m512i test_mm512_mask_cvtne2ph_phf8(__m512i __W, __mmask64 __U, __m512h __A, _
return _mm512_mask_cvtne2ph_phf8(__W, __U, __A, __B);
}
-__m512i test_mm512_cvtne2ph2hf8s_phf8(__m512h __A, __m512h __B) {
- // CHECK-LABEL: @test_mm512_cvtne2ph2hf8s_phf8(
+__m512i test_mm512_maskz_cvtne2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtne2ph_phf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(
+ // CHECK: zeroinitializer
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ return _mm512_maskz_cvtne2ph_phf8(__U, __A, __B);
+}
+
+__m512i test_mm512_cvtnes2ph_phf8(__m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_cvtnes2ph_phf8(
// CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(
- return _mm512_cvtne2ph2hf8s_phf8(__A, __B);
+ return _mm512_cvtnes2ph_phf8(__A, __B);
}
-__m512i test_mm512_mask_cvtne2ph2hf8s_phf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
- // CHECK-LABEL: @test_mm512_mask_cvtne2ph2hf8s_phf8(
+__m512i test_mm512_mask_cvtnes2ph_phf8(__m512i __W, __mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_mask_cvtnes2ph_phf8(
// CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(
// CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
// CHECK: ret <8 x i64> %{{.*}}
- return _mm512_mask_cvtne2ph2hf8s_phf8(__W, __U, __A, __B);
+ return _mm512_mask_cvtnes2ph_phf8(__W, __U, __A, __B);
+}
+
+__m512i test_mm512_maskz_cvtnes2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtnes2ph_phf8(
+ // CHECK: call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(
+ // CHECK: zeroinitializer
+ // CHECK: select <64 x i1> %{{.*}}, <64 x i8> %{{.*}}, <64 x i8> %{{.*}}
+ return _mm512_maskz_cvtnes2ph_phf8(__U, __A, __B);
}
__m512h test_mm512_cvtnehf8_ph(__m256i __A) {
diff --git a/clang/test/CodeGen/X86/avx10_2convert-builtins.c b/clang/test/CodeGen/X86/avx10_2convert-builtins.c
index e4c302d4a23585..ad72afa3cbd6a4 100644
--- a/clang/test/CodeGen/X86/avx10_2convert-builtins.c
+++ b/clang/test/CodeGen/X86/avx10_2convert-builtins.c
@@ -199,6 +199,14 @@ __m128i test_mm_mask_cvtne2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m1
return _mm_mask_cvtne2ph_pbf8(__W, __U, __A, __B);
}
+__m128i test_mm_maskz_cvtne2ph_pbf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtne2ph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ return _mm_maskz_cvtne2ph_pbf8(__U, __A, __B);
+}
+
__m256i test_mm256_cvtne2ph_pbf8(__m256h __A, __m256h __B) {
// CHECK-LABEL: @test_mm256_cvtne2ph_pbf8(
// CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(
@@ -213,6 +221,14 @@ __m256i test_mm256_mask_cvtne2ph_pbf8(__m256i __W, __mmask16 __U, __m256h __A, _
return _mm256_mask_cvtne2ph_pbf8(__W, __U, __A, __B);
}
+__m256i test_mm256_maskz_cvtne2ph_pbf8(__mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtne2ph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ return _mm256_maskz_cvtne2ph_pbf8(__U, __A, __B);
+}
+
__m128i test_mm_cvtnes2ph_pbf8(__m128h __A, __m128h __B) {
// CHECK-LABEL: @test_mm_cvtnes2ph_pbf8(
// CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(
@@ -227,6 +243,14 @@ __m128i test_mm_mask_cvtnes2ph_pbf8(__m128i __W, __mmask16 __U, __m128h __A, __m
return _mm_mask_cvtnes2ph_pbf8(__W, __U, __A, __B);
}
+__m128i test_mm_maskz_cvtnes2ph_pbf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtnes2ph_pbf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ return _mm_maskz_cvtnes2ph_pbf8(__U, __A, __B);
+}
+
__m256i test_mm256_cvtnes2ph_pbf8(__m256h __A, __m256h __B) {
// CHECK-LABEL: @test_mm256_cvtnes2ph_pbf8(
// CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(
@@ -241,6 +265,14 @@ __m256i test_mm256_mask_cvtnes2ph_pbf8(__m256i __W, __mmask16 __U, __m256h __A,
return _mm256_mask_cvtnes2ph_pbf8(__W, __U, __A, __B);
}
+__m256i test_mm256_maskz_cvtnes2ph_pbf8(__mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtnes2ph_pbf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ return _mm256_maskz_cvtnes2ph_pbf8(__U, __A, __B);
+}
+
__m128i test_mm_cvtne2ph_phf8(__m128h __A, __m128h __B) {
// CHECK-LABEL: @test_mm_cvtne2ph_phf8(
// CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(
@@ -255,6 +287,14 @@ __m128i test_mm_mask_cvtne2ph_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m1
return _mm_mask_cvtne2ph_phf8(__W, __U, __A, __B);
}
+__m128i test_mm_maskz_cvtne2ph_phf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtne2ph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ return _mm_maskz_cvtne2ph_phf8(__U, __A, __B);
+}
+
__m256i test_mm256_cvtne2ph_phf8(__m256h __A, __m256h __B) {
// CHECK-LABEL: @test_mm256_cvtne2ph_phf8(
// CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(
@@ -269,32 +309,56 @@ __m256i test_mm256_mask_cvtne2ph_phf8(__m256i __W, __mmask16 __U, __m256h __A, _
return _mm256_mask_cvtne2ph_phf8(__W, __U, __A, __B);
}
-__m128i test_mm_cvtne2ph2hf8s_phf8(__m128h __A, __m128h __B) {
- // CHECK-LABEL: @test_mm_cvtne2ph2hf8s_phf8(
+__m256i test_mm256_maskz_cvtne2ph_phf8(__mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtne2ph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ return _mm256_maskz_cvtne2ph_phf8(__U, __A, __B);
+}
+
+__m128i test_mm_cvtnes2ph_phf8(__m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_cvtnes2ph_phf8(
// CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(
- return _mm_cvtne2ph2hf8s_phf8(__A, __B);
+ return _mm_cvtnes2ph_phf8(__A, __B);
}
-__m128i test_mm_mask_cvtne2ph2hf8s_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
- // CHECK-LABEL: @test_mm_mask_cvtne2ph2hf8s_phf8(
+__m128i test_mm_mask_cvtnes2ph_phf8(__m128i __W, __mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_mask_cvtnes2ph_phf8(
// CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(
// CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
// CHECK: ret <2 x i64> %{{.*}}
- return _mm_mask_cvtne2ph2hf8s_phf8(__W, __U, __A, __B);
+ return _mm_mask_cvtnes2ph_phf8(__W, __U, __A, __B);
}
-__m256i test_mm256_cvtne2ph2hf8s_phf8(__m256h __A, __m256h __B) {
- // CHECK-LABEL: @test_mm256_cvtne2ph2hf8s_phf8(
+__m128i test_mm_maskz_cvtnes2ph_phf8(__mmask16 __U, __m128h __A, __m128h __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtnes2ph_phf8(
+ // CHECK: call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(
+ // CHECK: zeroinitializer
+ // CHECK: select <16 x i1> %{{.*}}, <16 x i8> %{{.*}}, <16 x i8> %{{.*}}
+ return _mm_maskz_cvtnes2ph_phf8(__U, __A, __B);
+}
+
+__m256i test_mm256_cvtnes2ph_phf8(__m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_cvtnes2ph_phf8(
// CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(
- return _mm256_cvtne2ph2hf8s_phf8(__A, __B);
+ return _mm256_cvtnes2ph_phf8(__A, __B);
}
-__m256i test_mm256_mask_cvtne2ph2hf8s_phf8(__m256i __W, __mmask16 __U, __m256h __A, __m256h __B) {
- // CHECK-LABEL: @test_mm256_mask_cvtne2ph2hf8s_phf8(
+__m256i test_mm256_mask_cvtnes2ph_phf8(__m256i __W, __mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_mask_cvtnes2ph_phf8(
// CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(
// CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
// CHECK: ret <4 x i64> %{{.*}}
- return _mm256_mask_cvtne2ph2hf8s_phf8(__W, __U, __A, __B);
+ return _mm256_mask_cvtnes2ph_phf8(__W, __U, __A, __B);
+}
+
+__m256i test_mm256_maskz_cvtnes2ph_phf8(__mmask16 __U, __m256h __A, __m256h __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtnes2ph_phf8(
+ // CHECK: call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(
+ // CHECK: zeroinitializer
+ // CHECK: select <32 x i1> %{{.*}}, <32 x i8> %{{.*}}, <32 x i8> %{{.*}}
+ return _mm256_maskz_cvtnes2ph_phf8(__U, __A, __B);
}
__m128h test_mm_cvtnehf8_ph(__m128i __A) {
diff --git a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
index b9febe8f48fa23..935155dcede840 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
@@ -3,15 +3,10 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X86
define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512(<16 x float> %A, <16 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512:
-; X64: # %bb.0:
-; X64-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x67,0xc1]
-; X64-NEXT: retq # encoding: [0xc3]
-;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512:
-; X86: # %bb.0:
-; X86-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x67,0xc1]
-; X86-NEXT: retl # encoding: [0xc3]
+; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx512:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x67,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
%ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> zeroinitializer, i32 -1, i32 4)
ret <32 x half> %ret
}
@@ -33,15 +28,10 @@ define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_mask(<32 x half> %W, i32
}
define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round(<16 x float> %A, <16 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round:
-; X64: # %bb.0:
-; X64-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x78,0x67,0xc1]
-; X64-NEXT: retq # encoding: [0xc3]
-;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round:
-; X86: # %bb.0:
-; X86-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x78,0x67,0xc1]
-; X86-NEXT: retl # encoding: [0xc3]
+; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x78,0x67,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
%ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> zeroinitializer, i32 -1, i32 11)
ret <32 x half> %ret
}
@@ -265,6 +255,25 @@ define <8 x i64> @test_int_x86_avx10_vcvtne2ph2bf8512_mask(<8 x i64> %C, i64 %U,
ret <8 x i64> %5
}
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2bf8512_maskz(i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8512_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xc9,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8512_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7f,0xc9,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(<32 x half> %A, <32 x half> %B)
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> zeroinitializer
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8512(<32 x half> %A, <32 x half> %B)
define <64 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s512(<32 x half> %A, <32 x half> %B) nounwind {
@@ -298,6 +307,25 @@ define <8 x i64> @test_int_x86_avx10_vcvtne2ph2bf8s512_mask(<8 x i64> %C, i64 %U
ret <8 x i64> %5
}
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2bf8s512_maskz(i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s512_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8s %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s512_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8s %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s512(<32 x half> %A, <32 x half> %B)
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> zeroinitializer
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
define <64 x i8> @test_int_x86_avx10_vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B) nounwind {
; CHECK-LABEL: test_int_x86_avx10_vcvtne2ph2hf8512:
; CHECK: # %bb.0:
@@ -327,6 +355,25 @@ define <8 x i64> @test_int_x86_avx10_vcvtne2ph2hf8512_mask(<8 x i64> %C, i64 %U,
ret <8 x i64> %5
}
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2hf8512_maskz(i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8512_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8512_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8 %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B)
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> zeroinitializer
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8512(<32 x half> %A, <32 x half> %B)
define <64 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B) nounwind {
@@ -358,6 +405,26 @@ define <8 x i64> @test_int_x86_avx10_vcvtne2ph2hf8s512_mask(<8 x i64> %C, i64 %U
ret <8 x i64> %5
}
+
+define <8 x i64> @test_int_x86_avx10_vcvtne2ph2hf8s512_maskz(i64 %U, <32 x half> %A, <32 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s512_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovq %rdi, %k1 # encoding: [0xc4,0xe1,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8s %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s512_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovq {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8s %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xc9,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B)
+ %3 = bitcast i64 %U to <64 x i1>
+ %4 = select <64 x i1> %3, <64 x i8> %1, <64 x i8> zeroinitializer
+ %5 = bitcast <64 x i8> %4 to <8 x i64>
+ ret <8 x i64> %5
+}
+
declare <64 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s512(<32 x half> %A, <32 x half> %B)
define <32 x half> @test_int_x86_avx10_vcvthf82ph512(<32 x i8> %A) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
index 6fda46185bb676..12bb1164c36986 100644
--- a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
@@ -3,15 +3,10 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X86
define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128(<4 x float> %A, <4 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx128:
-; X64: # %bb.0:
-; X64-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x08,0x67,0xc1]
-; X64-NEXT: retq # encoding: [0xc3]
-;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx128:
-; X86: # %bb.0:
-; X86-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x08,0x67,0xc1]
-; X86-NEXT: retl # encoding: [0xc3]
+; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx128:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x08,0x67,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
%ret = call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float> %A, <4 x float> %B, <8 x half> zeroinitializer, i8 -1)
ret <8 x half> %ret
}
@@ -35,15 +30,10 @@ define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128_mask(<8 x half> %W, i8 %U,
declare <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float>, <4 x float>, <8 x half>, i8)
define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256(<8 x float> %A, <8 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256:
-; X64: # %bb.0:
-; X64-NEXT: vcvt2ps2phx %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7d,0x28,0x67,0xc1]
-; X64-NEXT: retq # encoding: [0xc3]
-;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256:
-; X86: # %bb.0:
-; X86-NEXT: vcvt2ps2phx %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7d,0x28,0x67,0xc1]
-; X86-NEXT: retl # encoding: [0xc3]
+; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx256:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvt2ps2phx %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7d,0x28,0x67,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
%ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> zeroinitializer, i16 -1, i32 4)
ret <16 x half> %ret
}
@@ -65,15 +55,10 @@ define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_mask(<16 x half> %W, i16
}
define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round(<8 x float> %A, <8 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round:
-; X64: # %bb.0:
-; X64-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x79,0x78,0x67,0xc1]
-; X64-NEXT: retq # encoding: [0xc3]
-;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round:
-; X86: # %bb.0:
-; X86-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x79,0x78,0x67,0xc1]
-; X86-NEXT: retl # encoding: [0xc3]
+; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x79,0x78,0x67,0xc1]
+; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
%ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> zeroinitializer, i16 -1, i32 11)
ret <16 x half> %ret
}
@@ -487,6 +472,24 @@ define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8128_mask(<16 x i8> %C, i16 %U,
ret <16 x i8> %3
}
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8128_maskz(<16 x i8> %C, i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8128_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8 %xmm2, %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x77,0x89,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8128_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8 %xmm2, %xmm1, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x77,0x89,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> zeroinitializer
+ ret <16 x i8> %3
+}
+
declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8128(<8 x half> %A, <8 x half> %B)
define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B) nounwind {
@@ -516,6 +519,24 @@ define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8256_mask(<32 x i8> %C, i32 %U,
ret <32 x i8> %3
}
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8256_maskz(<32 x i8> %C, i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8256_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8 %ymm2, %ymm1, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x77,0xa9,0x74,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8256_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8 %ymm2, %ymm1, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x77,0xa9,0x74,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> zeroinitializer
+ ret <32 x i8> %3
+}
+
declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8256(<16 x half> %A, <16 x half> %B)
define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B) nounwind {
@@ -545,6 +566,24 @@ define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s128_mask(<16 x i8> %C, i16 %U
ret <16 x i8> %3
}
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s128_maskz(i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s128_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s128_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> zeroinitializer
+ ret <16 x i8> %3
+}
+
declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s128(<8 x half> %A, <8 x half> %B)
define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B) nounwind {
@@ -574,6 +613,24 @@ define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s256_mask(<32 x i8> %C, i32 %U
ret <32 x i8> %3
}
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2bf8s256_maskz(i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s256_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2bf8s %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x74,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2bf8s256_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2bf8s %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x74,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> zeroinitializer
+ ret <32 x i8> %3
+}
+
declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2bf8s256(<16 x half> %A, <16 x half> %B)
define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B) nounwind {
@@ -603,6 +660,24 @@ define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8128_mask(<16 x i8> %C, i16 %U,
ret <16 x i8> %3
}
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8128_maskz(i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8128_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8128_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8 %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> zeroinitializer
+ ret <16 x i8> %3
+}
+
declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8128(<8 x half> %A, <8 x half> %B)
define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B) nounwind {
@@ -632,6 +707,24 @@ define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8256_mask(<32 x i8> %C, i32 %U,
ret <32 x i8> %3
}
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8256_maskz(i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8256_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8 %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x18,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8256_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8 %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x18,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> zeroinitializer
+ ret <32 x i8> %3
+}
+
declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8256(<16 x half> %A, <16 x half> %B)
define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B) nounwind {
@@ -661,6 +754,24 @@ define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s128_mask(<16 x i8> %C, i16 %U
ret <16 x i8> %3
}
+define <16 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s128_maskz(i16 %U, <8 x half> %A, <8 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s128_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s128_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8s %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0x89,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B)
+ %2 = bitcast i16 %U to <16 x i1>
+ %3 = select <16 x i1> %2, <16 x i8> %1, <16 x i8> zeroinitializer
+ ret <16 x i8> %3
+}
+
declare <16 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s128(<8 x half> %A, <8 x half> %B)
define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B) nounwind {
@@ -690,6 +801,24 @@ define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s256_mask(<32 x i8> %C, i32 %U
ret <32 x i8> %3
}
+define <32 x i8> @test_int_x86_avx10_vcvtne2ph2hf8s256_maskz(i32 %U, <16 x half> %A, <16 x half> %B) nounwind {
+; X64-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s256_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvtne2ph2hf8s %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x1b,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvtne2ph2hf8s256_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvtne2ph2hf8s %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf5,0x7f,0xa9,0x1b,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %1 = call <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B)
+ %2 = bitcast i32 %U to <32 x i1>
+ %3 = select <32 x i1> %2, <32 x i8> %1, <32 x i8> zeroinitializer
+ ret <32 x i8> %3
+}
+
declare <32 x i8> @llvm.x86.avx10.vcvtne2ph2hf8s256(<16 x half> %A, <16 x half> %B)
define <8 x half> @test_int_x86_avx10_vcvthf82ph128(<16 x i8> %A) nounwind {
>From 3a4f57570685e9c8281f4fc4d991788b120d6047 Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Thu, 15 Aug 2024 13:39:23 +0800
Subject: [PATCH 3/7] address comments
---
clang/include/clang/Basic/BuiltinsX86.def | 6 +-
clang/lib/Headers/avx10_2_512convertintrin.h | 18 ++++-
clang/lib/Headers/avx10_2convertintrin.h | 30 +++++--
.../CodeGen/X86/avx10_2_512convert-builtins.c | 12 +++
.../CodeGen/X86/avx10_2convert-builtins.c | 18 +++++
llvm/include/llvm/IR/IntrinsicsX86.td | 6 +-
llvm/lib/Target/X86/X86InstrAVX10.td | 67 ++++++----------
llvm/lib/Target/X86/X86InstrAVX512.td | 17 ++--
llvm/lib/TargetParser/X86TargetParser.cpp | 2 +-
.../X86/avx10_2_512convert-intrinsics.ll | 52 ++++++++++---
.../CodeGen/X86/avx10_2convert-intrinsics.ll | 78 +++++++++++++++----
11 files changed, 212 insertions(+), 94 deletions(-)
diff --git a/clang/include/clang/Basic/BuiltinsX86.def b/clang/include/clang/Basic/BuiltinsX86.def
index 42fe284506111e..e4aa8661b9a806 100644
--- a/clang/include/clang/Basic/BuiltinsX86.def
+++ b/clang/include/clang/Basic/BuiltinsX86.def
@@ -2246,9 +2246,9 @@ TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8_512, "V64cV32xV32x", "nV:512:", "avx
TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8s_128, "V16cV8xV8x", "nV:128:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8s_256, "V32cV16xV16x", "nV:256:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vcvtne2ph2hf8s_512, "V64cV32xV32x", "nV:512:", "avx10.2-512")
-TARGET_BUILTIN(__builtin_ia32_vcvtnehf8_2ph128_mask, "V8xV16cV8xUc", "nV:128:", "avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vcvtnehf8_2ph256_mask, "V16xV16cV16xUs", "nV:256:", "avx10.2-256")
-TARGET_BUILTIN(__builtin_ia32_vcvtnehf8_2ph512_mask, "V32xV32cV32xUi", "nV:512:", "avx10.2-512")
+TARGET_BUILTIN(__builtin_ia32_vcvthf8_2ph128_mask, "V8xV16cV8xUc", "nV:128:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvthf8_2ph256_mask, "V16xV16cV16xUs", "nV:256:", "avx10.2-256")
+TARGET_BUILTIN(__builtin_ia32_vcvthf8_2ph512_mask, "V32xV32cV32xUi", "nV:512:", "avx10.2-512")
TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8_128_mask, "V16cV8xV16cUc", "nV:128:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8_256_mask, "V16cV16xV16cUs", "nV:256:", "avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vcvtneph2bf8_512_mask, "V32cV32xV32cUi", "nV:512:", "avx10.2-512")
diff --git a/clang/lib/Headers/avx10_2_512convertintrin.h b/clang/lib/Headers/avx10_2_512convertintrin.h
index 585e46d6d44602..a34e135fa30473 100644
--- a/clang/lib/Headers/avx10_2_512convertintrin.h
+++ b/clang/lib/Headers/avx10_2_512convertintrin.h
@@ -35,6 +35,13 @@ _mm512_mask_cvtx2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m512 __B) {
_MM_FROUND_CUR_DIRECTION);
}
+static __inline__ __m512h __DEFAULT_FN_ATTRS512
+_mm512_maskz_cvtx2ps_ph(__mmask32 __U, __m512 __A, __m512 __B) {
+ return (__m512h)__builtin_ia32_vcvt2ps2phx512_mask(
+ (__v16sf)__A, (__v16sf)__B, (__v32hf)_mm512_setzero_ph(), (__mmask32)__U,
+ _MM_FROUND_CUR_DIRECTION);
+}
+
#define _mm512_cvtx_round2ps_ph(A, B, R) \
((__m512h)__builtin_ia32_vcvt2ps2phx512_mask( \
(__v16sf)(A), (__v16sf)(B), (__v32hf)_mm512_undefined_ph(), \
@@ -45,6 +52,11 @@ _mm512_mask_cvtx2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m512 __B) {
(__v32hf)(W), (__mmask32)(U), \
(const int)(R)))
+#define _mm512_maskz_cvtx_round2ps_ph(U, A, B, R) \
+ ((__m512h)__builtin_ia32_vcvt2ps2phx512_mask( \
+ (__v16sf)(A), (__v16sf)(B), (__v32hf)_mm512_setzero_ph(), \
+ (__mmask32)(U), (const int)(R)))
+
static __inline__ __m256i __DEFAULT_FN_ATTRS512
_mm512_cvtbiasph_pbf8(__m512i __A, __m512h __B) {
return (__m256i)__builtin_ia32_vcvtbiasph2bf8_512_mask(
@@ -203,19 +215,19 @@ _mm512_maskz_cvtnes2ph_phf8(__mmask64 __U, __m512h __A, __m512h __B) {
static __inline__ __m512h __DEFAULT_FN_ATTRS512
_mm512_cvtnehf8_ph(__m256i __A) {
- return (__m512h)__builtin_ia32_vcvtnehf8_2ph512_mask(
+ return (__m512h)__builtin_ia32_vcvthf8_2ph512_mask(
(__v32qi)__A, (__v32hf)(__m512h)_mm512_undefined_ph(), (__mmask32)-1);
}
static __inline__ __m512h __DEFAULT_FN_ATTRS512
_mm512_mask_cvtnehf8_ph(__m512h __W, __mmask32 __U, __m256i __A) {
- return (__m512h)__builtin_ia32_vcvtnehf8_2ph512_mask(
+ return (__m512h)__builtin_ia32_vcvthf8_2ph512_mask(
(__v32qi)__A, (__v32hf)(__m512h)__W, (__mmask32)__U);
}
static __inline__ __m512h __DEFAULT_FN_ATTRS512
_mm512_maskz_cvtnehf8_ph(__mmask32 __U, __m256i __A) {
- return (__m512h)__builtin_ia32_vcvtnehf8_2ph512_mask(
+ return (__m512h)__builtin_ia32_vcvthf8_2ph512_mask(
(__v32qi)__A, (__v32hf)(__m512h)_mm512_setzero_ph(), (__mmask32)__U);
}
diff --git a/clang/lib/Headers/avx10_2convertintrin.h b/clang/lib/Headers/avx10_2convertintrin.h
index b569fa2d8da34d..134adb2850c8de 100644
--- a/clang/lib/Headers/avx10_2convertintrin.h
+++ b/clang/lib/Headers/avx10_2convertintrin.h
@@ -36,6 +36,12 @@ _mm_mask_cvtx2ps_ph(__m128h __W, __mmask8 __U, __m128 __A, __m128 __B) {
(__v4sf)__A, (__v4sf)__B, (__v8hf)__W, (__mmask8)__U);
}
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_maskz_cvtx2ps_ph(__mmask8 __U, __m128 __A, __m128 __B) {
+ return (__m128h)__builtin_ia32_vcvt2ps2phx128_mask(
+ (__v4sf)__A, (__v4sf)__B, (__v8hf)_mm_setzero_ph(), (__mmask8)__U);
+}
+
static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_cvtx2ps_ph(__m256 __A,
__m256 __B) {
return (__m256h)__builtin_ia32_vcvt2ps2phx256_mask(
@@ -50,6 +56,13 @@ _mm256_mask_cvtx2ps_ph(__m256h __W, __mmask16 __U, __m256 __A, __m256 __B) {
_MM_FROUND_CUR_DIRECTION);
}
+static __inline__ __m256h __DEFAULT_FN_ATTRS256
+_mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256 __B) {
+ return (__m256h)__builtin_ia32_vcvt2ps2phx256_mask(
+ (__v8sf)__A, (__v8sf)__B, (__v16hf)_mm256_setzero_ph(), (__mmask16)__U,
+ _MM_FROUND_CUR_DIRECTION);
+}
+
#define _mm256_cvtx_round2ps_ph(A, B, R) \
((__m256h)__builtin_ia32_vcvt2ps2phx256_mask( \
(__v8sf)(A), (__v8sf)(B), (__v16hf)_mm256_undefined_ph(), \
@@ -59,6 +72,11 @@ _mm256_mask_cvtx2ps_ph(__m256h __W, __mmask16 __U, __m256 __A, __m256 __B) {
((__m256h)__builtin_ia32_vcvt2ps2phx256_mask( \
(__v8sf)(A), (__v8sf)(B), (__v16hf)(W), (__mmask16)(U), (const int)(R)))
+#define _mm256_maskz_cvtx_round2ps_ph(U, A, B, R) \
+ ((__m256h)__builtin_ia32_vcvt2ps2phx256_mask( \
+ (__v8sf)(A), (__v8sf)(B), (__v16hf)(_mm256_setzero_ph()), \
+ (__mmask16)(U), (const int)(R)))
+
static __inline__ __m128i __DEFAULT_FN_ATTRS128
_mm_cvtbiasph_pbf8(__m128i __A, __m128h __B) {
return (__m128i)__builtin_ia32_vcvtbiasph2bf8_128_mask(
@@ -368,37 +386,37 @@ _mm256_maskz_cvtnes2ph_phf8(__mmask32 __U, __m256h __A, __m256h __B) {
}
static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_cvtnehf8_ph(__m128i __A) {
- return (__m128h)__builtin_ia32_vcvtnehf8_2ph128_mask(
+ return (__m128h)__builtin_ia32_vcvthf8_2ph128_mask(
(__v16qi)__A, (__v8hf)(__m128h)_mm_undefined_ph(), (__mmask8)-1);
}
static __inline__ __m128h __DEFAULT_FN_ATTRS128
_mm_mask_cvtnehf8_ph(__m128h __W, __mmask8 __U, __m128i __A) {
- return (__m128h)__builtin_ia32_vcvtnehf8_2ph128_mask(
+ return (__m128h)__builtin_ia32_vcvthf8_2ph128_mask(
(__v16qi)__A, (__v8hf)(__m128h)__W, (__mmask8)__U);
}
static __inline__ __m128h __DEFAULT_FN_ATTRS128
_mm_maskz_cvtnehf8_ph(__mmask8 __U, __m128i __A) {
- return (__m128h)__builtin_ia32_vcvtnehf8_2ph128_mask(
+ return (__m128h)__builtin_ia32_vcvthf8_2ph128_mask(
(__v16qi)__A, (__v8hf)(__m128h)_mm_setzero_ph(), (__mmask8)__U);
}
static __inline__ __m256h __DEFAULT_FN_ATTRS256
_mm256_cvtnehf8_ph(__m128i __A) {
- return (__m256h)__builtin_ia32_vcvtnehf8_2ph256_mask(
+ return (__m256h)__builtin_ia32_vcvthf8_2ph256_mask(
(__v16qi)__A, (__v16hf)(__m256h)_mm256_undefined_ph(), (__mmask16)-1);
}
static __inline__ __m256h __DEFAULT_FN_ATTRS256
_mm256_mask_cvtnehf8_ph(__m256h __W, __mmask16 __U, __m128i __A) {
- return (__m256h)__builtin_ia32_vcvtnehf8_2ph256_mask(
+ return (__m256h)__builtin_ia32_vcvthf8_2ph256_mask(
(__v16qi)__A, (__v16hf)(__m256h)__W, (__mmask16)__U);
}
static __inline__ __m256h __DEFAULT_FN_ATTRS256
_mm256_maskz_cvtnehf8_ph(__mmask16 __U, __m128i __A) {
- return (__m256h)__builtin_ia32_vcvtnehf8_2ph256_mask(
+ return (__m256h)__builtin_ia32_vcvthf8_2ph256_mask(
(__v16qi)__A, (__v16hf)(__m256h)_mm256_setzero_ph(), (__mmask16)__U);
}
diff --git a/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c b/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
index 1956eb88dc5d51..e71cc0c9ad6b02 100644
--- a/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
+++ b/clang/test/CodeGen/X86/avx10_2_512convert-builtins.c
@@ -17,6 +17,12 @@ __m512h test_mm512_mask_cvtx2ps_ph(__m512h __W, __mmask32 __U, __m512 __A, __m51
return _mm512_mask_cvtx2ps_ph(__W, __U, __A, __B);
}
+__m512h test_mm512_maskz_cvtx2ps_ph(__mmask32 __U, __m512 __A, __m512 __B) {
+ // CHECK-LABEL: @test_mm512_maskz_cvtx2ps_ph(
+ // CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
+ return _mm512_maskz_cvtx2ps_ph(__U, __A, __B);
+}
+
__m512h test_mm512_cvtx_round2ps_ph(__m512 __A, __m512 __B) {
// CHECK-LABEL: @test_mm512_cvtx_round2ps_ph(
// CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
@@ -29,6 +35,12 @@ __m512h test_mm512_mask_cvtx_round2ps_ph(__m512h __W, __mmask32 __U, __m512 __A,
return _mm512_mask_cvtx_round2ps_ph(__W, __U, __A, __B, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
}
+__m512h test_mm512_maskz_cvtx_round2ps_ph(__mmask32 __U, __m512 __A, __m512 __B) {
+// CHECK-LABEL: @test_mm512_maskz_cvtx_round2ps_ph(
+// CHECK: call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512
+ return _mm512_maskz_cvtx_round2ps_ph(__U, __A, __B, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
+}
+
__m256i test_mm512_cvtbiasph_pbf8(__m512i __A, __m512h __B) {
// CHECK-LABEL: @test_mm512_cvtbiasph_pbf8(
// CHECK: call <32 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8512(
diff --git a/clang/test/CodeGen/X86/avx10_2convert-builtins.c b/clang/test/CodeGen/X86/avx10_2convert-builtins.c
index ad72afa3cbd6a4..8086c1b5d33993 100644
--- a/clang/test/CodeGen/X86/avx10_2convert-builtins.c
+++ b/clang/test/CodeGen/X86/avx10_2convert-builtins.c
@@ -17,6 +17,12 @@ __m128h test_mm_mask_cvtx2ps_ph(__m128h __W, __mmask8 __U, __m128 __A, __m128 __
return _mm_mask_cvtx2ps_ph(__W, __U, __A, __B);
}
+__m128h test_mm_maskz_cvtx2ps_ph(__mmask8 __U, __m128 __A, __m128 __B) {
+ // CHECK-LABEL: @test_mm_maskz_cvtx2ps_ph(
+ // CHECK: call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128
+ return _mm_maskz_cvtx2ps_ph(__U, __A, __B);
+}
+
__m256h test_mm256_cvtx2ps_ph(__m256 __A, __m256 __B) {
// CHECK-LABEL: @test_mm256_cvtx2ps_ph(
// CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256
@@ -29,6 +35,12 @@ __m256h test_mm256_mask_cvtx2ps_ph(__m256h __W, __mmask16 __U, __m256 __A, __m25
return _mm256_mask_cvtx2ps_ph(__W, __U, __A, __B);
}
+__m256h test_mm256_maskz_cvtx2ps_ph(__mmask16 __U, __m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtx2ps_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256
+ return _mm256_maskz_cvtx2ps_ph(__U, __A, __B);
+}
+
__m256h test_mm256_cvtx_round2ps_ph(__m256 __A, __m256 __B) {
// CHECK-LABEL: @test_mm256_cvtx_round2ps_ph(
// CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(
@@ -41,6 +53,12 @@ __m256h test_mm256_mask_cvtx_round2ps_ph(__m256h __W, __mmask8 __U, __m256 __A,
return _mm256_mask_cvtx_round2ps_ph(__W, __U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
}
+__m256h test_mm256_maskz_cvtx_round2ps_ph(__mmask8 __U, __m256 __A, __m256 __B) {
+ // CHECK-LABEL: @test_mm256_maskz_cvtx_round2ps_ph(
+ // CHECK: call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(
+ return _mm256_maskz_cvtx_round2ps_ph(__U, __A, __B, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
+}
+
__m128i test_mm_cvtbiasph_pbf8(__m128i __A, __m128h __B) {
// CHECK-LABEL: @test_mm_cvtbiasph_pbf8(
// CHECK: call <16 x i8> @llvm.x86.avx10.mask.vcvtbiasph2bf8128(
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index c48db2352a7fed..577d4fb507c647 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -7173,13 +7173,13 @@ def int_x86_avx10_vcvtne2ph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8
def int_x86_avx10_vcvtne2ph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_512">,
DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
[IntrNoMem]>;
-def int_x86_avx10_mask_vcvthf82ph128 : ClangBuiltin<"__builtin_ia32_vcvtnehf8_2ph128_mask">,
+def int_x86_avx10_mask_vcvthf82ph128 : ClangBuiltin<"__builtin_ia32_vcvthf8_2ph128_mask">,
DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_i8_ty],
[IntrNoMem]>;
-def int_x86_avx10_mask_vcvthf82ph256 : ClangBuiltin<"__builtin_ia32_vcvtnehf8_2ph256_mask">,
+def int_x86_avx10_mask_vcvthf82ph256 : ClangBuiltin<"__builtin_ia32_vcvthf8_2ph256_mask">,
DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v16i8_ty, llvm_v16f16_ty, llvm_i16_ty],
[IntrNoMem]>;
-def int_x86_avx10_mask_vcvthf82ph512 : ClangBuiltin<"__builtin_ia32_vcvtnehf8_2ph512_mask">,
+def int_x86_avx10_mask_vcvthf82ph512 : ClangBuiltin<"__builtin_ia32_vcvthf8_2ph512_mask">,
DefaultAttrsIntrinsic<[llvm_v32f16_ty], [llvm_v32i8_ty, llvm_v32f16_ty, llvm_i32_ty],
[IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_128_mask">,
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index 32b3698f25b0e1..68c412530885e1 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -642,10 +642,10 @@ multiclass avx10_cvt2ps2ph_rc<bits<8> opc, string OpcodeStr, X86FoldableSchedWri
}
multiclass avx10_cvt2ps2ph<bits<8> opc, string OpcodeStr,
- X86SchedWriteWidths sched,
- AVX512VLVectorVTInfo _SrcVTInfo,
- AVX512VLVectorVTInfo _DstVTInfo,
- SDNode OpNode, SDNode OpNodeRnd> {
+ X86SchedWriteWidths sched,
+ AVX512VLVectorVTInfo _SrcVTInfo,
+ AVX512VLVectorVTInfo _DstVTInfo,
+ SDNode OpNode, SDNode OpNodeRnd> {
let Predicates = [HasAVX10_2_512], Uses = [MXCSR] in {
defm Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
_SrcVTInfo.info512, _DstVTInfo.info512,
@@ -678,57 +678,34 @@ defm VCVT2PS2PHX : avx10_cvt2ps2ph<0x67, "vcvt2ps2phx",
avx512vl_f32_info, avx512vl_f16_info,
X86vcvt2ps2phx, X86vcvt2ps2phxRnd>, T8;
-multiclass avx10_binop_all<bits<8> opc, string OpcodeStr,
- X86SchedWriteWidths sched,
- AVX512VLVectorVTInfo _SrcVTInfo,
- AVX512VLVectorVTInfo _DstVTInfo,
- SDNode OpNode,
- bit IsCommutable = 0> {
- let Predicates = [HasAVX10_2_512] in
- defm NAME#Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
- _SrcVTInfo.info512, _DstVTInfo.info512,
- _SrcVTInfo.info512, IsCommutable>,
- EVEX_V512;
- let Predicates = [HasAVX10_2] in {
- defm NAME#Z256 : avx512_binop_rm2<opc, OpcodeStr, sched.YMM, OpNode,
- _SrcVTInfo.info256, _DstVTInfo.info256,
- _SrcVTInfo.info256, IsCommutable>,
- EVEX_V256;
- defm NAME#Z128 : avx512_binop_rm2<opc, OpcodeStr, sched.XMM, OpNode,
- _SrcVTInfo.info128, _DstVTInfo.info128,
- _SrcVTInfo.info128, IsCommutable>,
- EVEX_V128;
- }
-}
-
-defm VCVTNE2PH2BF8 : avx10_binop_all<0x74, "vcvtne2ph2bf8", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2BF8 : avx512_binop_all2<0x74, "vcvtne2ph2bf8", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2bf8, 0>,
+ X86vcvtne2ph2bf8, [HasAVX10_2_512], [HasAVX10_2], 0>,
EVEX_CD8<16, CD8VF>, T8, XD;
-defm VCVTNE2PH2BF8S : avx10_binop_all<0x74, "vcvtne2ph2bf8s", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2BF8S : avx512_binop_all2<0x74, "vcvtne2ph2bf8s", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2bf8s, 0>,
+ X86vcvtne2ph2bf8s, [HasAVX10_2_512], [HasAVX10_2], 0>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
-defm VCVTNE2PH2HF8 : avx10_binop_all<0x18, "vcvtne2ph2hf8", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2HF8 : avx512_binop_all2<0x18, "vcvtne2ph2hf8", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2hf8, 0>,
+ X86vcvtne2ph2hf8, [HasAVX10_2_512], [HasAVX10_2], 0>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
-defm VCVTNE2PH2HF8S : avx10_binop_all<0x1b, "vcvtne2ph2hf8s", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2HF8S : avx512_binop_all2<0x1b, "vcvtne2ph2hf8s", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2hf8s, 0>,
+ X86vcvtne2ph2hf8s, [HasAVX10_2_512], [HasAVX10_2], 0>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
multiclass avx10_convert_3op_packed<bits<8> OpCode, string OpcodeStr,
- X86VectorVTInfo vt_dst, X86VectorVTInfo vt_src1,
- X86VectorVTInfo vt_src2, SDPatternOperator OpNode,
- SDPatternOperator MaskOpNode, X86FoldableSchedWrite sched,
- string Broadcast = vt_src2.BroadcastStr,
- X86MemOperand MemOp = vt_src2.MemOp,
- RegisterClass MaskRC = vt_src2.KRCWM,
- dag LdDAG = (vt_dst.VT (OpNode (vt_src1.VT vt_src1.RC:$src1),
- (vt_src2.VT (vt_src2.LdFrag addr:$src2)))),
- dag MaskLdDAG = (vt_dst.VT (MaskOpNode (vt_src1.VT vt_src1.RC:$src1),
- (vt_src2.VT (vt_src2.LdFrag addr:$src2))))> {
+ X86VectorVTInfo vt_dst, X86VectorVTInfo vt_src1,
+ X86VectorVTInfo vt_src2, SDPatternOperator OpNode,
+ SDPatternOperator MaskOpNode, X86FoldableSchedWrite sched,
+ string Broadcast = vt_src2.BroadcastStr,
+ X86MemOperand MemOp = vt_src2.MemOp,
+ RegisterClass MaskRC = vt_src2.KRCWM,
+ dag LdDAG = (vt_dst.VT (OpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT (vt_src2.LdFrag addr:$src2)))),
+ dag MaskLdDAG = (vt_dst.VT (MaskOpNode (vt_src1.VT vt_src1.RC:$src1),
+ (vt_src2.VT (vt_src2.LdFrag addr:$src2))))> {
defm rr : AVX512_maskable_cvt<OpCode, MRMSrcReg, vt_dst, (outs vt_dst.RC:$dst),
(ins vt_src1.RC:$src1, vt_src2.RC:$src2),
(ins vt_dst.RC:$src0, MaskRC:$mask, vt_src1.RC:$src1, vt_src2.RC:$src2),
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index e616a8a37c6487..db19a001bda1ee 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -12674,22 +12674,22 @@ multiclass avx512_binop_all2<bits<8> opc, string OpcodeStr,
X86SchedWriteWidths sched,
AVX512VLVectorVTInfo _SrcVTInfo,
AVX512VLVectorVTInfo _DstVTInfo,
- SDNode OpNode, Predicate prd,
- bit IsCommutable = 0> {
- let Predicates = [prd] in
+ SDNode OpNode, list<Predicate> prds512,
+ list<Predicate> prds, bit IsCommutable = 0> {
+ let Predicates = prds512 in
defm NAME#Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
_SrcVTInfo.info512, _DstVTInfo.info512,
_SrcVTInfo.info512, IsCommutable>,
- EVEX_V512, EVEX_CD8<32, CD8VF>;
- let Predicates = [HasVLX, prd] in {
+ EVEX_V512;
+ let Predicates = prds in {
defm NAME#Z256 : avx512_binop_rm2<opc, OpcodeStr, sched.YMM, OpNode,
_SrcVTInfo.info256, _DstVTInfo.info256,
_SrcVTInfo.info256, IsCommutable>,
- EVEX_V256, EVEX_CD8<32, CD8VF>;
+ EVEX_V256;
defm NAME#Z128 : avx512_binop_rm2<opc, OpcodeStr, sched.XMM, OpNode,
_SrcVTInfo.info128, _DstVTInfo.info128,
_SrcVTInfo.info128, IsCommutable>,
- EVEX_V128, EVEX_CD8<32, CD8VF>;
+ EVEX_V128;
}
}
@@ -12697,7 +12697,8 @@ let ExeDomain = SSEPackedSingle in
defm VCVTNE2PS2BF16 : avx512_binop_all2<0x72, "vcvtne2ps2bf16",
SchedWriteCvtPD2PS, //FIXME: Should be SchedWriteCvtPS2BF
avx512vl_f32_info, avx512vl_bf16_info,
- X86cvtne2ps2bf16, HasBF16, 0>, T8, XD;
+ X86cvtne2ps2bf16, [HasBF16], [HasVLX, HasBF16], 0>,
+ EVEX_CD8<32, CD8VF>, T8, XD;
// Truncate Float to BFloat16
multiclass avx512_cvtps2bf16<bits<8> opc, string OpcodeStr,
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp
index 57bda0651ea829..2d2f86b6281add 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -617,7 +617,7 @@ constexpr FeatureBitset ImpliedFeaturesAVX10_1 =
FeatureAVX512CD | FeatureAVX512VBMI | FeatureAVX512IFMA |
FeatureAVX512VNNI | FeatureAVX512BF16 | FeatureAVX512VPOPCNTDQ |
FeatureAVX512VBMI2 | FeatureAVX512BITALG | FeatureVAES | FeatureVPCLMULQDQ |
- FeatureAVX512FP16;
+ FeatureAVX512FP16 | FeatureAVX2;
constexpr FeatureBitset ImpliedFeaturesAVX10_1_512 =
FeatureAVX10_1 | FeatureEVEX512;
constexpr FeatureBitset ImpliedFeaturesAVX10_2 = FeatureAVX10_1;
diff --git a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
index 935155dcede840..e755b56f30d4c0 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
@@ -2,8 +2,8 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X64
; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=CHECK,X86
-define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512(<16 x float> %A, <16 x float> %B) {
-; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx512:
+define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512(<16 x float> %A, <16 x float> %B) {
+; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx512:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x48,0x67,0xc1]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
@@ -11,14 +11,14 @@ define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512(<16 x float> %A, <16 x fl
ret <32 x half> %ret
}
-define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_mask(<32 x half> %W, i32 %U, <16 x float> %A, <16 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512_mask:
+define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512_mask(<32 x half> %W, i32 %U, <16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx512_mask:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vcvt2ps2phx %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x49,0x67,0xc2]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512_mask:
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx512_mask:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
; X86-NEXT: vcvt2ps2phx %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x49,0x67,0xc2]
@@ -27,8 +27,24 @@ define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_mask(<32 x half> %W, i32
ret <32 x half> %ret
}
-define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round(<16 x float> %A, <16 x float> %B) {
-; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round:
+define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512_maskz(i32 %U, <16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx512_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0xc9,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx512_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0xc9,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> zeroinitializer, i32 %U, i32 4)
+ ret <32 x half> %ret
+}
+
+define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512_round(<16 x float> %A, <16 x float> %B) {
+; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx512_round:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 # encoding: [0x62,0xf2,0x7d,0x78,0x67,0xc1]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
@@ -36,14 +52,14 @@ define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round(<16 x float> %A, <1
ret <32 x half> %ret
}
-define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round_mask(<32 x half> %W, i32 %U, <16 x float> %A, <16 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round_mask:
+define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512_round_mask(<32 x half> %W, i32 %U, <16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx512_round_mask:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vcvt2ps2phx {rz-sae}, %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x79,0x67,0xc2]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx512_round_mask:
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx512_round_mask:
; X86: # %bb.0:
; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
; X86-NEXT: vcvt2ps2phx {rz-sae}, %zmm2, %zmm1, %zmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x79,0x67,0xc2]
@@ -52,6 +68,22 @@ define <32 x half> @test_int_x86_avx512_vcvt2ps2phx512_round_mask(<32 x half> %W
ret <32 x half> %ret
}
+define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512_round_maskz(i32 %U, <16 x float> %A, <16 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx512_round_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0xf9,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx512_round_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovd {{[0-9]+}}(%esp), %k1 # encoding: [0xc4,0xe1,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx {rz-sae}, %zmm1, %zmm0, %zmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0xf9,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.512(<16 x float> %A, <16 x float> %B, <32 x half> zeroinitializer, i32 %U, i32 11)
+ ret <32 x half> %ret
+}
+
declare <32 x half> @llvm.x86.avx10.mask.vcvt2ps2phx512(<16 x float>, <16 x float>, i32, i32)
define <32 x i8> @test_int_x86_avx10_vcvtbiasph2bf8512(<64 x i8> %A, <32 x half> %B) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
index 12bb1164c36986..fc74f0b490cd85 100644
--- a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
@@ -2,8 +2,8 @@
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X64
; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2-256 | FileCheck %s --check-prefixes=CHECK,X86
-define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128(<4 x float> %A, <4 x float> %B) {
-; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx128:
+define <8 x half> @test_int_x86_avx10_vcvt2ps2phx128(<4 x float> %A, <4 x float> %B) {
+; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx128:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 # encoding: [0x62,0xf2,0x7d,0x08,0x67,0xc1]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
@@ -11,14 +11,14 @@ define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128(<4 x float> %A, <4 x float
ret <8 x half> %ret
}
-define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128_mask(<8 x half> %W, i8 %U, <4 x float> %A, <4 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx128_mask:
+define <8 x half> @test_int_x86_avx10_vcvt2ps2phx128_mask(<8 x half> %W, i8 %U, <4 x float> %A, <4 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx128_mask:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vcvt2ps2phx %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0x67,0xc2]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx128_mask:
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx128_mask:
; X86: # %bb.0:
; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
; X86-NEXT: vcvt2ps2phx %xmm2, %xmm1, %xmm0 {%k1} # encoding: [0x62,0xf2,0x75,0x09,0x67,0xc2]
@@ -27,10 +27,26 @@ define <8 x half> @test_int_x86_avx512_vcvt2ps2phx128_mask(<8 x half> %W, i8 %U,
ret <8 x half> %ret
}
+define <8 x half> @test_int_x86_avx10_vcvt2ps2phx128_maskz(i8 %U, <4 x float> %A, <4 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx128_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0x89,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx128_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovb {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf9,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx %xmm1, %xmm0, %xmm0 {%k1} {z} # encoding: [0x62,0xf2,0x7d,0x89,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float> %A, <4 x float> %B, <8 x half> zeroinitializer, i8 %U)
+ ret <8 x half> %ret
+}
+
declare <8 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.128(<4 x float>, <4 x float>, <8 x half>, i8)
-define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256(<8 x float> %A, <8 x float> %B) {
-; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx256:
+define <16 x half> @test_int_x86_avx10_vcvt2ps2phx256(<8 x float> %A, <8 x float> %B) {
+; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx256:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvt2ps2phx %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x7d,0x28,0x67,0xc1]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
@@ -38,14 +54,14 @@ define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256(<8 x float> %A, <8 x floa
ret <16 x half> %ret
}
-define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_mask(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256_mask:
+define <16 x half> @test_int_x86_avx10_vcvt2ps2phx256_mask(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx256_mask:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vcvt2ps2phx %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x75,0x29,0x67,0xc2]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256_mask:
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx256_mask:
; X86: # %bb.0:
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
; X86-NEXT: vcvt2ps2phx %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x75,0x29,0x67,0xc2]
@@ -54,8 +70,24 @@ define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_mask(<16 x half> %W, i16
ret <16 x half> %ret
}
-define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round(<8 x float> %A, <8 x float> %B) {
-; CHECK-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round:
+define <16 x half> @test_int_x86_avx10_vcvt2ps2phx256_maskz(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx256_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx %ymm2, %ymm1, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x75,0xa9,0x67,0xc2]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx256_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx %ymm2, %ymm1, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x75,0xa9,0x67,0xc2]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> zeroinitializer, i16 %U, i32 4)
+ ret <16 x half> %ret
+}
+
+define <16 x half> @test_int_x86_avx10_vcvt2ps2phx256_round(<8 x float> %A, <8 x float> %B) {
+; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx256_round:
; CHECK: # %bb.0:
; CHECK-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 # encoding: [0x62,0xf2,0x79,0x78,0x67,0xc1]
; CHECK-NEXT: ret{{[l|q]}} # encoding: [0xc3]
@@ -63,14 +95,14 @@ define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round(<8 x float> %A, <8
ret <16 x half> %ret
}
-define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round_mask(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
-; X64-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round_mask:
+define <16 x half> @test_int_x86_avx10_vcvt2ps2phx256_round_mask(<16 x half> %W, i16 %U, <8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx256_round_mask:
; X64: # %bb.0:
; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
; X64-NEXT: vcvt2ps2phx {rz-sae}, %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x71,0x79,0x67,0xc2]
; X64-NEXT: retq # encoding: [0xc3]
;
-; X86-LABEL: test_int_x86_avx512_vcvt2ps2phx256_round_mask:
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx256_round_mask:
; X86: # %bb.0:
; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
; X86-NEXT: vcvt2ps2phx {rz-sae}, %ymm2, %ymm1, %ymm0 {%k1} # encoding: [0x62,0xf2,0x71,0x79,0x67,0xc2]
@@ -79,6 +111,22 @@ define <16 x half> @test_int_x86_avx512_vcvt2ps2phx256_round_mask(<16 x half> %W
ret <16 x half> %ret
}
+define <16 x half> @test_int_x86_avx10_vcvt2ps2phx256_round_maskz(i16 %U, <8 x float> %A, <8 x float> %B) {
+; X64-LABEL: test_int_x86_avx10_vcvt2ps2phx256_round_maskz:
+; X64: # %bb.0:
+; X64-NEXT: kmovd %edi, %k1 # encoding: [0xc5,0xfb,0x92,0xcf]
+; X64-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x79,0xf9,0x67,0xc1]
+; X64-NEXT: retq # encoding: [0xc3]
+;
+; X86-LABEL: test_int_x86_avx10_vcvt2ps2phx256_round_maskz:
+; X86: # %bb.0:
+; X86-NEXT: kmovw {{[0-9]+}}(%esp), %k1 # encoding: [0xc5,0xf8,0x90,0x4c,0x24,0x04]
+; X86-NEXT: vcvt2ps2phx {rz-sae}, %ymm1, %ymm0, %ymm0 {%k1} {z} # encoding: [0x62,0xf2,0x79,0xf9,0x67,0xc1]
+; X86-NEXT: retl # encoding: [0xc3]
+ %ret = call <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float> %A, <8 x float> %B, <16 x half> zeroinitializer, i16 %U, i32 11)
+ ret <16 x half> %ret
+}
+
declare <16 x half> @llvm.x86.avx10.mask.vcvt2ps2phx.256(<8 x float>, <8 x float>, <16 x half>, i16, i32)
define <16 x i8> @test_int_x86_avx10_vcvtbiasph2bf8128(<16 x i8> %A, <8 x half> %B) nounwind {
>From 514d080833d9b12074e5a3c98501c1c64e94d50d Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Fri, 16 Aug 2024 15:30:28 +0800
Subject: [PATCH 4/7] refactor multiclasses.
---
llvm/lib/Target/X86/X86InstrAVX10.td | 120 +++++++++++++++-----------
llvm/lib/Target/X86/X86InstrAVX512.td | 32 ++++---
2 files changed, 91 insertions(+), 61 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index 68c412530885e1..bcd77a66612474 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -895,41 +895,6 @@ multiclass avx10_convert_2op_packed<bits<8> OpCode, string OpcodeStr,
(vt_src.BroadcastLdFrag addr:$src)))),
vt_dst.ImmAllZerosV)>,
EVEX, EVEX_B, Sched<[sched]>;
-
- // Allow rr with the x, y suffix.
- def : InstAlias<OpcodeStr#Alias#
- "\t{$src, $dst|$dst, $src}",
- (!cast<Instruction>(NAME#"rr")
- vt_dst.RC:$dst, vt_src.RC:$src), 0, "att">;
- def : InstAlias<OpcodeStr#Alias#
- "\t{$src, $dst {${mask}}|$dst {${mask}}, $src}",
- (!cast<Instruction>(NAME#"rrk")
- vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.RC:$src),
- 0, "att">;
- def : InstAlias<OpcodeStr#Alias#
- "\t{$src, $dst {${mask}} {z}|$dst {${mask}} {z}, $src}",
- (!cast<Instruction>(NAME#"rrkz")
- vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.RC:$src),
- 0, "att">;
-
- // Allow rmb with the x, y suffix.
- def : InstAlias<OpcodeStr#Alias#
- "\t{${src}"#vt_src.BroadcastStr#", $dst|$dst, ${src}"#
- vt_src.BroadcastStr#"}",
- (!cast<Instruction>(NAME#"rmb")
- vt_dst.RC:$dst, vt_src.ScalarMemOp:$src), 0, "att">;
- def : InstAlias<OpcodeStr#Alias#
- "\t{${src}"#vt_src.BroadcastStr#", $dst {${mask}}|"
- "$dst {${mask}}, ${src}"#vt_src.BroadcastStr#"}",
- (!cast<Instruction>(NAME#"rmbk")
- vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.ScalarMemOp:$src),
- 0, "att">;
- def : InstAlias<OpcodeStr#Alias#
- "\t{${src}"#vt_src.BroadcastStr#", $dst {${mask}} {z}|"
- "$dst {${mask}} {z}, ${src}"#vt_src.BroadcastStr#"}",
- (!cast<Instruction>(NAME#"rmbkz")
- vt_dst.RC:$dst, vt_dst.KRCWM:$mask, vt_src.ScalarMemOp:$src),
- 0, "att">;
}
multiclass avx10_convert_2op<bits<8> OpCode, string OpcodeStr,
@@ -985,22 +950,81 @@ multiclass avx10_convert_2op<bits<8> OpCode, string OpcodeStr,
}
}
-defm VCVTNEPH2BF8 : avx10_convert_2op<0x74, "vcvtneph2bf8", avx512vl_i8_info,
+multiclass avx10_convert_2op_pat<AVX512VLVectorVTInfo vt_dst,
+ AVX512VLVectorVTInfo vt_src,
+ SDPatternOperator OpNode,
+ SDPatternOperator MaskOpNode,
+ PatFrag bcast128 = vt_src.info128.BroadcastLdFrag,
+ PatFrag loadVT128 = vt_src.info128.LdFrag,
+ RegisterClass maskRC128 = vt_src.info128.KRCWM> {
+ let Predicates = [HasAVX10_2] in {
+ // Special patterns to allow use of MaskOpNode for masking 128 version. Instruction
+ // patterns have been disabled with null_frag.
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT VR128X:$src))),
+ (!cast<Instruction>(NAME # "Z128rr") VR128X:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrk") VR128X:$src0, maskRC128:$mask, VR128X:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrkz") maskRC128:$mask, VR128X:$src)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (loadVT128 addr:$src))),
+ (!cast<Instruction>(NAME # "Z128rm") addr:$src)>;
+ def : Pat<(MaskOpNode (loadVT128 addr:$src), (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
+ def : Pat<(MaskOpNode (loadVT128 addr:$src), vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmkz") maskRC128:$mask, addr:$src)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT (bcast128 addr:$src)))),
+ (!cast<Instruction>(NAME # "Z128rmb") addr:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
+ (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
+ vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbkz") maskRC128:$mask, addr:$src)>;
+ }
+}
+
+// defm VCVTNEPH2BF8 : avx512_cvt_trunc<0x74, "vcvtneph2bf8",
+// avx512vl_i8_info, avx512vl_f16_info,
+// SchedWriteCvtPD2PS, [HasAVX10_2_512],
+// [HasAVX10_2_512]>, T8, XS, EVEX_CD8<16, CD8VF>;
+
+// defm VCVTNEPH2BF8 : avx10_convert_2op<0x74, "vcvtneph2bf8", avx512vl_i8_info,
+// avx512vl_f16_info, SchedWriteCvtPD2PS,
+// X86vcvtneph2bf8, X86vmcvtneph2bf8>,
+// T8, XS;
+defm VCVTNEPH2BF8 : avx512_cvtps2bf16<0x74, "vcvtneph2bf8", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2bf8, X86vmcvtneph2bf8>,
- T8, XS;
-defm VCVTNEPH2BF8S : avx10_convert_2op<0x74, "vcvtneph2bf8s", avx512vl_i8_info,
+ X86vcvtneph2bf8, [HasAVX10_2], [HasAVX10_2_512]>,
+ T8, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2BF8 : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
+ X86vcvtneph2bf8, X86vmcvtneph2bf8>;
+
+defm VCVTNEPH2BF8S : avx512_cvtps2bf16<0x74, "vcvtneph2bf8s", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2bf8s, X86vmcvtneph2bf8s>,
- T_MAP5, XS;
-defm VCVTNEPH2HF8 : avx10_convert_2op<0x18, "vcvtneph2hf8", avx512vl_i8_info,
+ X86vcvtneph2bf8s, [HasAVX10_2], [HasAVX10_2_512]>,
+ T_MAP5, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2BF8S : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
+ X86vcvtneph2bf8s, X86vmcvtneph2bf8s>;
+
+defm VCVTNEPH2HF8 : avx512_cvtps2bf16<0x18, "vcvtneph2hf8", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2hf8, X86vmcvtneph2hf8>,
- T_MAP5, XS;
-defm VCVTNEPH2HF8S : avx10_convert_2op<0x1b, "vcvtneph2hf8s", avx512vl_i8_info,
- avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2hf8s, X86vmcvtneph2hf8s>,
- T_MAP5, XS;
+ X86vcvtneph2hf8, [HasAVX10_2], [HasAVX10_2_512]>,
+ T_MAP5, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2HF8 : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
+ X86vcvtneph2hf8, X86vmcvtneph2hf8>;
+
+defm VCVTNEPH2HF8S : avx512_cvtps2bf16<0x1b, "vcvtneph2hf8s", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2hf8s, [HasAVX10_2], [HasAVX10_2_512]>,
+ T_MAP5, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2HF8S : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
+ X86vcvtneph2hf8s, X86vmcvtneph2hf8s>;
multiclass avx10_convert_2op_nomb_packed<bits<8> opc, string OpcodeStr,
X86VectorVTInfo _dest, X86VectorVTInfo _src,
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index db19a001bda1ee..964c678fb24d84 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -12702,20 +12702,24 @@ defm VCVTNE2PS2BF16 : avx512_binop_all2<0x72, "vcvtne2ps2bf16",
// Truncate Float to BFloat16
multiclass avx512_cvtps2bf16<bits<8> opc, string OpcodeStr,
- X86SchedWriteWidths sched> {
+ AVX512VLVectorVTInfo vt_dst,
+ AVX512VLVectorVTInfo vt_src,
+ X86SchedWriteWidths sched,
+ SDPatternOperator OpNode,
+ list<Predicate> prds, list<Predicate> prds512> {
let ExeDomain = SSEPackedSingle in {
- let Predicates = [HasBF16], Uses = []<Register>, mayRaiseFPException = 0 in {
- defm Z : avx512_vcvt_fp<opc, OpcodeStr, v16bf16x_info, v16f32_info,
- X86cvtneps2bf16, X86cvtneps2bf16, sched.ZMM>, EVEX_V512;
+ let Predicates = prds512, Uses = []<Register>, mayRaiseFPException = 0 in {
+ defm Z : avx512_vcvt_fp<opc, OpcodeStr, vt_dst.info256, vt_src.info512,
+ OpNode, OpNode, sched.ZMM>, EVEX_V512;
}
- let Predicates = [HasBF16, HasVLX] in {
+ let Predicates = prds in {
let Uses = []<Register>, mayRaiseFPException = 0 in {
- defm Z128 : avx512_vcvt_fp<opc, OpcodeStr, v8bf16x_info, v4f32x_info,
- null_frag, null_frag, sched.XMM, "{1to4}", "{x}", f128mem,
- VK4WM>, EVEX_V128;
- defm Z256 : avx512_vcvt_fp<opc, OpcodeStr, v8bf16x_info, v8f32x_info,
- X86cvtneps2bf16, X86cvtneps2bf16,
- sched.YMM, "{1to8}", "{y}">, EVEX_V256;
+ defm Z128 : avx512_vcvt_fp<opc, OpcodeStr, vt_dst.info128, vt_src.info128,
+ null_frag, null_frag, sched.XMM, vt_src.info128.BroadcastStr, "{x}", f128mem,
+ vt_src.info128.KRCWM>, EVEX_V128;
+ defm Z256 : avx512_vcvt_fp<opc, OpcodeStr, vt_dst.info128, vt_src.info256,
+ OpNode, OpNode,
+ sched.YMM, vt_src.info256.BroadcastStr, "{y}">, EVEX_V256;
}
} // Predicates = [HasBF16, HasVLX]
} // ExeDomain = SSEPackedSingle
@@ -12735,8 +12739,10 @@ multiclass avx512_cvtps2bf16<bits<8> opc, string OpcodeStr,
}
defm VCVTNEPS2BF16 : avx512_cvtps2bf16<0x72, "vcvtneps2bf16",
- SchedWriteCvtPD2PS>, T8, XS,
- EVEX_CD8<32, CD8VF>;
+ avx512vl_bf16_info, avx512vl_f32_info,
+ SchedWriteCvtPD2PS, X86cvtneps2bf16,
+ [HasBF16, HasVLX], [HasBF16]>,
+ T8, XS, EVEX_CD8<32, CD8VF>;
let Predicates = [HasBF16, HasVLX] in {
// Special patterns to allow use of X86mcvtneps2bf16 for masking. Instruction
>From 741c873d26e4011ac1e0c87f2c7364a5966ff52f Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Fri, 16 Aug 2024 15:55:49 +0800
Subject: [PATCH 5/7] [NFC][X86] Refactor: merge avx512_binop_all2 into
avx512_binop_all
---
llvm/lib/Target/X86/X86InstrAVX10.td | 16 ++++----
llvm/lib/Target/X86/X86InstrAVX512.td | 58 +++++++++------------------
2 files changed, 27 insertions(+), 47 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index bcd77a66612474..76cb7045aa6f11 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -678,21 +678,21 @@ defm VCVT2PS2PHX : avx10_cvt2ps2ph<0x67, "vcvt2ps2phx",
avx512vl_f32_info, avx512vl_f16_info,
X86vcvt2ps2phx, X86vcvt2ps2phxRnd>, T8;
-defm VCVTNE2PH2BF8 : avx512_binop_all2<0x74, "vcvtne2ph2bf8", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2BF8 : avx512_binop_all<0x74, "vcvtne2ph2bf8", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2bf8, [HasAVX10_2_512], [HasAVX10_2], 0>,
+ X86vcvtne2ph2bf8, [HasAVX10_2_512], [HasAVX10_2]>,
EVEX_CD8<16, CD8VF>, T8, XD;
-defm VCVTNE2PH2BF8S : avx512_binop_all2<0x74, "vcvtne2ph2bf8s", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2BF8S : avx512_binop_all<0x74, "vcvtne2ph2bf8s", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2bf8s, [HasAVX10_2_512], [HasAVX10_2], 0>,
+ X86vcvtne2ph2bf8s, [HasAVX10_2_512], [HasAVX10_2]>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
-defm VCVTNE2PH2HF8 : avx512_binop_all2<0x18, "vcvtne2ph2hf8", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2HF8 : avx512_binop_all<0x18, "vcvtne2ph2hf8", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2hf8, [HasAVX10_2_512], [HasAVX10_2], 0>,
+ X86vcvtne2ph2hf8, [HasAVX10_2_512], [HasAVX10_2]>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
-defm VCVTNE2PH2HF8S : avx512_binop_all2<0x1b, "vcvtne2ph2hf8s", SchedWriteCvtPD2PS,
+defm VCVTNE2PH2HF8S : avx512_binop_all<0x1b, "vcvtne2ph2hf8s", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
- X86vcvtne2ph2hf8s, [HasAVX10_2_512], [HasAVX10_2], 0>,
+ X86vcvtne2ph2hf8s, [HasAVX10_2_512], [HasAVX10_2]>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
multiclass avx10_convert_3op_packed<bits<8> OpCode, string OpcodeStr,
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 964c678fb24d84..95befbdb403fb7 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -4855,27 +4855,30 @@ multiclass avx512_binop_all<bits<8> opc, string OpcodeStr,
X86SchedWriteWidths sched,
AVX512VLVectorVTInfo _SrcVTInfo,
AVX512VLVectorVTInfo _DstVTInfo,
- SDNode OpNode, Predicate prd, bit IsCommutable = 0> {
- let Predicates = [prd] in
+ SDNode OpNode, list<Predicate> prds512,
+ list<Predicate> prds,
+ X86VectorVTInfo _VTInfo512 = _SrcVTInfo.info512,
+ X86VectorVTInfo _VTInfo256 = _SrcVTInfo.info256,
+ X86VectorVTInfo _VTInfo128 = _SrcVTInfo.info128> {
+ let Predicates = prds512 in
defm NAME#Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
_SrcVTInfo.info512, _DstVTInfo.info512,
- v8i64_info, IsCommutable>,
- EVEX_V512, EVEX_CD8<64, CD8VF>, REX_W;
- let Predicates = [HasVLX, prd] in {
+ _VTInfo512>, EVEX_V512;
+ let Predicates = prds in {
defm NAME#Z256 : avx512_binop_rm2<opc, OpcodeStr, sched.YMM, OpNode,
_SrcVTInfo.info256, _DstVTInfo.info256,
- v4i64x_info, IsCommutable>,
- EVEX_V256, EVEX_CD8<64, CD8VF>, REX_W;
+ _VTInfo256>, EVEX_V256;
defm NAME#Z128 : avx512_binop_rm2<opc, OpcodeStr, sched.XMM, OpNode,
_SrcVTInfo.info128, _DstVTInfo.info128,
- v2i64x_info, IsCommutable>,
- EVEX_V128, EVEX_CD8<64, CD8VF>, REX_W;
+ _VTInfo128>, EVEX_V128;
}
}
defm VPMULTISHIFTQB : avx512_binop_all<0x83, "vpmultishiftqb", SchedWriteVecALU,
- avx512vl_i8_info, avx512vl_i8_info,
- X86multishift, HasVBMI, 0>, T8;
+ avx512vl_i8_info, avx512vl_i8_info,
+ X86multishift, [HasVBMI], [HasVLX, HasVBMI],
+ v8i64_info, v4i64x_info, v2i64x_info>, T8,
+ EVEX_CD8<64, CD8VF>, REX_W;
multiclass avx512_packs_rmb<bits<8> opc, string OpcodeStr, SDNode OpNode,
X86VectorVTInfo _Src, X86VectorVTInfo _Dst,
@@ -12670,35 +12673,12 @@ defm VP2INTERSECTD : avx512_vp2intersect<SchedWriteVecALU, avx512vl_i32_info>;
defm VP2INTERSECTQ : avx512_vp2intersect<SchedWriteVecALU, avx512vl_i64_info>, REX_W;
}
-multiclass avx512_binop_all2<bits<8> opc, string OpcodeStr,
- X86SchedWriteWidths sched,
- AVX512VLVectorVTInfo _SrcVTInfo,
- AVX512VLVectorVTInfo _DstVTInfo,
- SDNode OpNode, list<Predicate> prds512,
- list<Predicate> prds, bit IsCommutable = 0> {
- let Predicates = prds512 in
- defm NAME#Z : avx512_binop_rm2<opc, OpcodeStr, sched.ZMM, OpNode,
- _SrcVTInfo.info512, _DstVTInfo.info512,
- _SrcVTInfo.info512, IsCommutable>,
- EVEX_V512;
- let Predicates = prds in {
- defm NAME#Z256 : avx512_binop_rm2<opc, OpcodeStr, sched.YMM, OpNode,
- _SrcVTInfo.info256, _DstVTInfo.info256,
- _SrcVTInfo.info256, IsCommutable>,
- EVEX_V256;
- defm NAME#Z128 : avx512_binop_rm2<opc, OpcodeStr, sched.XMM, OpNode,
- _SrcVTInfo.info128, _DstVTInfo.info128,
- _SrcVTInfo.info128, IsCommutable>,
- EVEX_V128;
- }
-}
-
let ExeDomain = SSEPackedSingle in
-defm VCVTNE2PS2BF16 : avx512_binop_all2<0x72, "vcvtne2ps2bf16",
- SchedWriteCvtPD2PS, //FIXME: Should be SchedWriteCvtPS2BF
- avx512vl_f32_info, avx512vl_bf16_info,
- X86cvtne2ps2bf16, [HasBF16], [HasVLX, HasBF16], 0>,
- EVEX_CD8<32, CD8VF>, T8, XD;
+defm VCVTNE2PS2BF16 : avx512_binop_all<0x72, "vcvtne2ps2bf16",
+ SchedWriteCvtPD2PS, //FIXME: Should be SchedWriteCvtPS2BF
+ avx512vl_f32_info, avx512vl_bf16_info,
+ X86cvtne2ps2bf16, [HasBF16], [HasVLX, HasBF16]>, T8, XD,
+ EVEX_CD8<32, CD8VF>;
// Truncate Float to BFloat16
multiclass avx512_cvtps2bf16<bits<8> opc, string OpcodeStr,
>From 58091e2228e1bcadcdc28ecf0d8acc2a59a7817b Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Fri, 16 Aug 2024 16:49:35 +0800
Subject: [PATCH 6/7] Cont. refactor multiclasses
---
llvm/lib/Target/X86/X86InstrAVX10.td | 163 ++++----------------------
llvm/lib/Target/X86/X86InstrAVX512.td | 14 +--
2 files changed, 32 insertions(+), 145 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index 76cb7045aa6f11..3c053261317297 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -641,6 +641,7 @@ multiclass avx10_cvt2ps2ph_rc<bits<8> opc, string OpcodeStr, X86FoldableSchedWri
EVEX, VVVV, EVEX_B, EVEX_RC, PD, Sched<[sched]>;
}
+//TODO: Merge into avx512_binop_all, difference is rounding control added here.
multiclass avx10_cvt2ps2ph<bits<8> opc, string OpcodeStr,
X86SchedWriteWidths sched,
AVX512VLVectorVTInfo _SrcVTInfo,
@@ -695,6 +696,7 @@ defm VCVTNE2PH2HF8S : avx512_binop_all<0x1b, "vcvtne2ph2hf8s", SchedWriteCvtPD2P
X86vcvtne2ph2hf8s, [HasAVX10_2_512], [HasAVX10_2]>,
EVEX_CD8<16, CD8VF>, T_MAP5, XD;
+//TODO: Merge into avx512_vcvt_fp, diffrence is one more source register here.
multiclass avx10_convert_3op_packed<bits<8> OpCode, string OpcodeStr,
X86VectorVTInfo vt_dst, X86VectorVTInfo vt_src1,
X86VectorVTInfo vt_src2, SDPatternOperator OpNode,
@@ -759,6 +761,7 @@ multiclass avx10_convert_3op_packed<bits<8> OpCode, string OpcodeStr,
EVEX, VVVV, EVEX_B, Sched<[sched]>;
}
+//TODO: Merge into avx512_cvt_trunc
multiclass avx10_convert_3op<bits<8> OpCode, string OpcodeStr,
AVX512VLVectorVTInfo vt_dst, AVX512VLVectorVTInfo vt_src,
X86SchedWriteWidths sched,
@@ -844,112 +847,6 @@ defm VCVTBIASPH2HF8S : avx10_convert_3op<0x1b, "vcvtbiasph2hf8s",
X86vcvtbiasph2hf8s, X86vmcvtbiasph2hf8s>,
T_MAP5, PS;
-multiclass avx10_convert_2op_packed<bits<8> OpCode, string OpcodeStr,
- X86VectorVTInfo vt_dst, X86VectorVTInfo vt_src, SDPatternOperator OpNode,
- SDPatternOperator MaskOpNode, X86FoldableSchedWrite sched,
- string Alias, string Broadcast = vt_src.BroadcastStr,
- X86MemOperand MemOp = vt_src.MemOp,
- RegisterClass MaskRC = vt_src.KRCWM,
- dag LdDAG = (vt_dst.VT (OpNode (vt_src.VT (vt_src.LdFrag addr:$src)))),
- dag MaskLdDAG = (vt_dst.VT (MaskOpNode (vt_src.VT (vt_src.LdFrag addr:$src))))> {
- defm rr : AVX512_maskable_cvt<OpCode, MRMSrcReg, vt_dst, (outs vt_dst.RC:$dst),
- (ins vt_src.RC:$src),
- (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src.RC:$src),
- (ins MaskRC:$mask, vt_src.RC:$src),
- OpcodeStr, "$src", "$src",
- (vt_dst.VT (OpNode (vt_src.VT vt_src.RC:$src))),
- (vselect_mask MaskRC:$mask,
- (vt_dst.VT (MaskOpNode (vt_src.VT vt_src.RC:$src))),
- vt_dst.RC:$src0),
- (vselect_mask MaskRC:$mask,
- (vt_dst.VT (MaskOpNode (vt_src.VT vt_src.RC:$src))),
- vt_dst.ImmAllZerosV)>, EVEX, Sched<[sched]>;
-
- defm rm : AVX512_maskable_cvt<OpCode, MRMSrcMem, vt_dst, (outs vt_dst.RC:$dst),
- (ins MemOp:$src),
- (ins vt_dst.RC:$src0, MaskRC:$mask, MemOp:$src),
- (ins MaskRC:$mask, MemOp:$src),
- OpcodeStr#Alias, "$src", "$src",
- LdDAG,
- (vselect_mask MaskRC:$mask, MaskLdDAG, vt_dst.RC:$src0),
- (vselect_mask MaskRC:$mask, MaskLdDAG, vt_dst.ImmAllZerosV)>,
- EVEX, Sched<[sched]>;
-
- defm rmb : AVX512_maskable_cvt<OpCode, MRMSrcMem, vt_dst, (outs vt_dst.RC:$dst),
- (ins vt_src.ScalarMemOp:$src),
- (ins vt_dst.RC:$src0, MaskRC:$mask, vt_src.ScalarMemOp:$src),
- (ins MaskRC:$mask, vt_src.ScalarMemOp:$src), OpcodeStr,
- "${src}"#Broadcast, "${src}"#Broadcast,
- (vt_dst.VT (OpNode (vt_src.VT
- (vt_src.BroadcastLdFrag addr:$src)))),
- (vselect_mask MaskRC:$mask,
- (vt_dst.VT
- (MaskOpNode
- (vt_src.VT
- (vt_src.BroadcastLdFrag addr:$src)))),
- vt_dst.RC:$src0),
- (vselect_mask MaskRC:$mask,
- (vt_dst.VT
- (MaskOpNode
- (vt_src.VT
- (vt_src.BroadcastLdFrag addr:$src)))),
- vt_dst.ImmAllZerosV)>,
- EVEX, EVEX_B, Sched<[sched]>;
-}
-
-multiclass avx10_convert_2op<bits<8> OpCode, string OpcodeStr,
- AVX512VLVectorVTInfo vt_dst, AVX512VLVectorVTInfo vt_src,
- X86SchedWriteWidths sched,
- SDPatternOperator OpNode,
- SDPatternOperator MaskOpNode,
- PatFrag bcast128 = vt_src.info128.BroadcastLdFrag,
- PatFrag loadVT128 = vt_src.info128.LdFrag,
- RegisterClass maskRC128 = vt_src.info128.KRCWM> {
- let Predicates = [HasAVX10_2_512] in
- defm Z : avx10_convert_2op_packed<OpCode, OpcodeStr, vt_dst.info256,
- vt_src.info512, OpNode, OpNode, sched.ZMM,
- "">,
- EVEX_V512, EVEX_CD8<16, CD8VF>;
- let Predicates = [HasAVX10_2] in {
- defm Z256 : avx10_convert_2op_packed<OpCode, OpcodeStr, vt_dst.info128,
- vt_src.info256, OpNode, OpNode,
- sched.YMM, "{y}">,
- EVEX_V256, EVEX_CD8<16, CD8VF>;
- defm Z128 : avx10_convert_2op_packed<OpCode, OpcodeStr, vt_dst.info128,
- vt_src.info128, null_frag, null_frag,
- sched.XMM, "{x}">,
- EVEX_V128, EVEX_CD8<16, CD8VF>;
- // Special patterns to allow use of MaskOpNode for masking 128 version. Instruction
- // patterns have been disabled with null_frag.
- def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT VR128X:$src))),
- (!cast<Instruction>(NAME # "Z128rr") VR128X:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), (vt_dst.info128.VT VR128X:$src0),
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rrk") VR128X:$src0, maskRC128:$mask, VR128X:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), vt_dst.info128.ImmAllZerosV,
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rrkz") maskRC128:$mask, VR128X:$src)>;
-
- def : Pat<(vt_dst.info128.VT (OpNode (loadVT128 addr:$src))),
- (!cast<Instruction>(NAME # "Z128rm") addr:$src)>;
- def : Pat<(MaskOpNode (loadVT128 addr:$src), (vt_dst.info128.VT VR128X:$src0),
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
- def : Pat<(MaskOpNode (loadVT128 addr:$src), vt_dst.info128.ImmAllZerosV,
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmkz") maskRC128:$mask, addr:$src)>;
-
- def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT (bcast128 addr:$src)))),
- (!cast<Instruction>(NAME # "Z128rmb") addr:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
- (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmbk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
- vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmbkz") maskRC128:$mask, addr:$src)>;
- }
-}
-
multiclass avx10_convert_2op_pat<AVX512VLVectorVTInfo vt_dst,
AVX512VLVectorVTInfo vt_src,
SDPatternOperator OpNode,
@@ -989,49 +886,39 @@ multiclass avx10_convert_2op_pat<AVX512VLVectorVTInfo vt_dst,
}
}
-// defm VCVTNEPH2BF8 : avx512_cvt_trunc<0x74, "vcvtneph2bf8",
-// avx512vl_i8_info, avx512vl_f16_info,
-// SchedWriteCvtPD2PS, [HasAVX10_2_512],
-// [HasAVX10_2_512]>, T8, XS, EVEX_CD8<16, CD8VF>;
-
-// defm VCVTNEPH2BF8 : avx10_convert_2op<0x74, "vcvtneph2bf8", avx512vl_i8_info,
-// avx512vl_f16_info, SchedWriteCvtPD2PS,
-// X86vcvtneph2bf8, X86vmcvtneph2bf8>,
-// T8, XS;
-defm VCVTNEPH2BF8 : avx512_cvtps2bf16<0x74, "vcvtneph2bf8", avx512vl_i8_info,
- avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2bf8, [HasAVX10_2], [HasAVX10_2_512]>,
- T8, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2BF8 : avx512_cvt_trunc_ne<0x74, "vcvtneph2bf8", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2bf8, [HasAVX10_2], [HasAVX10_2_512]>,
+ T8, XS, EVEX_CD8<16, CD8VF>;
defm VCVTNEPH2BF8 : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
X86vcvtneph2bf8, X86vmcvtneph2bf8>;
-defm VCVTNEPH2BF8S : avx512_cvtps2bf16<0x74, "vcvtneph2bf8s", avx512vl_i8_info,
- avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2bf8s, [HasAVX10_2], [HasAVX10_2_512]>,
- T_MAP5, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2BF8S : avx512_cvt_trunc_ne<0x74, "vcvtneph2bf8s", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2bf8s, [HasAVX10_2], [HasAVX10_2_512]>,
+ T_MAP5, XS, EVEX_CD8<16, CD8VF>;
defm VCVTNEPH2BF8S : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
X86vcvtneph2bf8s, X86vmcvtneph2bf8s>;
-defm VCVTNEPH2HF8 : avx512_cvtps2bf16<0x18, "vcvtneph2hf8", avx512vl_i8_info,
- avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2hf8, [HasAVX10_2], [HasAVX10_2_512]>,
- T_MAP5, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2HF8 : avx512_cvt_trunc_ne<0x18, "vcvtneph2hf8", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2hf8, [HasAVX10_2], [HasAVX10_2_512]>,
+ T_MAP5, XS, EVEX_CD8<16, CD8VF>;
defm VCVTNEPH2HF8 : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
X86vcvtneph2hf8, X86vmcvtneph2hf8>;
-defm VCVTNEPH2HF8S : avx512_cvtps2bf16<0x1b, "vcvtneph2hf8s", avx512vl_i8_info,
- avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2hf8s, [HasAVX10_2], [HasAVX10_2_512]>,
- T_MAP5, XS, EVEX_CD8<16, CD8VF>;
+defm VCVTNEPH2HF8S : avx512_cvt_trunc_ne<0x1b, "vcvtneph2hf8s", avx512vl_i8_info,
+ avx512vl_f16_info, SchedWriteCvtPD2PS,
+ X86vcvtneph2hf8s, [HasAVX10_2], [HasAVX10_2_512]>,
+ T_MAP5, XS, EVEX_CD8<16, CD8VF>;
defm VCVTNEPH2HF8S : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
- X86vcvtneph2hf8s, X86vmcvtneph2hf8s>;
+ X86vcvtneph2hf8s, X86vmcvtneph2hf8s>;
multiclass avx10_convert_2op_nomb_packed<bits<8> opc, string OpcodeStr,
- X86VectorVTInfo _dest, X86VectorVTInfo _src,
- SDNode OpNode,
- X86MemOperand x86memop,
- X86FoldableSchedWrite sched,
- dag ld_dag = (load addr:$src)> {
+ X86VectorVTInfo _dest, X86VectorVTInfo _src,
+ SDNode OpNode, X86MemOperand x86memop,
+ X86FoldableSchedWrite sched,
+ dag ld_dag = (load addr:$src)> {
let ExeDomain = _dest.ExeDomain in {
defm rr : AVX512_maskable_split<opc, MRMSrcReg, _dest ,(outs _dest.RC:$dst),
(ins _src.RC:$src), OpcodeStr, "$src", "$src",
@@ -1047,7 +934,7 @@ multiclass avx10_convert_2op_nomb_packed<bits<8> opc, string OpcodeStr,
}
multiclass avx10_convert_2op_nomb<string OpcodeStr, AVX512VLVectorVTInfo _dest,
- AVX512VLVectorVTInfo _src, bits<8> opc, SDNode OpNode> {
+ AVX512VLVectorVTInfo _src, bits<8> opc, SDNode OpNode> {
let Predicates = [HasAVX10_2_512] in
defm Z : avx10_convert_2op_nomb_packed<opc, OpcodeStr, _dest.info512, _src.info256,
OpNode, f256mem, WriteCvtPH2PSZ>, EVEX_V512;
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 95befbdb403fb7..2bcfee9f216133 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -12680,8 +12680,8 @@ defm VCVTNE2PS2BF16 : avx512_binop_all<0x72, "vcvtne2ps2bf16",
X86cvtne2ps2bf16, [HasBF16], [HasVLX, HasBF16]>, T8, XD,
EVEX_CD8<32, CD8VF>;
-// Truncate Float to BFloat16
-multiclass avx512_cvtps2bf16<bits<8> opc, string OpcodeStr,
+// Truncate Float to BFloat16, Float16 to BF8/HF8[,S]
+multiclass avx512_cvt_trunc_ne<bits<8> opc, string OpcodeStr,
AVX512VLVectorVTInfo vt_dst,
AVX512VLVectorVTInfo vt_src,
X86SchedWriteWidths sched,
@@ -12718,11 +12718,11 @@ multiclass avx512_cvtps2bf16<bits<8> opc, string OpcodeStr,
f256mem:$src), 0, "intel">;
}
-defm VCVTNEPS2BF16 : avx512_cvtps2bf16<0x72, "vcvtneps2bf16",
- avx512vl_bf16_info, avx512vl_f32_info,
- SchedWriteCvtPD2PS, X86cvtneps2bf16,
- [HasBF16, HasVLX], [HasBF16]>,
- T8, XS, EVEX_CD8<32, CD8VF>;
+defm VCVTNEPS2BF16 : avx512_cvt_trunc_ne<0x72, "vcvtneps2bf16",
+ avx512vl_bf16_info, avx512vl_f32_info,
+ SchedWriteCvtPD2PS, X86cvtneps2bf16,
+ [HasBF16, HasVLX], [HasBF16]>,
+ T8, XS, EVEX_CD8<32, CD8VF>;
let Predicates = [HasBF16, HasVLX] in {
// Special patterns to allow use of X86mcvtneps2bf16 for masking. Instruction
>From 4a5a2077bf72fe6d13dbf3bf4226817db7aa808a Mon Sep 17 00:00:00 2001
From: Freddy Ye <freddy.ye at intel.com>
Date: Mon, 19 Aug 2024 09:53:46 +0800
Subject: [PATCH 7/7] address comments.
---
llvm/include/llvm/IR/IntrinsicsX86.td | 84 +++++++++---------
llvm/lib/Target/X86/X86ISelLowering.cpp | 5 +-
llvm/lib/Target/X86/X86ISelLowering.h | 7 +-
llvm/lib/Target/X86/X86InstrAVX10.td | 89 ++++++--------------
llvm/lib/Target/X86/X86InstrAVX512.td | 75 +++++++++--------
llvm/lib/Target/X86/X86InstrFragmentsSIMD.td | 49 +++++------
llvm/lib/Target/X86/X86IntrinsicsInfo.h | 12 +--
llvm/lib/TargetParser/X86TargetParser.cpp | 2 +-
8 files changed, 141 insertions(+), 182 deletions(-)
diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td
index 577d4fb507c647..8d000ed1e4f859 100644
--- a/llvm/include/llvm/IR/IntrinsicsX86.td
+++ b/llvm/include/llvm/IR/IntrinsicsX86.td
@@ -7094,128 +7094,128 @@ def int_x86_avx10_mask_vcvttps2iubs512 : ClangBuiltin<"__builtin_ia32_vcvttps2iu
let TargetPrefix = "x86" in {
def int_x86_avx10_mask_vcvt2ps2phx_128 : ClangBuiltin<"__builtin_ia32_vcvt2ps2phx128_mask">,
DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v4f32_ty, llvm_v4f32_ty, llvm_v8f16_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvt2ps2phx_256 : ClangBuiltin<"__builtin_ia32_vcvt2ps2phx256_mask">,
DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v8f32_ty, llvm_v8f32_ty, llvm_v16f16_ty, llvm_i16_ty, llvm_i32_ty],
- [IntrNoMem, ImmArg<ArgIndex<4>>]>;
+ [IntrNoMem, ImmArg<ArgIndex<4>>]>;
def int_x86_avx10_mask_vcvt2ps2phx_512 : ClangBuiltin<"__builtin_ia32_vcvt2ps2phx512_mask">,
DefaultAttrsIntrinsic<[llvm_v32f16_ty], [llvm_v16f32_ty, llvm_v16f32_ty, llvm_v32f16_ty, llvm_i32_ty, llvm_i32_ty],
- [IntrNoMem, ImmArg<ArgIndex<4>>]>;
+ [IntrNoMem, ImmArg<ArgIndex<4>>]>;
def int_x86_avx10_mask_vcvtbiasph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2bf8256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2bf8512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2bf8s128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8s_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2bf8s256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8s_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2bf8s512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2bf8s_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2hf8128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2hf8256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2hf8512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2hf8s128 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8s_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8s_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v32i8_ty, llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtbiasph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtbiasph2hf8s_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v64i8_ty, llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8_128">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2bf8256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8_256">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2bf8512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8_512">,
DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2bf8s128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8s_128">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2bf8s256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8s_256">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2bf8s512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2bf8s_512">,
DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2hf8128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8_128">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2hf8256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8_256">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2hf8512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8_512">,
DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2hf8s128 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_128">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v8f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_256">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v16f16_ty, llvm_v16f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_vcvtne2ph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtne2ph2hf8s_512">,
DefaultAttrsIntrinsic<[llvm_v64i8_ty], [llvm_v32f16_ty, llvm_v32f16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvthf82ph128 : ClangBuiltin<"__builtin_ia32_vcvthf8_2ph128_mask">,
DefaultAttrsIntrinsic<[llvm_v8f16_ty], [llvm_v16i8_ty, llvm_v8f16_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvthf82ph256 : ClangBuiltin<"__builtin_ia32_vcvthf8_2ph256_mask">,
DefaultAttrsIntrinsic<[llvm_v16f16_ty], [llvm_v16i8_ty, llvm_v16f16_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvthf82ph512 : ClangBuiltin<"__builtin_ia32_vcvthf8_2ph512_mask">,
DefaultAttrsIntrinsic<[llvm_v32f16_ty], [llvm_v32i8_ty, llvm_v32f16_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8128 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8256 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8512 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8s128 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8s_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8s256 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8s_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2bf8s512 : ClangBuiltin<"__builtin_ia32_vcvtneph2bf8s_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2hf8128 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2hf8256 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2hf8512 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2hf8s128 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8s_128_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v8f16_ty, llvm_v16i8_ty, llvm_i8_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2hf8s256 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8s_256_mask">,
DefaultAttrsIntrinsic<[llvm_v16i8_ty], [llvm_v16f16_ty, llvm_v16i8_ty, llvm_i16_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
def int_x86_avx10_mask_vcvtneph2hf8s512 : ClangBuiltin<"__builtin_ia32_vcvtneph2hf8s_512_mask">,
DefaultAttrsIntrinsic<[llvm_v32i8_ty], [llvm_v32f16_ty, llvm_v32i8_ty, llvm_i32_ty],
- [IntrNoMem]>;
+ [IntrNoMem]>;
}
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9840182e5966ee..43991709f0db10 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -33807,6 +33807,8 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(VFPEXTS)
NODE_NAME_CASE(VFPEXTS_SAE)
NODE_NAME_CASE(VFPROUND)
+ NODE_NAME_CASE(VFPROUND2)
+ NODE_NAME_CASE(VFPROUND2_RND)
NODE_NAME_CASE(STRICT_VFPROUND)
NODE_NAME_CASE(VMFPROUND)
NODE_NAME_CASE(VFPROUND_RND)
@@ -34043,7 +34045,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(CVTS2UI)
NODE_NAME_CASE(CVTS2SI_RND)
NODE_NAME_CASE(CVTS2UI_RND)
- NODE_NAME_CASE(CVTNE2PS2BF16)
NODE_NAME_CASE(CVTNEPS2BF16)
NODE_NAME_CASE(MCVTNEPS2BF16)
NODE_NAME_CASE(DPBF16PS)
@@ -34112,8 +34113,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(VMCVTNEPH2HF8)
NODE_NAME_CASE(VMCVTNEPH2HF8S)
NODE_NAME_CASE(VCVTHF82PH)
- NODE_NAME_CASE(VCVT2PS2PHX)
- NODE_NAME_CASE(VCVT2PS2PHX_RND)
NODE_NAME_CASE(AESENC128KL)
NODE_NAME_CASE(AESDEC128KL)
NODE_NAME_CASE(AESENC256KL)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index aaf8f12f7cd275..93d2b3e65742b2 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -340,6 +340,9 @@ namespace llvm {
// Vector FP round.
VFPROUND,
+ // Convert TWO packed single data to one packed data
+ VFPROUND2,
+ VFPROUND2_RND,
VFPROUND_RND,
VFPROUNDS,
VFPROUNDS_RND,
@@ -618,8 +621,6 @@ namespace llvm {
MPSADBW,
- VCVT2PS2PHX,
- VCVT2PS2PHX_RND,
VCVTNE2PH2BF8,
VCVTNE2PH2BF8S,
VCVTNE2PH2HF8,
@@ -693,8 +694,6 @@ namespace llvm {
MCVTUI2P,
// Vector float to bfloat16.
- // Convert TWO packed single data to one packed BF16 data
- CVTNE2PS2BF16,
// Convert packed single data to packed BF16 data
CVTNEPS2BF16,
// Masked version of above.
diff --git a/llvm/lib/Target/X86/X86InstrAVX10.td b/llvm/lib/Target/X86/X86InstrAVX10.td
index 3c053261317297..a518347cfcd82e 100644
--- a/llvm/lib/Target/X86/X86InstrAVX10.td
+++ b/llvm/lib/Target/X86/X86InstrAVX10.td
@@ -677,7 +677,7 @@ multiclass avx10_cvt2ps2ph<bits<8> opc, string OpcodeStr,
defm VCVT2PS2PHX : avx10_cvt2ps2ph<0x67, "vcvt2ps2phx",
SchedWriteCvtPD2PS,
avx512vl_f32_info, avx512vl_f16_info,
- X86vcvt2ps2phx, X86vcvt2ps2phxRnd>, T8;
+ X86vfpround2, X86vfpround2Rnd>, T8;
defm VCVTNE2PH2BF8 : avx512_binop_all<0x74, "vcvtne2ph2bf8", SchedWriteCvtPD2PS,
avx512vl_f16_info, avx512vl_i8_info,
@@ -831,88 +831,49 @@ multiclass avx10_convert_3op<bits<8> OpCode, string OpcodeStr,
}
defm VCVTBIASPH2BF8 : avx10_convert_3op<0x74, "vcvtbiasph2bf8",
- avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtbiasph2bf8, X86vmcvtbiasph2bf8>,
- T8, PS;
+ avx512vl_i8_info, avx512vl_f16_info,
+ SchedWriteCvtPD2PS,
+ X86vcvtbiasph2bf8, X86vmcvtbiasph2bf8>,
+ T8, PS;
defm VCVTBIASPH2BF8S : avx10_convert_3op<0x74, "vcvtbiasph2bf8s",
- avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtbiasph2bf8s, X86vmcvtbiasph2bf8s>,
- T_MAP5, PS;
+ avx512vl_i8_info, avx512vl_f16_info,
+ SchedWriteCvtPD2PS,
+ X86vcvtbiasph2bf8s, X86vmcvtbiasph2bf8s>,
+ T_MAP5, PS;
defm VCVTBIASPH2HF8 : avx10_convert_3op<0x18, "vcvtbiasph2hf8",
- avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtbiasph2hf8, X86vmcvtbiasph2hf8>,
- T_MAP5, PS;
+ avx512vl_i8_info, avx512vl_f16_info,
+ SchedWriteCvtPD2PS,
+ X86vcvtbiasph2hf8, X86vmcvtbiasph2hf8>,
+ T_MAP5, PS;
defm VCVTBIASPH2HF8S : avx10_convert_3op<0x1b, "vcvtbiasph2hf8s",
- avx512vl_i8_info, avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtbiasph2hf8s, X86vmcvtbiasph2hf8s>,
- T_MAP5, PS;
-
-multiclass avx10_convert_2op_pat<AVX512VLVectorVTInfo vt_dst,
- AVX512VLVectorVTInfo vt_src,
- SDPatternOperator OpNode,
- SDPatternOperator MaskOpNode,
- PatFrag bcast128 = vt_src.info128.BroadcastLdFrag,
- PatFrag loadVT128 = vt_src.info128.LdFrag,
- RegisterClass maskRC128 = vt_src.info128.KRCWM> {
- let Predicates = [HasAVX10_2] in {
- // Special patterns to allow use of MaskOpNode for masking 128 version. Instruction
- // patterns have been disabled with null_frag.
- def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT VR128X:$src))),
- (!cast<Instruction>(NAME # "Z128rr") VR128X:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), (vt_dst.info128.VT VR128X:$src0),
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rrk") VR128X:$src0, maskRC128:$mask, VR128X:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), vt_dst.info128.ImmAllZerosV,
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rrkz") maskRC128:$mask, VR128X:$src)>;
-
- def : Pat<(vt_dst.info128.VT (OpNode (loadVT128 addr:$src))),
- (!cast<Instruction>(NAME # "Z128rm") addr:$src)>;
- def : Pat<(MaskOpNode (loadVT128 addr:$src), (vt_dst.info128.VT VR128X:$src0),
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
- def : Pat<(MaskOpNode (loadVT128 addr:$src), vt_dst.info128.ImmAllZerosV,
- maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmkz") maskRC128:$mask, addr:$src)>;
-
- def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT (bcast128 addr:$src)))),
- (!cast<Instruction>(NAME # "Z128rmb") addr:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
- (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmbk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
- def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
- vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
- (!cast<Instruction>(NAME # "Z128rmbkz") maskRC128:$mask, addr:$src)>;
- }
-}
+ avx512vl_i8_info, avx512vl_f16_info,
+ SchedWriteCvtPD2PS,
+ X86vcvtbiasph2hf8s, X86vmcvtbiasph2hf8s>,
+ T_MAP5, PS;
defm VCVTNEPH2BF8 : avx512_cvt_trunc_ne<0x74, "vcvtneph2bf8", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2bf8, [HasAVX10_2], [HasAVX10_2_512]>,
+ X86vcvtneph2bf8, X86vmcvtneph2bf8,
+ [HasAVX10_2], [HasAVX10_2_512]>,
T8, XS, EVEX_CD8<16, CD8VF>;
-defm VCVTNEPH2BF8 : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
- X86vcvtneph2bf8, X86vmcvtneph2bf8>;
defm VCVTNEPH2BF8S : avx512_cvt_trunc_ne<0x74, "vcvtneph2bf8s", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2bf8s, [HasAVX10_2], [HasAVX10_2_512]>,
+ X86vcvtneph2bf8s, X86vmcvtneph2bf8s,
+ [HasAVX10_2], [HasAVX10_2_512]>,
T_MAP5, XS, EVEX_CD8<16, CD8VF>;
-defm VCVTNEPH2BF8S : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
- X86vcvtneph2bf8s, X86vmcvtneph2bf8s>;
defm VCVTNEPH2HF8 : avx512_cvt_trunc_ne<0x18, "vcvtneph2hf8", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2hf8, [HasAVX10_2], [HasAVX10_2_512]>,
+ X86vcvtneph2hf8, X86vmcvtneph2hf8,
+ [HasAVX10_2], [HasAVX10_2_512]>,
T_MAP5, XS, EVEX_CD8<16, CD8VF>;
-defm VCVTNEPH2HF8 : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
- X86vcvtneph2hf8, X86vmcvtneph2hf8>;
defm VCVTNEPH2HF8S : avx512_cvt_trunc_ne<0x1b, "vcvtneph2hf8s", avx512vl_i8_info,
avx512vl_f16_info, SchedWriteCvtPD2PS,
- X86vcvtneph2hf8s, [HasAVX10_2], [HasAVX10_2_512]>,
+ X86vcvtneph2hf8s, X86vmcvtneph2hf8s,
+ [HasAVX10_2], [HasAVX10_2_512]>,
T_MAP5, XS, EVEX_CD8<16, CD8VF>;
-defm VCVTNEPH2HF8S : avx10_convert_2op_pat<avx512vl_i8_info, avx512vl_f16_info,
- X86vcvtneph2hf8s, X86vmcvtneph2hf8s>;
multiclass avx10_convert_2op_nomb_packed<bits<8> opc, string OpcodeStr,
X86VectorVTInfo _dest, X86VectorVTInfo _src,
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index 2bcfee9f216133..88d1eb59862433 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -12677,7 +12677,7 @@ let ExeDomain = SSEPackedSingle in
defm VCVTNE2PS2BF16 : avx512_binop_all<0x72, "vcvtne2ps2bf16",
SchedWriteCvtPD2PS, //FIXME: Should be SchedWriteCvtPS2BF
avx512vl_f32_info, avx512vl_bf16_info,
- X86cvtne2ps2bf16, [HasBF16], [HasVLX, HasBF16]>, T8, XD,
+ X86vfpround2, [HasBF16], [HasVLX, HasBF16]>, T8, XD,
EVEX_CD8<32, CD8VF>;
// Truncate Float to BFloat16, Float16 to BF8/HF8[,S]
@@ -12686,7 +12686,11 @@ multiclass avx512_cvt_trunc_ne<bits<8> opc, string OpcodeStr,
AVX512VLVectorVTInfo vt_src,
X86SchedWriteWidths sched,
SDPatternOperator OpNode,
- list<Predicate> prds, list<Predicate> prds512> {
+ SDPatternOperator MaskOpNode,
+ list<Predicate> prds, list<Predicate> prds512,
+ PatFrag bcast128 = vt_src.info128.BroadcastLdFrag,
+ PatFrag loadVT128 = vt_src.info128.LdFrag,
+ RegisterClass maskRC128 = vt_src.info128.KRCWM> {
let ExeDomain = SSEPackedSingle in {
let Predicates = prds512, Uses = []<Register>, mayRaiseFPException = 0 in {
defm Z : avx512_vcvt_fp<opc, OpcodeStr, vt_dst.info256, vt_src.info512,
@@ -12701,7 +12705,7 @@ multiclass avx512_cvt_trunc_ne<bits<8> opc, string OpcodeStr,
OpNode, OpNode,
sched.YMM, vt_src.info256.BroadcastStr, "{y}">, EVEX_V256;
}
- } // Predicates = [HasBF16, HasVLX]
+ } // Predicates = prds
} // ExeDomain = SSEPackedSingle
def : InstAlias<OpcodeStr#"x\t{$src, $dst|$dst, $src}",
@@ -12716,45 +12720,46 @@ multiclass avx512_cvt_trunc_ne<bits<8> opc, string OpcodeStr,
def : InstAlias<OpcodeStr#"y\t{$src, $dst|$dst, $src}",
(!cast<Instruction>(NAME # "Z256rm") VR128X:$dst,
f256mem:$src), 0, "intel">;
+
+ let Predicates = prds in {
+ // Special patterns to allow use of MaskOpNode for masking 128 version. Instruction
+ // patterns have been disabled with null_frag.
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT VR128X:$src))),
+ (!cast<Instruction>(NAME # "Z128rr") VR128X:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrk") VR128X:$src0, maskRC128:$mask, VR128X:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT VR128X:$src), vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rrkz") maskRC128:$mask, VR128X:$src)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (loadVT128 addr:$src))),
+ (!cast<Instruction>(NAME # "Z128rm") addr:$src)>;
+ def : Pat<(MaskOpNode (loadVT128 addr:$src), (vt_dst.info128.VT VR128X:$src0),
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
+ def : Pat<(MaskOpNode (loadVT128 addr:$src), vt_dst.info128.ImmAllZerosV,
+ maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmkz") maskRC128:$mask, addr:$src)>;
+
+ def : Pat<(vt_dst.info128.VT (OpNode (vt_src.info128.VT (bcast128 addr:$src)))),
+ (!cast<Instruction>(NAME # "Z128rmb") addr:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
+ (vt_dst.info128.VT VR128X:$src0), maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbk") VR128X:$src0, maskRC128:$mask, addr:$src)>;
+ def : Pat<(MaskOpNode (vt_src.info128.VT (bcast128 addr:$src)),
+ vt_dst.info128.ImmAllZerosV, maskRC128:$mask),
+ (!cast<Instruction>(NAME # "Z128rmbkz") maskRC128:$mask, addr:$src)>;
+ }
}
defm VCVTNEPS2BF16 : avx512_cvt_trunc_ne<0x72, "vcvtneps2bf16",
avx512vl_bf16_info, avx512vl_f32_info,
SchedWriteCvtPD2PS, X86cvtneps2bf16,
- [HasBF16, HasVLX], [HasBF16]>,
- T8, XS, EVEX_CD8<32, CD8VF>;
+ X86mcvtneps2bf16, [HasBF16, HasVLX],
+ [HasBF16]>, T8, XS, EVEX_CD8<32, CD8VF>;
let Predicates = [HasBF16, HasVLX] in {
- // Special patterns to allow use of X86mcvtneps2bf16 for masking. Instruction
- // patterns have been disabled with null_frag.
- def : Pat<(v8bf16 (X86cvtneps2bf16 (v4f32 VR128X:$src))),
- (VCVTNEPS2BF16Z128rr VR128X:$src)>;
- def : Pat<(X86mcvtneps2bf16 (v4f32 VR128X:$src), (v8bf16 VR128X:$src0),
- VK4WM:$mask),
- (VCVTNEPS2BF16Z128rrk VR128X:$src0, VK4WM:$mask, VR128X:$src)>;
- def : Pat<(X86mcvtneps2bf16 (v4f32 VR128X:$src), v8bf16x_info.ImmAllZerosV,
- VK4WM:$mask),
- (VCVTNEPS2BF16Z128rrkz VK4WM:$mask, VR128X:$src)>;
-
- def : Pat<(v8bf16 (X86cvtneps2bf16 (loadv4f32 addr:$src))),
- (VCVTNEPS2BF16Z128rm addr:$src)>;
- def : Pat<(X86mcvtneps2bf16 (loadv4f32 addr:$src), (v8bf16 VR128X:$src0),
- VK4WM:$mask),
- (VCVTNEPS2BF16Z128rmk VR128X:$src0, VK4WM:$mask, addr:$src)>;
- def : Pat<(X86mcvtneps2bf16 (loadv4f32 addr:$src), v8bf16x_info.ImmAllZerosV,
- VK4WM:$mask),
- (VCVTNEPS2BF16Z128rmkz VK4WM:$mask, addr:$src)>;
-
- def : Pat<(v8bf16 (X86cvtneps2bf16 (v4f32
- (X86VBroadcastld32 addr:$src)))),
- (VCVTNEPS2BF16Z128rmb addr:$src)>;
- def : Pat<(X86mcvtneps2bf16 (v4f32 (X86VBroadcastld32 addr:$src)),
- (v8bf16 VR128X:$src0), VK4WM:$mask),
- (VCVTNEPS2BF16Z128rmbk VR128X:$src0, VK4WM:$mask, addr:$src)>;
- def : Pat<(X86mcvtneps2bf16 (v4f32 (X86VBroadcastld32 addr:$src)),
- v8bf16x_info.ImmAllZerosV, VK4WM:$mask),
- (VCVTNEPS2BF16Z128rmbkz VK4WM:$mask, addr:$src)>;
-
def : Pat<(v8bf16 (int_x86_vcvtneps2bf16128 (v4f32 VR128X:$src))),
(VCVTNEPS2BF16Z128rr VR128X:$src)>;
def : Pat<(v8bf16 (int_x86_vcvtneps2bf16128 (loadv4f32 addr:$src))),
diff --git a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
index 308a69f7957cd5..e81f2a2fbb9512 100644
--- a/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
+++ b/llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
@@ -146,6 +146,11 @@ def X86vfpround: SDNode<"X86ISD::VFPROUND",
SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,
SDTCisFP<1>, SDTCisVec<1>,
SDTCisOpSmallerThanOp<0, 1>]>>;
+def X86vfpround2 : SDNode<"X86ISD::VFPROUND2",
+ SDTypeProfile<1, 2, [SDTCisFP<0>, SDTCisVec<0>,
+ SDTCisFP<1>, SDTCisVec<1>,
+ SDTCisSameAs<1, 2>,
+ SDTCisOpSmallerThanOp<0, 1>]>>;
def X86strict_vfpround: SDNode<"X86ISD::STRICT_VFPROUND",
SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVec<0>,
@@ -783,11 +788,6 @@ def X86vminmaxsSae : SDNode<"X86ISD::VMINMAXS_SAE", SDTypeProfile<1, 3, [SDTCisS
SDTCisSameAs<0,2>, SDTCisInt<3>]>>;
// cvt fp to bfloat16
-def X86cvtne2ps2bf16 : SDNode<"X86ISD::CVTNE2PS2BF16",
- SDTypeProfile<1, 2, [SDTCVecEltisVT<0, bf16>,
- SDTCVecEltisVT<1, f32>,
- SDTCisSameSizeAs<0,1>,
- SDTCisSameAs<1,2>]>>;
def X86mcvtneps2bf16 : SDNode<"X86ISD::MCVTNEPS2BF16",
SDTypeProfile<1, 3, [SDTCVecEltisVT<0, bf16>,
SDTCVecEltisVT<1, f32>,
@@ -875,45 +875,40 @@ def SDTAVX10CONVERT_2I8F16_MASK : SDTypeProfile<1, 4, [
SDTCisSameNumEltsAs<2, 4>
]>;
-def X86vcvt2ps2phx : SDNode<"X86ISD::VCVT2PS2PHX",
- SDTypeProfile<1, 2, [SDTCVecEltisVT<0, f16>,
+def X86vfpround2Rnd : SDNode<"X86ISD::VFPROUND2_RND",
+ SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f16>,
SDTCVecEltisVT<1, f32>,
- SDTCisSameAs<1,2>]>>;
-def X86vcvt2ps2phxRnd : SDNode<"X86ISD::VCVT2PS2PHX_RND",
- SDTypeProfile<1, 3, [SDTCVecEltisVT<0, f16>,
- SDTCVecEltisVT<1, f32>,
- SDTCisSameAs<1,2>,
- SDTCisVT<3, i32>]>>;
+ SDTCisSameAs<1, 2>,
+ SDTCisVT<3, i32>]>>;
// 3op
def X86vcvtne2ph2bf8 : SDNode<"X86ISD::VCVTNE2PH2BF8",
- SDTAVX10CONVERT_I82F16>;
+ SDTAVX10CONVERT_I82F16>;
def X86vcvtne2ph2bf8s : SDNode<"X86ISD::VCVTNE2PH2BF8S",
- SDTAVX10CONVERT_I82F16>;
+ SDTAVX10CONVERT_I82F16>;
def X86vcvtne2ph2hf8 : SDNode<"X86ISD::VCVTNE2PH2HF8",
- SDTAVX10CONVERT_I82F16>;
+ SDTAVX10CONVERT_I82F16>;
def X86vcvtne2ph2hf8s : SDNode<"X86ISD::VCVTNE2PH2HF8S",
- SDTAVX10CONVERT_I82F16>;
+ SDTAVX10CONVERT_I82F16>;
// 2op no broadcast
def X86vcvthf82ph : SDNode<"X86ISD::VCVTHF82PH",
- SDTAVX10CONVERT_F16I8>;
-
+ SDTAVX10CONVERT_F16I8>;
// 2op
def X86vcvtbiasph2bf8 : SDNode<"X86ISD::VCVTBIASPH2BF8",
- SDTAVX10CONVERT_2I8F16>;
+ SDTAVX10CONVERT_2I8F16>;
def X86vcvtbiasph2bf8s : SDNode<"X86ISD::VCVTBIASPH2BF8S",
- SDTAVX10CONVERT_2I8F16>;
+ SDTAVX10CONVERT_2I8F16>;
def X86vcvtbiasph2hf8 : SDNode<"X86ISD::VCVTBIASPH2HF8",
- SDTAVX10CONVERT_2I8F16>;
+ SDTAVX10CONVERT_2I8F16>;
def X86vcvtbiasph2hf8s : SDNode<"X86ISD::VCVTBIASPH2HF8S",
- SDTAVX10CONVERT_2I8F16>;
+ SDTAVX10CONVERT_2I8F16>;
def X86vcvtneph2bf8 : SDNode<"X86ISD::VCVTNEPH2BF8",
- SDTAVX10CONVERT_I8F16>;
+ SDTAVX10CONVERT_I8F16>;
def X86vcvtneph2bf8s : SDNode<"X86ISD::VCVTNEPH2BF8S",
- SDTAVX10CONVERT_I8F16>;
+ SDTAVX10CONVERT_I8F16>;
def X86vcvtneph2hf8 : SDNode<"X86ISD::VCVTNEPH2HF8",
- SDTAVX10CONVERT_I8F16>;
+ SDTAVX10CONVERT_I8F16>;
def X86vcvtneph2hf8s : SDNode<"X86ISD::VCVTNEPH2HF8S",
- SDTAVX10CONVERT_I8F16>;
+ SDTAVX10CONVERT_I8F16>;
def X86vmcvtbiasph2bf8 : SDNode<"X86ISD::VMCVTBIASPH2BF8",
SDTAVX10CONVERT_2I8F16_MASK>;
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index e6eea35d8eedd0..68c1ce072549b9 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -396,11 +396,11 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx10_mask_vcmpps256, CMP_MASK_CC, X86ISD::CMPMM,
X86ISD::CMPMM_SAE),
X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_128, INTR_TYPE_2OP_MASK,
- X86ISD::VCVT2PS2PHX, 0),
+ X86ISD::VFPROUND2, 0),
X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_256, INTR_TYPE_2OP_MASK,
- X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
+ X86ISD::VFPROUND2, X86ISD::VFPROUND2_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvt2ps2phx_512, INTR_TYPE_2OP_MASK,
- X86ISD::VCVT2PS2PHX, X86ISD::VCVT2PS2PHX_RND),
+ X86ISD::VFPROUND2, X86ISD::VFPROUND2_RND),
X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8128, TRUNCATE2_TO_REG,
X86ISD::VCVTBIASPH2BF8, X86ISD::VMCVTBIASPH2BF8),
X86_INTRINSIC_DATA(avx10_mask_vcvtbiasph2bf8256, INTR_TYPE_2OP_MASK,
@@ -1558,11 +1558,11 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::VPSHUFBITQMB, 0),
// bfloat16
X86_INTRINSIC_DATA(avx512bf16_cvtne2ps2bf16_128, INTR_TYPE_2OP,
- X86ISD::CVTNE2PS2BF16, 0),
+ X86ISD::VFPROUND2, 0),
X86_INTRINSIC_DATA(avx512bf16_cvtne2ps2bf16_256, INTR_TYPE_2OP,
- X86ISD::CVTNE2PS2BF16, 0),
+ X86ISD::VFPROUND2, 0),
X86_INTRINSIC_DATA(avx512bf16_cvtne2ps2bf16_512, INTR_TYPE_2OP,
- X86ISD::CVTNE2PS2BF16, 0),
+ X86ISD::VFPROUND2, 0),
X86_INTRINSIC_DATA(avx512bf16_cvtneps2bf16_256, INTR_TYPE_1OP,
X86ISD::CVTNEPS2BF16, 0),
X86_INTRINSIC_DATA(avx512bf16_cvtneps2bf16_512, INTR_TYPE_1OP,
diff --git a/llvm/lib/TargetParser/X86TargetParser.cpp b/llvm/lib/TargetParser/X86TargetParser.cpp
index 2d2f86b6281add..57bda0651ea829 100644
--- a/llvm/lib/TargetParser/X86TargetParser.cpp
+++ b/llvm/lib/TargetParser/X86TargetParser.cpp
@@ -617,7 +617,7 @@ constexpr FeatureBitset ImpliedFeaturesAVX10_1 =
FeatureAVX512CD | FeatureAVX512VBMI | FeatureAVX512IFMA |
FeatureAVX512VNNI | FeatureAVX512BF16 | FeatureAVX512VPOPCNTDQ |
FeatureAVX512VBMI2 | FeatureAVX512BITALG | FeatureVAES | FeatureVPCLMULQDQ |
- FeatureAVX512FP16 | FeatureAVX2;
+ FeatureAVX512FP16;
constexpr FeatureBitset ImpliedFeaturesAVX10_1_512 =
FeatureAVX10_1 | FeatureEVEX512;
constexpr FeatureBitset ImpliedFeaturesAVX10_2 = FeatureAVX10_1;
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