[clang] [llvm] [AArch64] Add a check for invalid default features (PR #104435)

[David Green via cfe-commits]

davemgreen wrote:

> Cortex-A710 does not appear to have SSBS

It would be very surprising to drop it from one generation of cpus, only to add it again in the next!

I believe this says it should be present:
https://developer.arm.com/documentation/101800/0201/AArch64-registers/AArch64-Identification-register-summary/ID-PFR2-EL1--AArch32-Processor-Feature-Register-2?lang=en
ID_AA64PFR1_EL1 also has a reference to it.

https://github.com/llvm/llvm-project/pull/104435