[clang] [llvm] [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs (PR #103709)

Pengcheng Wang via cfe-commits cfe-commits at lists.llvm.org
Wed Aug 14 23:24:13 PDT 2024


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@@ -150,6 +150,14 @@ let Predicates = [HasStdExtZvkg], RVVConstraint = NoConstraint in {
                  SchedBinaryMC<"WriteVGMULV", "ReadVGMULV", "ReadVGMULV">;
 } // Predicates = [HasStdExtZvkg]
 
+let Predicates = [HasStdExtZvkgs], RVVConstraint = NoConstraint in {
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wangpc-pp wrote:

I made a comment in https://github.com/riscv/riscv-isa-manual/pull/1306. We may not need this constraint to keep the consistency between `.vv` and `.vs`.

https://github.com/llvm/llvm-project/pull/103709


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