[clang] [llvm] [clang][HLSL] Add WaveIsFirstLane() intrinsic (PR #103299)

[Nathan Gauër via cfe-commits]

Keenuts wrote:

> We have this work tracked here: #99158
> 
> there should be some dxil specific tasks.

Seems like most boxes are checked, except Sema checks:
 - what kind of Sema checks would be required for this one?
Also, the intrinsic name in the issue is using camel case vs snake case for this PR. But seems like existing ones like thread_id are using snake case (same thing on the SPIR-V backend). So shouldn't we remain consistent?

https://github.com/llvm/llvm-project/pull/103299