[clang] [llvm] [NVPTX] Add conversion intrinsics from/to fp8 types (e4m3, e5m2) (PR #102969)

[Artem Belevich via cfe-commits]

================
@@ -722,6 +722,37 @@ let hasSideEffects = false in {
 
   defm CVT_f16x2 : CVT_FROM_FLOAT_V2_SM80<"f16x2", Int32Regs>;
   defm CVT_bf16x2 : CVT_FROM_FLOAT_V2_SM80<"bf16x2", Int32Regs>;
+
+  // FP8 conversions.
+  multiclass CVT_TO_F8X2<string F8Name> {
+    def _f32 :
+      NVPTXInst<(outs Int16Regs:$dst),
+                (ins Float32Regs:$src1, Float32Regs:$src2, CvtMode:$mode),
+                !strconcat("cvt${mode:base}.satfinite${mode:relu}.",
+                F8Name, "x2.f32 \t$dst, $src1, $src2;"), []>,
+      Requires<[hasPTX<81>, hasSM<89>]>;
+    def _f16x2 :
+      NVPTXInst<(outs Int16Regs:$dst),
+                (ins Int32Regs:$src, CvtMode:$mode),
+                !strconcat("cvt${mode:base}.satfinite${mode:relu}.",
+                F8Name, "x2.f16x2 \t$dst, $src;"), []>,
+      Requires<[hasPTX<81>, hasSM<89>]>;
+  }
+
+  defm CVT_e4m3x2 : CVT_TO_F8X2<"e4m3">;
+  defm CVT_e5m2x2 : CVT_TO_F8X2<"e5m2">;
+
+  multiclass CVT_FROM_F8X2<string F8Name> {
+    def x2 :
+      NVPTXInst<(outs Int32Regs:$dst),
----------------
Artem-B wrote:

I think you should be able to specify explicit name by using the magic `NAME` value to construct the name the way you want to. E.g: https://github.com/llvm/llvm-project/blob/101acff2e5df21378b5764660afc0ec84ce6a1a6/llvm/include/llvm/IR/IntrinsicsNVVM.td#L1450

> Also, "outs" is Int32Regs, and I cannot specify <2xf16> here. This is in line with the other class definitions in this file.

This part is fine, as Int32 is the register type for the `2xf16`. I was only concerned about the names.

https://github.com/llvm/llvm-project/pull/102969