[clang] 1b936e4 - [AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
via cfe-commits
cfe-commits at lists.llvm.org
Mon Aug 12 06:33:19 PDT 2024
Author: SpencerAbson
Date: 2024-08-12T14:33:11+01:00
New Revision: 1b936e4812ab395328203f65cacd4ffe02bb318e
URL: https://github.com/llvm/llvm-project/commit/1b936e4812ab395328203f65cacd4ffe02bb318e
DIFF: https://github.com/llvm/llvm-project/commit/1b936e4812ab395328203f65cacd4ffe02bb318e.diff
LOG: [AArch64] Add FEAT_SME_B16B16 and remove FEAT_B16B16 (#102501)
Implement FEAT_SME_B16B16 to enable ZA-targeting non-widening SME
BFloat16 instructions. Remove the now redundant FEAT_B16B16 which has
been replaced by FEAT_SVE_B16B16 and FEAT_SME_B16B16 (this commit), see
https://github.com/llvm/llvm-project/pull/101480/ for the details and
reasoning of this change to LLVM.
FEAT_SME_B16B16 is documented under the latest Armv9.4 feature
documentation:
https://developer.arm.com/documentation/109697/0100/Feature-descriptions/The-Armv9-4-architecture-extensio
- Changes to Clang AArch64 frontend
- Change target guard of SME2 ZA-targeting non-widening BFloat16
intrinsics to 'sme-b16b16'
- Changes to LLVM AArch64 backend
- llvm/lib/Target/AArch64/AArch64Features.td
- Create FeatureSMEB16B16, which implies FeatureSME2 and
FeatureSVEB16B16
- Remove FeatureB16B16
- Fix description of FeatureSVEB16B16
- llvm/lib/Target/AArch64/AArch64InstrInfo.td
- Create HasSMEB16B16 predicate
- llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
- Change predictication of SME2 ZA-targeting non-widening BFloat16
instructions to new HasSMEB16B16
- llvm/lib/Target/AArch64/AArch64.td
- Add HasSMEB16B16 to SME2Unsupported (FEAT_SME_B16B16 implies
FEAT_SME2)
- llvm/lib/AArch64/AsmParser/AArch64AsmParser.cpp
- Remove flag 'b16b16' mapping to removed FeatureB16B16
- Add flag 'sme-b16b16' mapping to new FeatureSMEB16B16
- Changes to LLVM unit tests
- llvm/unittests/TargetParser/TargetParserTest.cpp
- Add new sme-b16b16 flag to existing target parser tests
- Add tests for the sme-b16b16 dependencies:
- 'sme-b16b16' should enable 'sme2', 'sve-b16b16'. - Remove 'b16b16'
from bf16 dependency test
- Added MC tests
- llvm/test/MC/AArch64/SME2p1
- To ensure that ZA-targeting multi-vector non-widening BFloat16
instructions are enabled by +sme-b16b16, and that this feature is
removed by +nosme-b61b6.
- Modidified tests
- All CodeGen, Semantic, and MC tests that are effected by the removal
of 'b16b16', have been modified to supply and/or expect 'sme-b16b16'
where appropriate.
Added:
Modified:
clang/include/clang/Basic/arm_sme.td
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
clang/test/Driver/print-supported-extensions-aarch64.c
clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
llvm/lib/Target/AArch64/AArch64.td
llvm/lib/Target/AArch64/AArch64Features.td
llvm/lib/Target/AArch64/AArch64InstrInfo.td
llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
llvm/test/MC/AArch64/SME2/bfadd.s
llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
llvm/test/MC/AArch64/SME2/bfmla.s
llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
llvm/test/MC/AArch64/SME2/bfmls.s
llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
llvm/test/MC/AArch64/SME2/bfmopa.s
llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
llvm/test/MC/AArch64/SME2/bfmops.s
llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
llvm/test/MC/AArch64/SME2/bfsub.s
llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
llvm/unittests/TargetParser/TargetParserTest.cpp
Removed:
################################################################################
diff --git a/clang/include/clang/Basic/arm_sme.td b/clang/include/clang/Basic/arm_sme.td
index ce8908f566f2fd..ae6b55e98827ff 100644
--- a/clang/include/clang/Basic/arm_sme.td
+++ b/clang/include/clang/Basic/arm_sme.td
@@ -325,7 +325,7 @@ multiclass ZAAddSub<string n_suffix> {
def NAME # _ZA16_VG1X4_F16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x4", "vm4", "h", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x4", [IsStreaming, IsInOutZA], []>;
}
- let SMETargetGuard = "sme2,b16b16" in {
+ let SMETargetGuard = "sme-b16b16" in {
def NAME # _ZA16_VG1X2_BF16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x2", "vm2", "b", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x2", [IsStreaming, IsInOutZA], []>;
def NAME # _ZA16_VG1X4_BF16 : Inst<"sv" # n_suffix # "_za16[_{d}]_vg1x4", "vm4", "b", MergeNone, "aarch64_sme_" # n_suffix # "_za16_vg1x4", [IsStreaming, IsInOutZA], []>;
}
@@ -506,7 +506,7 @@ let SMETargetGuard = "sme-f16f16" in {
def SVMLS_LANE_VG1x4_F16 : Inst<"svmls_lane_za16[_f16]_vg1x4", "vm4di", "h", MergeNone, "aarch64_sme_fmls_lane_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_7>]>;
}
-let SMETargetGuard = "sme2,b16b16" in {
+let SMETargetGuard = "sme-b16b16" in {
def SVMLA_MULTI_VG1x2_BF16 : Inst<"svmla_za16[_bf16]_vg1x2", "vm22", "b", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
def SVMLA_MULTI_VG1x4_BF16 : Inst<"svmla_za16[_bf16]_vg1x4", "vm44", "b", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
def SVMLS_MULTI_VG1x2_BF16 : Inst<"svmls_za16[_bf16]_vg1x2", "vm22", "b", MergeNone, "aarch64_sme_fmls_vg1x2", [IsStreaming, IsInOutZA], []>;
@@ -742,7 +742,7 @@ let SMETargetGuard = "sme2" in {
////////////////////////////////////////////////////////////////////////////////
// SME2p1 - FMOPA, FMOPS (non-widening)
-let SMETargetGuard = "sme2,b16b16" in {
+let SMETargetGuard = "sme-b16b16" in {
def SVMOPA_BF16_NW : SInst<"svmopa_za16[_bf16]_m", "viPPdd", "b",
MergeNone, "aarch64_sme_mopa",
[IsStreaming, IsInOutZA],
diff --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
index 6336f435b86872..c88c6978719115 100644
--- a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
@@ -1,10 +1,10 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f8f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-CXX
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f8f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-CXX
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f8f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-CXX
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f8f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK-CXX
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall -o /dev/null
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -S -Werror -Wall -o /dev/null
// REQUIRES: aarch64-registered-target
diff --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
index 78d11927cc5666..909bf657dec5c7 100644
--- a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
@@ -1,10 +1,10 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
-// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
-// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
+// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme-f16f16 -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s --check-prefix CHECK-CXX
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -target-feature +sme-f16f16 -target-feature +b16b16 -O2 -S -Werror -Wall %s -o /dev/null
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme2p1 -target-feature +sme-f16f16 -O2 -S -Werror -Wall %s -o /dev/null
// REQUIRES: aarch64-registered-target
#include <arm_sme.h>
diff --git a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
index 8d826718350413..0eb391c7d79a03 100644
--- a/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
+++ b/clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
@@ -1,10 +1,10 @@
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 4
-// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -target-feature +b16b16 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK
-// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -target-feature +b16b16 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-CXX
-// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -target-feature +b16b16 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK
-// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -target-feature +b16b16 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-CXX
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme2p1 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK
+// RUN: %clang_cc1 -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme2p1 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-CXX
+// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme2p1 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK
+// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme2p1 -target-feature +sme-f16f16 -O2 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK-CXX
-// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme2 -target-feature +sme2p1 -target-feature +b16b16 -target-feature +sme-f16f16 -S -O2 -Werror -o /dev/null %s
+// RUN: %clang_cc1 -DSME_OVERLOADED_FORMS -x c++ -fclang-abi-compat=latest -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sme -target-feature +sme-b16b16 -target-feature +sme2p1 -target-feature +sme-f16f16 -S -O2 -Werror -o /dev/null %s
// REQUIRES: aarch64-registered-target
diff --git a/clang/test/Driver/print-supported-extensions-aarch64.c b/clang/test/Driver/print-supported-extensions-aarch64.c
index 242cece3a92a83..e6247307c7219f 100644
--- a/clang/test/Driver/print-supported-extensions-aarch64.c
+++ b/clang/test/Driver/print-supported-extensions-aarch64.c
@@ -5,7 +5,6 @@
// CHECK-EMPTY:
// CHECK-NEXT: Name Architecture Feature(s) Description
// CHECK-NEXT: aes FEAT_AES, FEAT_PMULL Enable AES support
-// CHECK-NEXT: b16b16 FEAT_B16B16 Enable SME2.1 ZA-targeting non-widening BFloat16 to BFloat16 instructions
// CHECK-NEXT: bf16 FEAT_BF16 Enable BFloat16 Extension
// CHECK-NEXT: brbe FEAT_BRBE Enable Branch Record Buffer Extension
// CHECK-NEXT: bti FEAT_BTI Enable Branch Target Identification
@@ -55,6 +54,7 @@
// CHECK-NEXT: sha3 FEAT_SHA3, FEAT_SHA512 Enable SHA512 and SHA3 support
// CHECK-NEXT: sm4 FEAT_SM4, FEAT_SM3 Enable SM3 and SM4 support
// CHECK-NEXT: sme FEAT_SME Enable Scalable Matrix Extension (SME)
+// CHECK-NEXT: sme-b16b16 FEAT_SME_B16B16 Enable SME2.1 ZA-targeting non-widening BFloat16 instructions
// CHECK-NEXT: sme-f16f16 FEAT_SME_F16F16 Enable SME non-widening Float16 instructions
// CHECK-NEXT: sme-f64f64 FEAT_SME_F64F64 Enable Scalable Matrix Extension (SME) F64F64 instructions
// CHECK-NEXT: sme-f8f16 FEAT_SME_F8F16 Enable Scalable Matrix Extension (SME) F8F16 instructions
@@ -71,7 +71,7 @@
// CHECK-NEXT: ssve-fp8dot4 FEAT_SSVE_FP8DOT4 Enable SVE2 FP8 4-way dot product instructions
// CHECK-NEXT: ssve-fp8fma FEAT_SSVE_FP8FMA Enable SVE2 FP8 multiply-add instructions
// CHECK-NEXT: sve FEAT_SVE Enable Scalable Vector Extension (SVE) instructions
-// CHECK-NEXT: sve-b16b16 FEAT_SVE_B16B16 Enable SVE2.1 non-widening and SME2.1 Z-targeting non-widening BFloat16 to BFloat16 instructions
+// CHECK-NEXT: sve-b16b16 FEAT_SVE_B16B16 Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions
// CHECK-NEXT: sve2 FEAT_SVE2 Enable Scalable Vector Extension 2 (SVE2) instructions
// CHECK-NEXT: sve2-aes FEAT_SVE_AES, FEAT_SVE_PMULL128 Enable AES SVE2 instructions
// CHECK-NEXT: sve2-bitperm FEAT_SVE_BitPerm Enable bit permutation SVE2 instructions
diff --git a/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c b/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
index 4a3a5a86a668b4..c26f8346cd7486 100644
--- a/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
+++ b/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_add_sub_za16.c
@@ -15,13 +15,13 @@ void test_features(uint32_t slice, svfloat16x2_t zn2, svfloat16x4_t zn4,
// expected-error at +1 {{'svsub_za16_f16_vg1x4' needs target feature sme-f16f16|sme-f8f16}}
svsub_za16_f16_vg1x4(slice, zn4);
- // expected-error at +1 {{'svadd_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svadd_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svadd_za16_bf16_vg1x2(slice, bzn2);
- // expected-error at +1 {{'svadd_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svadd_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svadd_za16_bf16_vg1x4(slice, bzn4);
- // expected-error at +1 {{'svsub_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svsub_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svsub_za16_bf16_vg1x2(slice, bzn2);
- // expected-error at +1 {{'svsub_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svsub_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svsub_za16_bf16_vg1x4(slice, bzn4);
}
diff --git a/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c b/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
index 66aba36ff68ad5..e60f6a483c024f 100644
--- a/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
+++ b/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_fmlas16.c
@@ -39,29 +39,29 @@ void test_features_f16f16(uint32_t slice,
// expected-error at +1 {{'svmls_lane_za16_f16_vg1x4' needs target feature sme-f16f16}}
svmls_lane_za16_f16_vg1x4(slice, zn4, zm, 7);
- // expected-error at +1 {{'svmla_single_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmla_single_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svmla_single_za16_bf16_vg1x2(slice, bzn2, bzm);
- // expected-error at +1 {{'svmla_single_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmla_single_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svmla_single_za16_bf16_vg1x4(slice, bzn4, bzm);
- // expected-error at +1 {{'svmls_single_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmls_single_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svmls_single_za16_bf16_vg1x2(slice, bzn2, bzm);
- // expected-error at +1 {{'svmls_single_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmls_single_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svmls_single_za16_bf16_vg1x4(slice, bzn4, bzm);
- // expected-error at +1 {{'svmla_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmla_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svmla_za16_bf16_vg1x2(slice, bzn2, bzm2);
- // expected-error at +1 {{'svmla_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmla_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svmla_za16_bf16_vg1x4(slice, bzn4, bzm4);
- // expected-error at +1 {{'svmls_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmls_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svmls_za16_bf16_vg1x2(slice, bzn2, bzm2);
- // expected-error at +1 {{'svmls_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmls_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svmls_za16_bf16_vg1x4(slice, bzn4, bzm4);
- // expected-error at +1 {{'svmla_lane_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmla_lane_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svmla_lane_za16_bf16_vg1x2(slice, bzn2, bzm, 7);
- // expected-error at +1 {{'svmla_lane_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmla_lane_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svmla_lane_za16_bf16_vg1x4(slice, bzn4, bzm, 7);
- // expected-error at +1 {{'svmls_lane_za16_bf16_vg1x2' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmls_lane_za16_bf16_vg1x2' needs target feature sme-b16b16}}
svmls_lane_za16_bf16_vg1x2(slice, bzn2, bzm, 7);
- // expected-error at +1 {{'svmls_lane_za16_bf16_vg1x4' needs target feature sme2,b16b16}}
+ // expected-error at +1 {{'svmls_lane_za16_bf16_vg1x4' needs target feature sme-b16b16}}
svmls_lane_za16_bf16_vg1x4(slice, bzn4, bzm, 7);
}
diff --git a/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c b/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
index 1331bf2050b715..881c2f98e1e0b6 100644
--- a/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
+++ b/clang/test/Sema/aarch64-sme2-intrinsics/acle_sme2_mopa_nonwide.c
@@ -8,9 +8,9 @@ void test_features(svbool_t pn, svbool_t pm,
svfloat16_t zn, svfloat16_t zm,
svbfloat16_t znb, svbfloat16_t zmb)
__arm_streaming __arm_inout("za") {
-// expected-error at +1 {{'svmopa_za16_bf16_m' needs target feature sme2,b16b16}}
+// expected-error at +1 {{'svmopa_za16_bf16_m' needs target feature sme-b16b16}}
svmopa_za16_bf16_m(0, pn, pm, znb, zmb);
-// expected-error at +1 {{'svmops_za16_bf16_m' needs target feature sme2,b16b16}}
+// expected-error at +1 {{'svmops_za16_bf16_m' needs target feature sme-b16b16}}
svmops_za16_bf16_m(0, pn, pm, znb, zmb);
// expected-error at +1 {{'svmopa_za16_f16_m' needs target feature sme-f16f16}}
svmopa_za16_f16_m(0, pn, pm, zn, zm);
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td
index 2c1a9cfa67a674..251318fe4b5efd 100644
--- a/llvm/lib/Target/AArch64/AArch64.td
+++ b/llvm/lib/Target/AArch64/AArch64.td
@@ -77,7 +77,7 @@ def SME2p1Unsupported : AArch64Unsupported;
def SME2Unsupported : AArch64Unsupported {
let F = !listconcat([HasSME2, HasSVE2orSME2, HasSVE2p1_or_HasSME2, HasSSVE_FP8FMA,
- HasSMEF8F16, HasSMEF8F32, HasSMEF16F16orSMEF8F16],
+ HasSMEF8F16, HasSMEF8F32, HasSMEF16F16orSMEF8F16, HasSMEB16B16],
SME2p1Unsupported.F);
}
diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td
index 2aa74deb0e850c..8ec13f17cf0a0d 100644
--- a/llvm/lib/Target/AArch64/AArch64Features.td
+++ b/llvm/lib/Target/AArch64/AArch64Features.td
@@ -435,11 +435,12 @@ def FeatureMEC : Extension<"mec", "MEC", "FEAT_MEC",
def FeatureSVE2p1: ExtensionWithMArch<"sve2p1", "SVE2p1", "FEAT_SVE2p1",
"Enable Scalable Vector Extension 2.1 instructions", [FeatureSVE2]>;
-def FeatureB16B16 : ExtensionWithMArch<"b16b16", "B16B16", "FEAT_B16B16",
- "Enable SME2.1 ZA-targeting non-widening BFloat16 to BFloat16 instructions", [FeatureBF16]>;
-
def FeatureSVEB16B16: ExtensionWithMArch<"sve-b16b16", "SVEB16B16", "FEAT_SVE_B16B16",
- "Enable SVE2.1 non-widening and SME2.1 Z-targeting non-widening BFloat16 to BFloat16 instructions">;
+ "Enable SVE2 non-widening and SME2 Z-targeting non-widening BFloat16 instructions">;
+
+def FeatureSMEB16B16 : ExtensionWithMArch<"sme-b16b16", "SMEB16B16", "FEAT_SME_B16B16",
+ "Enable SME2.1 ZA-targeting non-widening BFloat16 instructions",
+ [FeatureSME2, FeatureSVEB16B16]>;
def FeatureSMEF16F16 : ExtensionWithMArch<"sme-f16f16", "SMEF16F16", "FEAT_SME_F16F16",
"Enable SME non-widening Float16 instructions", [FeatureSME2]>;
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index 3f6b6d1f8800c9..1b914b52ad2f89 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -157,8 +157,6 @@ def HasSVE2SHA3 : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasS
AssemblerPredicateWithAll<(all_of FeatureSVE2SHA3), "sve2-sha3">;
def HasSVE2BitPerm : Predicate<"Subtarget->isSVEAvailable() && Subtarget->hasSVE2BitPerm()">,
AssemblerPredicateWithAll<(all_of FeatureSVE2BitPerm), "sve2-bitperm">;
-def HasB16B16 : Predicate<"Subtarget->hasB16B16()">,
- AssemblerPredicateWithAll<(all_of FeatureB16B16), "b16b16">;
def HasSMEandIsNonStreamingSafe
: Predicate<"Subtarget->hasSME()">,
AssemblerPredicateWithAll<(all_of FeatureSME), "sme">;
@@ -172,6 +170,8 @@ def HasSMEFA64 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSMEF
AssemblerPredicateWithAll<(all_of FeatureSMEFA64), "sme-fa64">;
def HasSMEI16I64 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSMEI16I64()">,
AssemblerPredicateWithAll<(all_of FeatureSMEI16I64), "sme-i16i64">;
+def HasSMEB16B16 : Predicate<"Subtarget->isStreaming() && Subtarget->hasSMEB16B16()">,
+ AssemblerPredicateWithAll<(all_of FeatureSMEB16B16), "sme-b16b16">;
def HasSME2andIsNonStreamingSafe
: Predicate<"Subtarget->hasSME2()">,
AssemblerPredicateWithAll<(all_of FeatureSME2), "sme2">;
diff --git a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
index 22de9e1458b7ad..ebe4121c944b1e 100644
--- a/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
@@ -858,7 +858,7 @@ defm FMOPS_MPPZZ_H : sme2p1_fmop_tile_fp16<"fmops", 0b0, 0b1, nxv8f16, int_aarch
}
// SME2 ZA-targeting non-widening BFloat16 instructions
-let Predicates = [HasSME2, HasB16B16] in {
+let Predicates = [HasSMEB16B16] in {
defm BFADD_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"bfadd", 0b1100, MatrixOp16, ZZ_h_mul_r, nxv8bf16, int_aarch64_sme_add_za16_vg1x2>;
defm BFADD_VG4_M4Z_H : sme2_multivec_accum_add_sub_vg4<"bfadd", 0b1100, MatrixOp16, ZZZZ_h_mul_r, nxv8bf16, int_aarch64_sme_add_za16_vg1x4>;
defm BFSUB_VG2_M2Z_H : sme2_multivec_accum_add_sub_vg2<"bfsub", 0b1101, MatrixOp16, ZZ_h_mul_r, nxv8bf16, int_aarch64_sme_sub_za16_vg1x2>;
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 26f8010f3427d3..1c5909c64bccd3 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -3681,7 +3681,6 @@ static const struct Extension {
{"sve2-sha3", {AArch64::FeatureSVE2SHA3}},
{"sve2-bitperm", {AArch64::FeatureSVE2BitPerm}},
{"sve2p1", {AArch64::FeatureSVE2p1}},
- {"b16b16", {AArch64::FeatureB16B16}},
{"ls64", {AArch64::FeatureLS64}},
{"xs", {AArch64::FeatureXS}},
{"pauth", {AArch64::FeaturePAuth}},
@@ -3693,6 +3692,7 @@ static const struct Extension {
{"sme-i16i64", {AArch64::FeatureSMEI16I64}},
{"sme2", {AArch64::FeatureSME2}},
{"sme2p1", {AArch64::FeatureSME2p1}},
+ {"sme-b16b16", {AArch64::FeatureSMEB16B16}},
{"hbc", {AArch64::FeatureHBC}},
{"mops", {AArch64::FeatureMOPS}},
{"mec", {AArch64::FeatureMEC}},
diff --git a/llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll b/llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
index 4f8969894d417d..dbf47d980d26eb 100644
--- a/llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
+++ b/llvm/test/CodeGen/AArch64/sme2-intrinsics-add-sub-za16.ll
@@ -145,4 +145,4 @@ define void @sub_bf16_vg1x4(i32 %slice, <vscale x 8 x bfloat> %zn0, <vscale x 8
attributes #0 = { nounwind "target-features"="+sme-f16f16" }
attributes #1 = { nounwind "target-features"="+sme-f8f16" }
-attributes #2 = { nounwind "target-features"="+sme2,+bf16,+b16b16" }
+attributes #2 = { nounwind "target-features"="+sme-b16b16,+bf16" }
diff --git a/llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll b/llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
index e72a7ab43c0e57..462ecd6555ef57 100644
--- a/llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
+++ b/llvm/test/CodeGen/AArch64/sme2-intrinsics-fmlas16.ll
@@ -459,4 +459,4 @@ define void @test_fmls_bf16_vg4_index(i32 %slice,
ret void
}
-attributes #0 = { nounwind "target-features"="+sme2p1,+sme-f16f16,+b16b16" }
+attributes #0 = { nounwind "target-features"="+sme2p1,+sme-f16f16,+sme-b16b16" }
diff --git a/llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll b/llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
index d1219d4b382d2b..ce9be4b152f5d7 100644
--- a/llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
+++ b/llvm/test/CodeGen/AArch64/sme2-intrinsics-mopa.ll
@@ -39,4 +39,4 @@ define void @mops_f16(<vscale x 8 x i1> %pn, <vscale x 8 x i1> %pm, <vscale x 8
ret void
}
-attributes #0 = {nounwind "target-features" = "+sme,+sme2p1,+bf16,+sme-f16f16,+b16b16" }
+attributes #0 = {nounwind "target-features" = "+sme-b16b16,+sme2p1,+bf16,+sme-f16f16" }
diff --git a/llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s b/llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
index cadb4704f45b79..ccb432a7716134 100644
--- a/llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/bfadd-diagnostics.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 2>&1 < %s | FileCheck %s
// --------------------------------------------------------------------------//
// Out of range index offset
diff --git a/llvm/test/MC/AArch64/SME2/bfadd.s b/llvm/test/MC/AArch64/SME2/bfadd.s
index 0ba009afa11bf4..4644dcd43b2653 100644
--- a/llvm/test/MC/AArch64/SME2/bfadd.s
+++ b/llvm/test/MC/AArch64/SME2/bfadd.s
@@ -1,300 +1,300 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
-// RUN: | llvm-objdump -d --mattr=+sme2,+b16b16 - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
+// RUN: | llvm-objdump -d --mattr=+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2,+b16b16 -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-b16b16 -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
bfadd za.h[w8, 0, vgx2], {z0.h, z1.h} // 11000001-11100100-00011100-00000000
// CHECK-INST: bfadd za.h[w8, 0, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c00 <unknown>
bfadd za.h[w8, 0], {z0.h - z1.h} // 11000001-11100100-00011100-00000000
// CHECK-INST: bfadd za.h[w8, 0, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c00 <unknown>
bfadd za.h[w10, 5, vgx2], {z10.h, z11.h} // 11000001-11100100-01011101-01000101
// CHECK-INST: bfadd za.h[w10, 5, vgx2], { z10.h, z11.h }
// CHECK-ENCODING: [0x45,0x5d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45d45 <unknown>
bfadd za.h[w10, 5], {z10.h - z11.h} // 11000001-11100100-01011101-01000101
// CHECK-INST: bfadd za.h[w10, 5, vgx2], { z10.h, z11.h }
// CHECK-ENCODING: [0x45,0x5d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45d45 <unknown>
bfadd za.h[w11, 7, vgx2], {z12.h, z13.h} // 11000001-11100100-01111101-10000111
// CHECK-INST: bfadd za.h[w11, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x87,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d87 <unknown>
bfadd za.h[w11, 7], {z12.h - z13.h} // 11000001-11100100-01111101-10000111
// CHECK-INST: bfadd za.h[w11, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x87,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d87 <unknown>
bfadd za.h[w11, 7, vgx2], {z30.h, z31.h} // 11000001-11100100-01111111-11000111
// CHECK-INST: bfadd za.h[w11, 7, vgx2], { z30.h, z31.h }
// CHECK-ENCODING: [0xc7,0x7f,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47fc7 <unknown>
bfadd za.h[w11, 7], {z30.h - z31.h} // 11000001-11100100-01111111-11000111
// CHECK-INST: bfadd za.h[w11, 7, vgx2], { z30.h, z31.h }
// CHECK-ENCODING: [0xc7,0x7f,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47fc7 <unknown>
bfadd za.h[w8, 5, vgx2], {z16.h, z17.h} // 11000001-11100100-00011110-00000101
// CHECK-INST: bfadd za.h[w8, 5, vgx2], { z16.h, z17.h }
// CHECK-ENCODING: [0x05,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41e05 <unknown>
bfadd za.h[w8, 5], {z16.h - z17.h} // 11000001-11100100-00011110-00000101
// CHECK-INST: bfadd za.h[w8, 5, vgx2], { z16.h, z17.h }
// CHECK-ENCODING: [0x05,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41e05 <unknown>
bfadd za.h[w8, 1, vgx2], {z0.h, z1.h} // 11000001-11100100-00011100-00000001
// CHECK-INST: bfadd za.h[w8, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x01,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c01 <unknown>
bfadd za.h[w8, 1], {z0.h - z1.h} // 11000001-11100100-00011100-00000001
// CHECK-INST: bfadd za.h[w8, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x01,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c01 <unknown>
bfadd za.h[w10, 0, vgx2], {z18.h, z19.h} // 11000001-11100100-01011110, 01000000
// CHECK-INST: bfadd za.h[w10, 0, vgx2], { z18.h, z19.h }
// CHECK-ENCODING: [0x40,0x5e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45e40 <unknown>
bfadd za.h[w10, 0], {z18.h - z19.h} // 11000001-11100100-01011110-01000000
// CHECK-INST: bfadd za.h[w10, 0, vgx2], { z18.h, z19.h }
// CHECK-ENCODING: [0x40,0x5e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45e40 <unknown>
bfadd za.h[w8, 0, vgx2], {z12.h, z13.h} // 11000001-11100100-00011101-10000000
// CHECK-INST: bfadd za.h[w8, 0, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x80,0x1d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41d80 <unknown>
bfadd za.h[w8, 0], {z12.h - z13.h} // 11000001-11100100-00011101-10000000
// CHECK-INST: bfadd za.h[w8, 0, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x80,0x1d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41d80 <unknown>
bfadd za.h[w10, 1, vgx2], {z0.h, z1.h} // 11000001-11100100-01011100-00000001
// CHECK-INST: bfadd za.h[w10, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x01,0x5c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45c01 <unknown>
bfadd za.h[w10, 1], {z0.h - z1.h} // 11000001-11100100-01011100-00000001
// CHECK-INST: bfadd za.h[w10, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x01,0x5c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45c01 <unknown>
bfadd za.h[w8, 5, vgx2], {z22.h, z23.h} // 11000001-11100100-00011110, 11000101
// CHECK-INST: bfadd za.h[w8, 5, vgx2], { z22.h, z23.h }
// CHECK-ENCODING: [0xc5,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41ec5 <unknown>
bfadd za.h[w8, 5], {z22.h - z23.h} // 11000001-11100100-00011110-11000101
// CHECK-INST: bfadd za.h[w8, 5, vgx2], { z22.h, z23.h }
// CHECK-ENCODING: [0xc5,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41ec5 <unknown>
bfadd za.h[w11, 2, vgx2], {z8.h, z9.h} // 11000001-11100100-01111101-00000010
// CHECK-INST: bfadd za.h[w11, 2, vgx2], { z8.h, z9.h }
// CHECK-ENCODING: [0x02,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d02 <unknown>
bfadd za.h[w11, 2], {z8.h - z9.h} // 11000001-11100100-01111101-00000010
// CHECK-INST: bfadd za.h[w11, 2, vgx2], { z8.h, z9.h }
// CHECK-ENCODING: [0x02,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d02 <unknown>
bfadd za.h[w9, 7, vgx2], {z12.h, z13.h} // 11000001-11100100-00111101-10000111
// CHECK-INST: bfadd za.h[w9, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x87,0x3d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e43d87 <unknown>
bfadd za.h[w9, 7], {z12.h - z13.h} // 11000001-11100100-00111101-10000111
// CHECK-INST: bfadd za.h[w9, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x87,0x3d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e43d87 <unknown>
bfadd za.h[w8, 0, vgx4], {z0.h - z3.h} // 11000001-11100101-00011100-00000000
// CHECK-INST: bfadd za.h[w8, 0, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x00,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c00 <unknown>
bfadd za.h[w8, 0], {z0.h - z3.h} // 11000001-11100101-00011100-00000000
// CHECK-INST: bfadd za.h[w8, 0, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x00,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c00 <unknown>
bfadd za.h[w10, 5, vgx4], {z8.h - z11.h} // 11000001-11100101-01011101-00000101
// CHECK-INST: bfadd za.h[w10, 5, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x05,0x5d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55d05 <unknown>
bfadd za.h[w10, 5], {z8.h - z11.h} // 11000001-11100101-01011101-00000101
// CHECK-INST: bfadd za.h[w10, 5, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x05,0x5d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55d05 <unknown>
bfadd za.h[w11, 7, vgx4], {z12.h - z15.h} // 11000001-11100101-01111101-10000111
// CHECK-INST: bfadd za.h[w11, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x87,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d87 <unknown>
bfadd za.h[w11, 7], {z12.h - z15.h} // 11000001-11100101-01111101-10000111
// CHECK-INST: bfadd za.h[w11, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x87,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d87 <unknown>
bfadd za.h[w11, 7, vgx4], {z28.h - z31.h} // 11000001-11100101-01111111-10000111
// CHECK-INST: bfadd za.h[w11, 7, vgx4], { z28.h - z31.h }
// CHECK-ENCODING: [0x87,0x7f,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57f87 <unknown>
bfadd za.h[w11, 7], {z28.h - z31.h} // 11000001-11100101-01111111-10000111
// CHECK-INST: bfadd za.h[w11, 7, vgx4], { z28.h - z31.h }
// CHECK-ENCODING: [0x87,0x7f,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57f87 <unknown>
bfadd za.h[w8, 5, vgx4], {z16.h - z19.h} // 11000001-11100101-00011110-00000101
// CHECK-INST: bfadd za.h[w8, 5, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x05,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e05 <unknown>
bfadd za.h[w8, 5], {z16.h - z19.h} // 11000001-11100101-00011110-00000101
// CHECK-INST: bfadd za.h[w8, 5, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x05,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e05 <unknown>
bfadd za.h[w8, 1, vgx4], {z0.h - z3.h} // 11000001-11100101-00011100-00000001
// CHECK-INST: bfadd za.h[w8, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x01,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c01 <unknown>
bfadd za.h[w8, 1], {z0.h - z3.h} // 11000001-11100101-00011100-00000001
// CHECK-INST: bfadd za.h[w8, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x01,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c01 <unknown>
bfadd za.h[w10, 0, vgx4], {z16.h - z19.h} // 11000001-11100101-01011110-00000000
// CHECK-INST: bfadd za.h[w10, 0, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x00,0x5e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55e00 <unknown>
bfadd za.h[w10, 0], {z16.h - z19.h} // 11000001-11100101-01011110-00000000
// CHECK-INST: bfadd za.h[w10, 0, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x00,0x5e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55e00 <unknown>
bfadd za.h[w8, 0, vgx4], {z12.h - z15.h} // 11000001-11100101-00011101-10000000
// CHECK-INST: bfadd za.h[w8, 0, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x80,0x1d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51d80 <unknown>
bfadd za.h[w8, 0], {z12.h - z15.h} // 11000001-11100101-00011101-10000000
// CHECK-INST: bfadd za.h[w8, 0, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x80,0x1d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51d80 <unknown>
bfadd za.h[w10, 1, vgx4], {z0.h - z3.h} // 11000001-11100101-01011100-00000001
// CHECK-INST: bfadd za.h[w10, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x01,0x5c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55c01 <unknown>
bfadd za.h[w10, 1], {z0.h - z3.h} // 11000001-11100101-01011100-00000001
// CHECK-INST: bfadd za.h[w10, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x01,0x5c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55c01 <unknown>
bfadd za.h[w8, 5, vgx4], {z20.h - z23.h} // 11000001-11100101-00011110-10000101
// CHECK-INST: bfadd za.h[w8, 5, vgx4], { z20.h - z23.h }
// CHECK-ENCODING: [0x85,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e85 <unknown>
bfadd za.h[w8, 5], {z20.h - z23.h} // 11000001-11100101-00011110-10000101
// CHECK-INST: bfadd za.h[w8, 5, vgx4], { z20.h - z23.h }
// CHECK-ENCODING: [0x85,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e85 <unknown>
bfadd za.h[w11, 2, vgx4], {z8.h - z11.h} // 11000001-11100101-01111101-00000010
// CHECK-INST: bfadd za.h[w11, 2, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x02,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d02 <unknown>
bfadd za.h[w11, 2], {z8.h - z11.h} // 11000001-11100101-01111101-00000010
// CHECK-INST: bfadd za.h[w11, 2, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x02,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d02 <unknown>
bfadd za.h[w9, 7, vgx4], {z12.h - z15.h} // 11000001-11100101-00111101-10000111
// CHECK-INST: bfadd za.h[w9, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x87,0x3d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e53d87 <unknown>
bfadd za.h[w9, 7], {z12.h - z15.h} // 11000001-11100101-00111101-10000111
// CHECK-INST: bfadd za.h[w9, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x87,0x3d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e53d87 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s b/llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
index efd26244d91f04..4104ebd12b38ba 100644
--- a/llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/bfmla-diagnostics.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 2>&1 < %s | FileCheck %s
// --------------------------------------------------------------------------//
// Invalid vector list
diff --git a/llvm/test/MC/AArch64/SME2/bfmla.s b/llvm/test/MC/AArch64/SME2/bfmla.s
index 75ccccc9198433..b6e1bc11bcd7fc 100644
--- a/llvm/test/MC/AArch64/SME2/bfmla.s
+++ b/llvm/test/MC/AArch64/SME2/bfmla.s
@@ -1,876 +1,876 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
-// RUN: | llvm-objdump -d --mattr=+sme2,+b16b16 - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
+// RUN: | llvm-objdump -d --mattr=+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2,+b16b16 -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-b16b16 -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
bfmla za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00011100-00000000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x1c,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601c00 <unknown>
bfmla za.h[w8, 0], {z0.h - z1.h}, z0.h // 11000001-01100000-00011100-00000000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x1c,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601c00 <unknown>
bfmla za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01011101-01000101
// CHECK-INST: bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x45,0x5d,0x65,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1655d45 <unknown>
bfmla za.h[w10, 5], {z10.h - z11.h}, z5.h // 11000001-01100101-01011101-01000101
// CHECK-INST: bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x45,0x5d,0x65,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1655d45 <unknown>
bfmla za.h[w11, 7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa7,0x7d,0x68,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1687da7 <unknown>
bfmla za.h[w11, 7], {z13.h - z14.h}, z8.h // 11000001-01101000-01111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa7,0x7d,0x68,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1687da7 <unknown>
bfmla za.h[w11, 7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01111111-11100111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe7,0x7f,0x6f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16f7fe7 <unknown>
bfmla za.h[w11, 7], {z31.h - z0.h}, z15.h // 11000001-01101111-01111111-11100111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe7,0x7f,0x6f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16f7fe7 <unknown>
bfmla za.h[w8, 5, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x25,0x1e,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601e25 <unknown>
bfmla za.h[w8, 5], {z17.h - z18.h}, z0.h // 11000001-01100000-00011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x25,0x1e,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601e25 <unknown>
bfmla za.h[w8, 1, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00011100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x1c,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1c21 <unknown>
bfmla za.h[w8, 1], {z1.h - z2.h}, z14.h // 11000001-01101110-00011100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x1c,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1c21 <unknown>
bfmla za.h[w10, 0, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01011110-01100000
// CHECK-INST: bfmla za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x5e,0x64,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1645e60 <unknown>
bfmla za.h[w10, 0], {z19.h - z20.h}, z4.h // 11000001-01100100-01011110-01100000
// CHECK-INST: bfmla za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x5e,0x64,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1645e60 <unknown>
bfmla za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00011101-10000000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x1d,0x62,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1621d80 <unknown>
bfmla za.h[w8, 0], {z12.h - z13.h}, z2.h // 11000001-01100010-00011101-10000000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x1d,0x62,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1621d80 <unknown>
bfmla za.h[w10, 1, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01011100-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x5c,0x6a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16a5c21 <unknown>
bfmla za.h[w10, 1], {z1.h - z2.h}, z10.h // 11000001-01101010-01011100-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x5c,0x6a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16a5c21 <unknown>
bfmla za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00011110-11000101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc5,0x1e,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1ec5 <unknown>
bfmla za.h[w8, 5], {z22.h - z23.h}, z14.h // 11000001-01101110-00011110-11000101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc5,0x1e,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1ec5 <unknown>
bfmla za.h[w11, 2, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01111101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x22,0x7d,0x61,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1617d22 <unknown>
bfmla za.h[w11, 2], {z9.h - z10.h}, z1.h // 11000001-01100001-01111101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x22,0x7d,0x61,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1617d22 <unknown>
bfmla za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00111101-10000111
// CHECK-INST: bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x87,0x3d,0x6b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16b3d87 <unknown>
bfmla za.h[w9, 7], {z12.h - z13.h}, z11.h // 11000001-01101011-00111101-10000111
// CHECK-INST: bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x87,0x3d,0x6b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16b3d87 <unknown>
bfmla za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-00010000-00010000-00100000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x20,0x10,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101020 <unknown>
bfmla za.h[w8, 0], {z0.h - z1.h}, z0.h[0] // 11000001-00010000-00010000-00100000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x20,0x10,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101020 <unknown>
bfmla za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h[2] // 11000001-00010101-01010101-01100101
// CHECK-INST: bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2]
// CHECK-ENCODING: [0x65,0x55,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1155565 <unknown>
bfmla za.h[w10, 5], {z10.h - z11.h}, z5.h[2] // 11000001-00010101-01010101-01100101
// CHECK-INST: bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2]
// CHECK-ENCODING: [0x65,0x55,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1155565 <unknown>
bfmla za.h[w11, 7, vgx2], {z12.h, z13.h}, z8.h[6] // 11000001-00011000-01111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6]
// CHECK-ENCODING: [0xa7,0x7d,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1187da7 <unknown>
bfmla za.h[w11, 7], {z12.h - z13.h}, z8.h[6] // 11000001-00011000-01111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6]
// CHECK-ENCODING: [0xa7,0x7d,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1187da7 <unknown>
bfmla za.h[w11, 7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-00011111-01111111-11101111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xef,0x7f,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11f7fef <unknown>
bfmla za.h[w11, 7], {z30.h - z31.h}, z15.h[7] // 11000001-00011111-01111111-11101111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xef,0x7f,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11f7fef <unknown>
bfmla za.h[w8, 5, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-00010000-00011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x25,0x1e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101e25 <unknown>
bfmla za.h[w8, 5], {z16.h - z17.h}, z0.h[6] // 11000001-00010000-00011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x25,0x1e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101e25 <unknown>
bfmla za.h[w8, 1, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-00011110-00010100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x21,0x14,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1421 <unknown>
bfmla za.h[w8, 1], {z0.h - z1.h}, z14.h[2] // 11000001-00011110-00010100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x21,0x14,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1421 <unknown>
bfmla za.h[w10, 0, vgx2], {z18.h, z19.h}, z4.h[3] // 11000001-00010100-01010110-01101000
// CHECK-INST: bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3]
// CHECK-ENCODING: [0x68,0x56,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1145668 <unknown>
bfmla za.h[w10, 0], {z18.h - z19.h}, z4.h[3] // 11000001-00010100-01010110-01101000
// CHECK-INST: bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3]
// CHECK-ENCODING: [0x68,0x56,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1145668 <unknown>
bfmla za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-00010010-00011001-10100000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0xa0,0x19,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11219a0 <unknown>
bfmla za.h[w8, 0], {z12.h - z13.h}, z2.h[4] // 11000001-00010010-00011001-10100000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0xa0,0x19,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11219a0 <unknown>
bfmla za.h[w10, 1, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-00011010-01011000-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x21,0x58,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11a5821 <unknown>
bfmla za.h[w10, 1], {z0.h - z1.h}, z10.h[4] // 11000001-00011010-01011000-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x21,0x58,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11a5821 <unknown>
bfmla za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-00011110-00011010-11101101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xed,0x1a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1aed <unknown>
bfmla za.h[w8, 5], {z22.h - z23.h}, z14.h[5] // 11000001-00011110-00011010-11101101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xed,0x1a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1aed <unknown>
bfmla za.h[w11, 2, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-00010001-01110101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x22,0x75,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1117522 <unknown>
bfmla za.h[w11, 2], {z8.h - z9.h}, z1.h[2] // 11000001-00010001-01110101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x22,0x75,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1117522 <unknown>
bfmla za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h[4] // 11000001-00011011-00111001-10100111
// CHECK-INST: bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4]
// CHECK-ENCODING: [0xa7,0x39,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11b39a7 <unknown>
bfmla za.h[w9, 7], {z12.h - z13.h}, z11.h[4] // 11000001-00011011-00111001-10100111
// CHECK-INST: bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4]
// CHECK-ENCODING: [0xa7,0x39,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11b39a7 <unknown>
bfmla za.h[w8, 0, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000-00010000-00001000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x10,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e01008 <unknown>
bfmla za.h[w8, 0], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00010000-00001000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x10,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e01008 <unknown>
bfmla za.h[w10, 5, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100-01010001-01001101
// CHECK-INST: bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x4d,0x51,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f4514d <unknown>
bfmla za.h[w10, 5], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01010001-01001101
// CHECK-INST: bfmla za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x4d,0x51,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f4514d <unknown>
bfmla za.h[w11, 7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000-01110001-10001111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x8f,0x71,0xe8,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e8718f <unknown>
bfmla za.h[w11, 7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01110001-10001111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x8f,0x71,0xe8,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e8718f <unknown>
bfmla za.h[w11, 7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110-01110011-11001111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcf,0x73,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe73cf <unknown>
bfmla za.h[w11, 7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01110011-11001111
// CHECK-INST: bfmla za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcf,0x73,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe73cf <unknown>
bfmla za.h[w8, 5, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000-00010010-00001101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x0d,0x12,0xf0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f0120d <unknown>
bfmla za.h[w8, 5], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00010010-00001101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x0d,0x12,0xf0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f0120d <unknown>
bfmla za.h[w8, 1, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110-00010000-00001001
// CHECK-INST: bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x10,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe1009 <unknown>
bfmla za.h[w8, 1], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00010000-00001001
// CHECK-INST: bfmla za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x10,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe1009 <unknown>
bfmla za.h[w10, 0, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100-01010010-01001000
// CHECK-INST: bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x52,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f45248 <unknown>
bfmla za.h[w10, 0], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01010010-01001000
// CHECK-INST: bfmla za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x52,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f45248 <unknown>
bfmla za.h[w8, 0, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010-00010001-10001000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x11,0xe2,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e21188 <unknown>
bfmla za.h[w8, 0], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00010001-10001000
// CHECK-INST: bfmla za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x11,0xe2,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e21188 <unknown>
bfmla za.h[w10, 1, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010-01010000-00001001
// CHECK-INST: bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x50,0xfa,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fa5009 <unknown>
bfmla za.h[w10, 1], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01010000-00001001
// CHECK-INST: bfmla za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x50,0xfa,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fa5009 <unknown>
bfmla za.h[w8, 5, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110-00010010-11001101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcd,0x12,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe12cd <unknown>
bfmla za.h[w8, 5], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00010010-11001101
// CHECK-INST: bfmla za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcd,0x12,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe12cd <unknown>
bfmla za.h[w11, 2, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000-01110001-00001010
// CHECK-INST: bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x0a,0x71,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e0710a <unknown>
bfmla za.h[w11, 2], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01110001-00001010
// CHECK-INST: bfmla za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x0a,0x71,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e0710a <unknown>
bfmla za.h[w9, 7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010-00110001-10001111
// CHECK-INST: bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x8f,0x31,0xea,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1ea318f <unknown>
bfmla za.h[w9, 7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00110001-10001111
// CHECK-INST: bfmla za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x8f,0x31,0xea,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1ea318f <unknown>
bfmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h // 11000001-01110000-00011100-00000000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h
// CHECK-ENCODING: [0x00,0x1c,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701c00 <unknown>
bfmla za.h[w8, 0], {z0.h - z3.h}, z0.h // 11000001-01110000-00011100-00000000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h
// CHECK-ENCODING: [0x00,0x1c,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701c00 <unknown>
bfmla za.h[w10, 5, vgx4], {z10.h - z13.h}, z5.h // 11000001-01110101-01011101-01000101
// CHECK-INST: bfmla za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h
// CHECK-ENCODING: [0x45,0x5d,0x75,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1755d45 <unknown>
bfmla za.h[w10, 5], {z10.h - z13.h}, z5.h // 11000001-01110101-01011101-01000101
// CHECK-INST: bfmla za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h
// CHECK-ENCODING: [0x45,0x5d,0x75,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1755d45 <unknown>
bfmla za.h[w11, 7, vgx4], {z13.h - z16.h}, z8.h // 11000001-01111000-01111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h
// CHECK-ENCODING: [0xa7,0x7d,0x78,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1787da7 <unknown>
bfmla za.h[w11, 7], {z13.h - z16.h}, z8.h // 11000001-01111000-01111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h
// CHECK-ENCODING: [0xa7,0x7d,0x78,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1787da7 <unknown>
bfmla za.h[w11, 7, vgx4], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-01111111-01111111-11100111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h
// CHECK-ENCODING: [0xe7,0x7f,0x7f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17f7fe7 <unknown>
bfmla za.h[w11, 7], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-01111111-01111111-11100111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h
// CHECK-ENCODING: [0xe7,0x7f,0x7f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17f7fe7 <unknown>
bfmla za.h[w8, 5, vgx4], {z17.h - z20.h}, z0.h // 11000001-01110000-00011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h
// CHECK-ENCODING: [0x25,0x1e,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701e25 <unknown>
bfmla za.h[w8, 5], {z17.h - z20.h}, z0.h // 11000001-01110000-00011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h
// CHECK-ENCODING: [0x25,0x1e,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701e25 <unknown>
bfmla za.h[w8, 1, vgx4], {z1.h - z4.h}, z14.h // 11000001-01111110-00011100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h
// CHECK-ENCODING: [0x21,0x1c,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1c21 <unknown>
bfmla za.h[w8, 1], {z1.h - z4.h}, z14.h // 11000001-01111110-00011100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h
// CHECK-ENCODING: [0x21,0x1c,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1c21 <unknown>
bfmla za.h[w10, 0, vgx4], {z19.h - z22.h}, z4.h // 11000001-01110100-01011110-01100000
// CHECK-INST: bfmla za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h
// CHECK-ENCODING: [0x60,0x5e,0x74,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1745e60 <unknown>
bfmla za.h[w10, 0], {z19.h - z22.h}, z4.h // 11000001-01110100-01011110-01100000
// CHECK-INST: bfmla za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h
// CHECK-ENCODING: [0x60,0x5e,0x74,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1745e60 <unknown>
bfmla za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h // 11000001-01110010-00011101-10000000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h
// CHECK-ENCODING: [0x80,0x1d,0x72,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1721d80 <unknown>
bfmla za.h[w8, 0], {z12.h - z15.h}, z2.h // 11000001-01110010-00011101-10000000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h
// CHECK-ENCODING: [0x80,0x1d,0x72,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1721d80 <unknown>
bfmla za.h[w10, 1, vgx4], {z1.h - z4.h}, z10.h // 11000001-01111010-01011100-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h
// CHECK-ENCODING: [0x21,0x5c,0x7a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17a5c21 <unknown>
bfmla za.h[w10, 1], {z1.h - z4.h}, z10.h // 11000001-01111010-01011100-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h
// CHECK-ENCODING: [0x21,0x5c,0x7a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17a5c21 <unknown>
bfmla za.h[w8, 5, vgx4], {z22.h - z25.h}, z14.h // 11000001-01111110-00011110-11000101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h
// CHECK-ENCODING: [0xc5,0x1e,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1ec5 <unknown>
bfmla za.h[w8, 5], {z22.h - z25.h}, z14.h // 11000001-01111110-00011110-11000101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h
// CHECK-ENCODING: [0xc5,0x1e,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1ec5 <unknown>
bfmla za.h[w11, 2, vgx4], {z9.h - z12.h}, z1.h // 11000001-01110001-01111101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h
// CHECK-ENCODING: [0x22,0x7d,0x71,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1717d22 <unknown>
bfmla za.h[w11, 2], {z9.h - z12.h}, z1.h // 11000001-01110001-01111101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h
// CHECK-ENCODING: [0x22,0x7d,0x71,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1717d22 <unknown>
bfmla za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h // 11000001-01111011-00111101-10000111
// CHECK-INST: bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h
// CHECK-ENCODING: [0x87,0x3d,0x7b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17b3d87 <unknown>
bfmla za.h[w9, 7], {z12.h - z15.h}, z11.h // 11000001-01111011-00111101-10000111
// CHECK-INST: bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h
// CHECK-ENCODING: [0x87,0x3d,0x7b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17b3d87 <unknown>
bfmla za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00100000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
// CHECK-ENCODING: [0x20,0x90,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109020 <unknown>
bfmla za.h[w8, 0], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00100000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
// CHECK-ENCODING: [0x20,0x90,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109020 <unknown>
bfmla za.h[w10, 5, vgx4], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00100101
// CHECK-INST: bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2]
// CHECK-ENCODING: [0x25,0xd5,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c115d525 <unknown>
bfmla za.h[w10, 5], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00100101
// CHECK-INST: bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2]
// CHECK-ENCODING: [0x25,0xd5,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c115d525 <unknown>
bfmla za.h[w11, 7, vgx4], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6]
// CHECK-ENCODING: [0xa7,0xfd,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c118fda7 <unknown>
bfmla za.h[w11, 7], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10100111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6]
// CHECK-ENCODING: [0xa7,0xfd,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c118fda7 <unknown>
bfmla za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10101111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7]
// CHECK-ENCODING: [0xaf,0xff,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11fffaf <unknown>
bfmla za.h[w11, 7], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10101111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7]
// CHECK-ENCODING: [0xaf,0xff,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11fffaf <unknown>
bfmla za.h[w8, 5, vgx4], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6]
// CHECK-ENCODING: [0x25,0x9e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109e25 <unknown>
bfmla za.h[w8, 5], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00100101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6]
// CHECK-ENCODING: [0x25,0x9e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109e25 <unknown>
bfmla za.h[w8, 1, vgx4], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2]
// CHECK-ENCODING: [0x21,0x94,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9421 <unknown>
bfmla za.h[w8, 1], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00100001
// CHECK-INST: bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2]
// CHECK-ENCODING: [0x21,0x94,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9421 <unknown>
bfmla za.h[w10, 0, vgx4], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00101000
// CHECK-INST: bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3]
// CHECK-ENCODING: [0x28,0xd6,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c114d628 <unknown>
bfmla za.h[w10, 0], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00101000
// CHECK-INST: bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3]
// CHECK-ENCODING: [0x28,0xd6,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c114d628 <unknown>
bfmla za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10100000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4]
// CHECK-ENCODING: [0xa0,0x99,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11299a0 <unknown>
bfmla za.h[w8, 0], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10100000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4]
// CHECK-ENCODING: [0xa0,0x99,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11299a0 <unknown>
bfmla za.h[w10, 1, vgx4], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4]
// CHECK-ENCODING: [0x21,0xd8,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11ad821 <unknown>
bfmla za.h[w10, 1], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00100001
// CHECK-INST: bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4]
// CHECK-ENCODING: [0x21,0xd8,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11ad821 <unknown>
bfmla za.h[w8, 5, vgx4], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10101101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5]
// CHECK-ENCODING: [0xad,0x9a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9aad <unknown>
bfmla za.h[w8, 5], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10101101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5]
// CHECK-ENCODING: [0xad,0x9a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9aad <unknown>
bfmla za.h[w11, 2, vgx4], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2]
// CHECK-ENCODING: [0x22,0xf5,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c111f522 <unknown>
bfmla za.h[w11, 2], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00100010
// CHECK-INST: bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2]
// CHECK-ENCODING: [0x22,0xf5,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c111f522 <unknown>
bfmla za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10100111
// CHECK-INST: bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4]
// CHECK-ENCODING: [0xa7,0xb9,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11bb9a7 <unknown>
bfmla za.h[w9, 7], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10100111
// CHECK-INST: bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4]
// CHECK-ENCODING: [0xa7,0xb9,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11bb9a7 <unknown>
bfmla za.h[w8, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-11100001-00010000-00001000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x08,0x10,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11008 <unknown>
bfmla za.h[w8, 0], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-11100001-00010000-00001000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x08,0x10,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11008 <unknown>
bfmla za.h[w10, 5, vgx4], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-11110101-01010001-00001101
// CHECK-INST: bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x0d,0x51,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f5510d <unknown>
bfmla za.h[w10, 5], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-11110101-01010001-00001101
// CHECK-INST: bfmla za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x0d,0x51,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f5510d <unknown>
bfmla za.h[w11, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-01110001-10001111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x8f,0x71,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9718f <unknown>
bfmla za.h[w11, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-01110001-10001111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x8f,0x71,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9718f <unknown>
bfmla za.h[w11, 7, vgx4], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-11111101-01110011-10001111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x8f,0x73,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd738f <unknown>
bfmla za.h[w11, 7], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-11111101-01110011-10001111
// CHECK-INST: bfmla za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x8f,0x73,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd738f <unknown>
bfmla za.h[w8, 5, vgx4], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-11110001-00010010-00001101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }
// CHECK-ENCODING: [0x0d,0x12,0xf1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f1120d <unknown>
bfmla za.h[w8, 5], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-11110001-00010010-00001101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }
// CHECK-ENCODING: [0x0d,0x12,0xf1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f1120d <unknown>
bfmla za.h[w8, 1, vgx4], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-11111101-00010000-00001001
// CHECK-INST: bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x09,0x10,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd1009 <unknown>
bfmla za.h[w8, 1], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-11111101-00010000-00001001
// CHECK-INST: bfmla za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x09,0x10,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd1009 <unknown>
bfmla za.h[w10, 0, vgx4], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-11110101-01010010-00001000
// CHECK-INST: bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x08,0x52,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f55208 <unknown>
bfmla za.h[w10, 0], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-11110101-01010010-00001000
// CHECK-INST: bfmla za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x08,0x52,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f55208 <unknown>
bfmla za.h[w8, 0, vgx4], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-11100001-00010001-10001000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x88,0x11,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11188 <unknown>
bfmla za.h[w8, 0], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-11100001-00010001-10001000
// CHECK-INST: bfmla za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x88,0x11,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11188 <unknown>
bfmla za.h[w10, 1, vgx4], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-11111001-01010000-00001001
// CHECK-INST: bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }
// CHECK-ENCODING: [0x09,0x50,0xf9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f95009 <unknown>
bfmla za.h[w10, 1], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-11111001-01010000-00001001
// CHECK-INST: bfmla za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }
// CHECK-ENCODING: [0x09,0x50,0xf9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f95009 <unknown>
bfmla za.h[w8, 5, vgx4], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-11111101-00010010-10001101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x8d,0x12,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd128d <unknown>
bfmla za.h[w8, 5], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-11111101-00010010-10001101
// CHECK-INST: bfmla za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x8d,0x12,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd128d <unknown>
bfmla za.h[w11, 2, vgx4], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-11100001-01110001-00001010
// CHECK-INST: bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x0a,0x71,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e1710a <unknown>
bfmla za.h[w11, 2], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-11100001-01110001-00001010
// CHECK-INST: bfmla za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x0a,0x71,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e1710a <unknown>
bfmla za.h[w9, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-00110001-10001111
// CHECK-INST: bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x8f,0x31,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9318f <unknown>
bfmla za.h[w9, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-00110001-10001111
// CHECK-INST: bfmla za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x8f,0x31,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9318f <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s b/llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
index d6e77137f9a28f..a701839389a299 100644
--- a/llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/bfmls-diagnostics.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 2>&1 < %s | FileCheck %s
// --------------------------------------------------------------------------//
// Invalid vector list
diff --git a/llvm/test/MC/AArch64/SME2/bfmls.s b/llvm/test/MC/AArch64/SME2/bfmls.s
index 8d5bdc48025af2..be7d21a86bdb59 100644
--- a/llvm/test/MC/AArch64/SME2/bfmls.s
+++ b/llvm/test/MC/AArch64/SME2/bfmls.s
@@ -1,876 +1,876 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
-// RUN: | llvm-objdump -d --mattr=+sme2,+b16b16 - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
+// RUN: | llvm-objdump -d --mattr=+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2,+b16b16 -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-b16b16 -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
bfmls za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00011100-00001000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x1c,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601c08 <unknown>
bfmls za.h[w8, 0], {z0.h - z1.h}, z0.h // 11000001-01100000-00011100-00001000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x1c,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601c08 <unknown>
bfmls za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01011101-01001101
// CHECK-INST: bfmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x4d,0x5d,0x65,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1655d4d <unknown>
bfmls za.h[w10, 5], {z10.h - z11.h}, z5.h // 11000001-01100101-01011101-01001101
// CHECK-INST: bfmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x4d,0x5d,0x65,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1655d4d <unknown>
bfmls za.h[w11, 7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01111101-10101111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xaf,0x7d,0x68,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1687daf <unknown>
bfmls za.h[w11, 7], {z13.h - z14.h}, z8.h // 11000001-01101000-01111101-10101111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xaf,0x7d,0x68,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1687daf <unknown>
bfmls za.h[w11, 7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01111111-11101111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xef,0x7f,0x6f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16f7fef <unknown>
bfmls za.h[w11, 7], {z31.h - z0.h}, z15.h // 11000001-01101111-01111111-11101111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xef,0x7f,0x6f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16f7fef <unknown>
bfmls za.h[w8, 5, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00011110-00101101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x2d,0x1e,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601e2d <unknown>
bfmls za.h[w8, 5], {z17.h - z18.h}, z0.h // 11000001-01100000-00011110-00101101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x2d,0x1e,0x60,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1601e2d <unknown>
bfmls za.h[w8, 1, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00011100-00101001
// CHECK-INST: bfmls za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x1c,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1c29 <unknown>
bfmls za.h[w8, 1], {z1.h - z2.h}, z14.h // 11000001-01101110-00011100-00101001
// CHECK-INST: bfmls za.h[w8, 1, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x1c,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1c29 <unknown>
bfmls za.h[w10, 0, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01011110-01101000
// CHECK-INST: bfmls za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x5e,0x64,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1645e68 <unknown>
bfmls za.h[w10, 0], {z19.h - z20.h}, z4.h // 11000001-01100100-01011110-01101000
// CHECK-INST: bfmls za.h[w10, 0, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x5e,0x64,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1645e68 <unknown>
bfmls za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00011101-10001000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x1d,0x62,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1621d88 <unknown>
bfmls za.h[w8, 0], {z12.h - z13.h}, z2.h // 11000001-01100010-00011101-10001000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x1d,0x62,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1621d88 <unknown>
bfmls za.h[w10, 1, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01011100-00101001
// CHECK-INST: bfmls za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x5c,0x6a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16a5c29 <unknown>
bfmls za.h[w10, 1], {z1.h - z2.h}, z10.h // 11000001-01101010-01011100-00101001
// CHECK-INST: bfmls za.h[w10, 1, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x5c,0x6a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16a5c29 <unknown>
bfmls za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00011110-11001101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xcd,0x1e,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1ecd <unknown>
bfmls za.h[w8, 5], {z22.h - z23.h}, z14.h // 11000001-01101110-00011110-11001101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xcd,0x1e,0x6e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16e1ecd <unknown>
bfmls za.h[w11, 2, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01111101-00101010
// CHECK-INST: bfmls za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x2a,0x7d,0x61,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1617d2a <unknown>
bfmls za.h[w11, 2], {z9.h - z10.h}, z1.h // 11000001-01100001-01111101-00101010
// CHECK-INST: bfmls za.h[w11, 2, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x2a,0x7d,0x61,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1617d2a <unknown>
bfmls za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00111101-10001111
// CHECK-INST: bfmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x8f,0x3d,0x6b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16b3d8f <unknown>
bfmls za.h[w9, 7], {z12.h - z13.h}, z11.h // 11000001-01101011-00111101-10001111
// CHECK-INST: bfmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x8f,0x3d,0x6b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c16b3d8f <unknown>
bfmls za.h[w8, 0, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-00010000-00010000-00110000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x30,0x10,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101030 <unknown>
bfmls za.h[w8, 0], {z0.h - z1.h}, z0.h[0] // 11000001-00010000-00010000-00110000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x30,0x10,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101030 <unknown>
bfmls za.h[w10, 5, vgx2], {z10.h, z11.h}, z5.h[2] // 11000001-00010101-01010101-01110101
// CHECK-INST: bfmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2]
// CHECK-ENCODING: [0x75,0x55,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1155575 <unknown>
bfmls za.h[w10, 5], {z10.h - z11.h}, z5.h[2] // 11000001-00010101-01010101-01110101
// CHECK-INST: bfmls za.h[w10, 5, vgx2], { z10.h, z11.h }, z5.h[2]
// CHECK-ENCODING: [0x75,0x55,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1155575 <unknown>
bfmls za.h[w11, 7, vgx2], {z12.h, z13.h}, z8.h[6] // 11000001-00011000-01111101-10110111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6]
// CHECK-ENCODING: [0xb7,0x7d,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1187db7 <unknown>
bfmls za.h[w11, 7], {z12.h - z13.h}, z8.h[6] // 11000001-00011000-01111101-10110111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z12.h, z13.h }, z8.h[6]
// CHECK-ENCODING: [0xb7,0x7d,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1187db7 <unknown>
bfmls za.h[w11, 7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-00011111-01111111-11111111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xff,0x7f,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11f7fff <unknown>
bfmls za.h[w11, 7], {z30.h - z31.h}, z15.h[7] // 11000001-00011111-01111111-11111111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xff,0x7f,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11f7fff <unknown>
bfmls za.h[w8, 5, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-00010000-00011110-00110101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x35,0x1e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101e35 <unknown>
bfmls za.h[w8, 5], {z16.h - z17.h}, z0.h[6] // 11000001-00010000-00011110-00110101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x35,0x1e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1101e35 <unknown>
bfmls za.h[w8, 1, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-00011110-00010100-00110001
// CHECK-INST: bfmls za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x31,0x14,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1431 <unknown>
bfmls za.h[w8, 1], {z0.h - z1.h}, z14.h[2] // 11000001-00011110-00010100-00110001
// CHECK-INST: bfmls za.h[w8, 1, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x31,0x14,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1431 <unknown>
bfmls za.h[w10, 0, vgx2], {z18.h, z19.h}, z4.h[3] // 11000001-00010100-01010110-01111000
// CHECK-INST: bfmls za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3]
// CHECK-ENCODING: [0x78,0x56,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1145678 <unknown>
bfmls za.h[w10, 0], {z18.h - z19.h}, z4.h[3] // 11000001-00010100-01010110-01111000
// CHECK-INST: bfmls za.h[w10, 0, vgx2], { z18.h, z19.h }, z4.h[3]
// CHECK-ENCODING: [0x78,0x56,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1145678 <unknown>
bfmls za.h[w8, 0, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-00010010-00011001-10110000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0xb0,0x19,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11219b0 <unknown>
bfmls za.h[w8, 0], {z12.h - z13.h}, z2.h[4] // 11000001-00010010-00011001-10110000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0xb0,0x19,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11219b0 <unknown>
bfmls za.h[w10, 1, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-00011010-01011000-00110001
// CHECK-INST: bfmls za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x31,0x58,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11a5831 <unknown>
bfmls za.h[w10, 1], {z0.h - z1.h}, z10.h[4] // 11000001-00011010-01011000-00110001
// CHECK-INST: bfmls za.h[w10, 1, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x31,0x58,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11a5831 <unknown>
bfmls za.h[w8, 5, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-00011110-00011010-11111101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xfd,0x1a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1afd <unknown>
bfmls za.h[w8, 5], {z22.h - z23.h}, z14.h[5] // 11000001-00011110-00011010-11111101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xfd,0x1a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e1afd <unknown>
bfmls za.h[w11, 2, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-00010001-01110101-00110010
// CHECK-INST: bfmls za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x32,0x75,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1117532 <unknown>
bfmls za.h[w11, 2], {z8.h - z9.h}, z1.h[2] // 11000001-00010001-01110101-00110010
// CHECK-INST: bfmls za.h[w11, 2, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x32,0x75,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1117532 <unknown>
bfmls za.h[w9, 7, vgx2], {z12.h, z13.h}, z11.h[4] // 11000001-00011011-00111001-10110111
// CHECK-INST: bfmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4]
// CHECK-ENCODING: [0xb7,0x39,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11b39b7 <unknown>
bfmls za.h[w9, 7], {z12.h - z13.h}, z11.h[4] // 11000001-00011011-00111001-10110111
// CHECK-INST: bfmls za.h[w9, 7, vgx2], { z12.h, z13.h }, z11.h[4]
// CHECK-ENCODING: [0xb7,0x39,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11b39b7 <unknown>
bfmls za.h[w8, 0, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000-00010000-00011000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x10,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e01018 <unknown>
bfmls za.h[w8, 0], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00010000-00011000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x10,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e01018 <unknown>
bfmls za.h[w10, 5, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100-01010001-01011101
// CHECK-INST: bfmls za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x5d,0x51,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f4515d <unknown>
bfmls za.h[w10, 5], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01010001-01011101
// CHECK-INST: bfmls za.h[w10, 5, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x5d,0x51,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f4515d <unknown>
bfmls za.h[w11, 7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000-01110001-10011111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x9f,0x71,0xe8,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e8719f <unknown>
bfmls za.h[w11, 7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01110001-10011111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x9f,0x71,0xe8,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e8719f <unknown>
bfmls za.h[w11, 7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110-01110011-11011111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdf,0x73,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe73df <unknown>
bfmls za.h[w11, 7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01110011-11011111
// CHECK-INST: bfmls za.h[w11, 7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdf,0x73,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe73df <unknown>
bfmls za.h[w8, 5, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000-00010010-00011101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x1d,0x12,0xf0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f0121d <unknown>
bfmls za.h[w8, 5], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00010010-00011101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x1d,0x12,0xf0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f0121d <unknown>
bfmls za.h[w8, 1, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110-00010000-00011001
// CHECK-INST: bfmls za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x10,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe1019 <unknown>
bfmls za.h[w8, 1], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00010000-00011001
// CHECK-INST: bfmls za.h[w8, 1, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x10,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe1019 <unknown>
bfmls za.h[w10, 0, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100-01010010-01011000
// CHECK-INST: bfmls za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x52,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f45258 <unknown>
bfmls za.h[w10, 0], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01010010-01011000
// CHECK-INST: bfmls za.h[w10, 0, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x52,0xf4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f45258 <unknown>
bfmls za.h[w8, 0, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010-00010001-10011000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x11,0xe2,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e21198 <unknown>
bfmls za.h[w8, 0], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00010001-10011000
// CHECK-INST: bfmls za.h[w8, 0, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x11,0xe2,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e21198 <unknown>
bfmls za.h[w10, 1, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010-01010000-00011001
// CHECK-INST: bfmls za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x50,0xfa,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fa5019 <unknown>
bfmls za.h[w10, 1], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01010000-00011001
// CHECK-INST: bfmls za.h[w10, 1, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x50,0xfa,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fa5019 <unknown>
bfmls za.h[w8, 5, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110-00010010-11011101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdd,0x12,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe12dd <unknown>
bfmls za.h[w8, 5], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00010010-11011101
// CHECK-INST: bfmls za.h[w8, 5, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdd,0x12,0xfe,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fe12dd <unknown>
bfmls za.h[w11, 2, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000-01110001-00011010
// CHECK-INST: bfmls za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x1a,0x71,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e0711a <unknown>
bfmls za.h[w11, 2], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01110001-00011010
// CHECK-INST: bfmls za.h[w11, 2, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x1a,0x71,0xe0,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e0711a <unknown>
bfmls za.h[w9, 7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010-00110001-10011111
// CHECK-INST: bfmls za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x9f,0x31,0xea,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1ea319f <unknown>
bfmls za.h[w9, 7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00110001-10011111
// CHECK-INST: bfmls za.h[w9, 7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x9f,0x31,0xea,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1ea319f <unknown>
bfmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h // 11000001-01110000-00011100-00001000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h
// CHECK-ENCODING: [0x08,0x1c,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701c08 <unknown>
bfmls za.h[w8, 0], {z0.h - z3.h}, z0.h // 11000001-01110000-00011100-00001000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h
// CHECK-ENCODING: [0x08,0x1c,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701c08 <unknown>
bfmls za.h[w10, 5, vgx4], {z10.h - z13.h}, z5.h // 11000001-01110101-01011101-01001101
// CHECK-INST: bfmls za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h
// CHECK-ENCODING: [0x4d,0x5d,0x75,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1755d4d <unknown>
bfmls za.h[w10, 5], {z10.h - z13.h}, z5.h // 11000001-01110101-01011101-01001101
// CHECK-INST: bfmls za.h[w10, 5, vgx4], { z10.h - z13.h }, z5.h
// CHECK-ENCODING: [0x4d,0x5d,0x75,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1755d4d <unknown>
bfmls za.h[w11, 7, vgx4], {z13.h - z16.h}, z8.h // 11000001-01111000-01111101-10101111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h
// CHECK-ENCODING: [0xaf,0x7d,0x78,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1787daf <unknown>
bfmls za.h[w11, 7], {z13.h - z16.h}, z8.h // 11000001-01111000-01111101-10101111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z13.h - z16.h }, z8.h
// CHECK-ENCODING: [0xaf,0x7d,0x78,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1787daf <unknown>
bfmls za.h[w11, 7, vgx4], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-01111111-01111111-11101111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h
// CHECK-ENCODING: [0xef,0x7f,0x7f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17f7fef <unknown>
bfmls za.h[w11, 7], {z31.h, z0.h, z1.h, z2.h}, z15.h // 11000001-01111111-01111111-11101111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z31.h, z0.h, z1.h, z2.h }, z15.h
// CHECK-ENCODING: [0xef,0x7f,0x7f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17f7fef <unknown>
bfmls za.h[w8, 5, vgx4], {z17.h - z20.h}, z0.h // 11000001-01110000-00011110-00101101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h
// CHECK-ENCODING: [0x2d,0x1e,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701e2d <unknown>
bfmls za.h[w8, 5], {z17.h - z20.h}, z0.h // 11000001-01110000-00011110-00101101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z17.h - z20.h }, z0.h
// CHECK-ENCODING: [0x2d,0x1e,0x70,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1701e2d <unknown>
bfmls za.h[w8, 1, vgx4], {z1.h - z4.h}, z14.h // 11000001-01111110-00011100-00101001
// CHECK-INST: bfmls za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h
// CHECK-ENCODING: [0x29,0x1c,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1c29 <unknown>
bfmls za.h[w8, 1], {z1.h - z4.h}, z14.h // 11000001-01111110-00011100-00101001
// CHECK-INST: bfmls za.h[w8, 1, vgx4], { z1.h - z4.h }, z14.h
// CHECK-ENCODING: [0x29,0x1c,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1c29 <unknown>
bfmls za.h[w10, 0, vgx4], {z19.h - z22.h}, z4.h // 11000001-01110100-01011110-01101000
// CHECK-INST: bfmls za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h
// CHECK-ENCODING: [0x68,0x5e,0x74,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1745e68 <unknown>
bfmls za.h[w10, 0], {z19.h - z22.h}, z4.h // 11000001-01110100-01011110-01101000
// CHECK-INST: bfmls za.h[w10, 0, vgx4], { z19.h - z22.h }, z4.h
// CHECK-ENCODING: [0x68,0x5e,0x74,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1745e68 <unknown>
bfmls za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h // 11000001-01110010-00011101-10001000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h
// CHECK-ENCODING: [0x88,0x1d,0x72,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1721d88 <unknown>
bfmls za.h[w8, 0], {z12.h - z15.h}, z2.h // 11000001-01110010-00011101-10001000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h
// CHECK-ENCODING: [0x88,0x1d,0x72,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1721d88 <unknown>
bfmls za.h[w10, 1, vgx4], {z1.h - z4.h}, z10.h // 11000001-01111010-01011100-00101001
// CHECK-INST: bfmls za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h
// CHECK-ENCODING: [0x29,0x5c,0x7a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17a5c29 <unknown>
bfmls za.h[w10, 1], {z1.h - z4.h}, z10.h // 11000001-01111010-01011100-00101001
// CHECK-INST: bfmls za.h[w10, 1, vgx4], { z1.h - z4.h }, z10.h
// CHECK-ENCODING: [0x29,0x5c,0x7a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17a5c29 <unknown>
bfmls za.h[w8, 5, vgx4], {z22.h - z25.h}, z14.h // 11000001-01111110-00011110-11001101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h
// CHECK-ENCODING: [0xcd,0x1e,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1ecd <unknown>
bfmls za.h[w8, 5], {z22.h - z25.h}, z14.h // 11000001-01111110-00011110-11001101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z22.h - z25.h }, z14.h
// CHECK-ENCODING: [0xcd,0x1e,0x7e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17e1ecd <unknown>
bfmls za.h[w11, 2, vgx4], {z9.h - z12.h}, z1.h // 11000001-01110001-01111101-00101010
// CHECK-INST: bfmls za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h
// CHECK-ENCODING: [0x2a,0x7d,0x71,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1717d2a <unknown>
bfmls za.h[w11, 2], {z9.h - z12.h}, z1.h // 11000001-01110001-01111101-00101010
// CHECK-INST: bfmls za.h[w11, 2, vgx4], { z9.h - z12.h }, z1.h
// CHECK-ENCODING: [0x2a,0x7d,0x71,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1717d2a <unknown>
bfmls za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h // 11000001-01111011-00111101-10001111
// CHECK-INST: bfmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h
// CHECK-ENCODING: [0x8f,0x3d,0x7b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17b3d8f <unknown>
bfmls za.h[w9, 7], {z12.h - z15.h}, z11.h // 11000001-01111011-00111101-10001111
// CHECK-INST: bfmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h
// CHECK-ENCODING: [0x8f,0x3d,0x7b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c17b3d8f <unknown>
bfmls za.h[w8, 0, vgx4], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00110000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
// CHECK-ENCODING: [0x30,0x90,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109030 <unknown>
bfmls za.h[w8, 0], {z0.h - z3.h}, z0.h[0] // 11000001-00010000-10010000-00110000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z0.h - z3.h }, z0.h[0]
// CHECK-ENCODING: [0x30,0x90,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109030 <unknown>
bfmls za.h[w10, 5, vgx4], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00110101
// CHECK-INST: bfmls za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2]
// CHECK-ENCODING: [0x35,0xd5,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c115d535 <unknown>
bfmls za.h[w10, 5], {z8.h - z11.h}, z5.h[2] // 11000001-00010101-11010101-00110101
// CHECK-INST: bfmls za.h[w10, 5, vgx4], { z8.h - z11.h }, z5.h[2]
// CHECK-ENCODING: [0x35,0xd5,0x15,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c115d535 <unknown>
bfmls za.h[w11, 7, vgx4], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10110111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6]
// CHECK-ENCODING: [0xb7,0xfd,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c118fdb7 <unknown>
bfmls za.h[w11, 7], {z12.h - z15.h}, z8.h[6] // 11000001-00011000-11111101-10110111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z12.h - z15.h }, z8.h[6]
// CHECK-ENCODING: [0xb7,0xfd,0x18,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c118fdb7 <unknown>
bfmls za.h[w11, 7, vgx4], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10111111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7]
// CHECK-ENCODING: [0xbf,0xff,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11fffbf <unknown>
bfmls za.h[w11, 7], {z28.h - z31.h}, z15.h[7] // 11000001-00011111-11111111-10111111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z28.h - z31.h }, z15.h[7]
// CHECK-ENCODING: [0xbf,0xff,0x1f,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11fffbf <unknown>
bfmls za.h[w8, 5, vgx4], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00110101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6]
// CHECK-ENCODING: [0x35,0x9e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109e35 <unknown>
bfmls za.h[w8, 5], {z16.h - z19.h}, z0.h[6] // 11000001-00010000-10011110-00110101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z16.h - z19.h }, z0.h[6]
// CHECK-ENCODING: [0x35,0x9e,0x10,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1109e35 <unknown>
bfmls za.h[w8, 1, vgx4], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00110001
// CHECK-INST: bfmls za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2]
// CHECK-ENCODING: [0x31,0x94,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9431 <unknown>
bfmls za.h[w8, 1], {z0.h - z3.h}, z14.h[2] // 11000001-00011110-10010100-00110001
// CHECK-INST: bfmls za.h[w8, 1, vgx4], { z0.h - z3.h }, z14.h[2]
// CHECK-ENCODING: [0x31,0x94,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9431 <unknown>
bfmls za.h[w10, 0, vgx4], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00111000
// CHECK-INST: bfmls za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3]
// CHECK-ENCODING: [0x38,0xd6,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c114d638 <unknown>
bfmls za.h[w10, 0], {z16.h - z19.h}, z4.h[3] // 11000001-00010100-11010110-00111000
// CHECK-INST: bfmls za.h[w10, 0, vgx4], { z16.h - z19.h }, z4.h[3]
// CHECK-ENCODING: [0x38,0xd6,0x14,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c114d638 <unknown>
bfmls za.h[w8, 0, vgx4], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10110000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4]
// CHECK-ENCODING: [0xb0,0x99,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11299b0 <unknown>
bfmls za.h[w8, 0], {z12.h - z15.h}, z2.h[4] // 11000001-00010010-10011001-10110000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z12.h - z15.h }, z2.h[4]
// CHECK-ENCODING: [0xb0,0x99,0x12,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11299b0 <unknown>
bfmls za.h[w10, 1, vgx4], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00110001
// CHECK-INST: bfmls za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4]
// CHECK-ENCODING: [0x31,0xd8,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11ad831 <unknown>
bfmls za.h[w10, 1], {z0.h - z3.h}, z10.h[4] // 11000001-00011010-11011000-00110001
// CHECK-INST: bfmls za.h[w10, 1, vgx4], { z0.h - z3.h }, z10.h[4]
// CHECK-ENCODING: [0x31,0xd8,0x1a,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11ad831 <unknown>
bfmls za.h[w8, 5, vgx4], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10111101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5]
// CHECK-ENCODING: [0xbd,0x9a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9abd <unknown>
bfmls za.h[w8, 5], {z20.h - z23.h}, z14.h[5] // 11000001-00011110-10011010-10111101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z20.h - z23.h }, z14.h[5]
// CHECK-ENCODING: [0xbd,0x9a,0x1e,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11e9abd <unknown>
bfmls za.h[w11, 2, vgx4], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00110010
// CHECK-INST: bfmls za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2]
// CHECK-ENCODING: [0x32,0xf5,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c111f532 <unknown>
bfmls za.h[w11, 2], {z8.h - z11.h}, z1.h[2] // 11000001-00010001-11110101-00110010
// CHECK-INST: bfmls za.h[w11, 2, vgx4], { z8.h - z11.h }, z1.h[2]
// CHECK-ENCODING: [0x32,0xf5,0x11,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c111f532 <unknown>
bfmls za.h[w9, 7, vgx4], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10110111
// CHECK-INST: bfmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4]
// CHECK-ENCODING: [0xb7,0xb9,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11bb9b7 <unknown>
bfmls za.h[w9, 7], {z12.h - z15.h}, z11.h[4] // 11000001-00011011-10111001-10110111
// CHECK-INST: bfmls za.h[w9, 7, vgx4], { z12.h - z15.h }, z11.h[4]
// CHECK-ENCODING: [0xb7,0xb9,0x1b,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c11bb9b7 <unknown>
bfmls za.h[w8, 0, vgx4], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-11100001-00010000-00011000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x18,0x10,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11018 <unknown>
bfmls za.h[w8, 0], {z0.h - z3.h}, {z0.h - z3.h} // 11000001-11100001-00010000-00011000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z0.h - z3.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x18,0x10,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11018 <unknown>
bfmls za.h[w10, 5, vgx4], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-11110101-01010001-00011101
// CHECK-INST: bfmls za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x1d,0x51,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f5511d <unknown>
bfmls za.h[w10, 5], {z8.h - z11.h}, {z20.h - z23.h} // 11000001-11110101-01010001-00011101
// CHECK-INST: bfmls za.h[w10, 5, vgx4], { z8.h - z11.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x1d,0x51,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f5511d <unknown>
bfmls za.h[w11, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-01110001-10011111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x9f,0x71,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9719f <unknown>
bfmls za.h[w11, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-01110001-10011111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x9f,0x71,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9719f <unknown>
bfmls za.h[w11, 7, vgx4], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-11111101-01110011-10011111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x9f,0x73,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd739f <unknown>
bfmls za.h[w11, 7], {z28.h - z31.h}, {z28.h - z31.h} // 11000001-11111101-01110011-10011111
// CHECK-INST: bfmls za.h[w11, 7, vgx4], { z28.h - z31.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x9f,0x73,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd739f <unknown>
bfmls za.h[w8, 5, vgx4], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-11110001-00010010-00011101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }
// CHECK-ENCODING: [0x1d,0x12,0xf1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f1121d <unknown>
bfmls za.h[w8, 5], {z16.h - z19.h}, {z16.h - z19.h} // 11000001-11110001-00010010-00011101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z16.h - z19.h }, { z16.h - z19.h }
// CHECK-ENCODING: [0x1d,0x12,0xf1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f1121d <unknown>
bfmls za.h[w8, 1, vgx4], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-11111101-00010000-00011001
// CHECK-INST: bfmls za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x19,0x10,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd1019 <unknown>
bfmls za.h[w8, 1], {z0.h - z3.h}, {z28.h - z31.h} // 11000001-11111101-00010000-00011001
// CHECK-INST: bfmls za.h[w8, 1, vgx4], { z0.h - z3.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x19,0x10,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd1019 <unknown>
bfmls za.h[w10, 0, vgx4], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-11110101-01010010-00011000
// CHECK-INST: bfmls za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x18,0x52,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f55218 <unknown>
bfmls za.h[w10, 0], {z16.h - z19.h}, {z20.h - z23.h} // 11000001-11110101-01010010-00011000
// CHECK-INST: bfmls za.h[w10, 0, vgx4], { z16.h - z19.h }, { z20.h - z23.h }
// CHECK-ENCODING: [0x18,0x52,0xf5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f55218 <unknown>
bfmls za.h[w8, 0, vgx4], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-11100001-00010001-10011000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x98,0x11,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11198 <unknown>
bfmls za.h[w8, 0], {z12.h - z15.h}, {z0.h - z3.h} // 11000001-11100001-00010001-10011000
// CHECK-INST: bfmls za.h[w8, 0, vgx4], { z12.h - z15.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x98,0x11,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e11198 <unknown>
bfmls za.h[w10, 1, vgx4], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-11111001-01010000-00011001
// CHECK-INST: bfmls za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }
// CHECK-ENCODING: [0x19,0x50,0xf9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f95019 <unknown>
bfmls za.h[w10, 1], {z0.h - z3.h}, {z24.h - z27.h} // 11000001-11111001-01010000-00011001
// CHECK-INST: bfmls za.h[w10, 1, vgx4], { z0.h - z3.h }, { z24.h - z27.h }
// CHECK-ENCODING: [0x19,0x50,0xf9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1f95019 <unknown>
bfmls za.h[w8, 5, vgx4], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-11111101-00010010-10011101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x9d,0x12,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd129d <unknown>
bfmls za.h[w8, 5], {z20.h - z23.h}, {z28.h - z31.h} // 11000001-11111101-00010010-10011101
// CHECK-INST: bfmls za.h[w8, 5, vgx4], { z20.h - z23.h }, { z28.h - z31.h }
// CHECK-ENCODING: [0x9d,0x12,0xfd,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1fd129d <unknown>
bfmls za.h[w11, 2, vgx4], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-11100001-01110001-00011010
// CHECK-INST: bfmls za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x1a,0x71,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e1711a <unknown>
bfmls za.h[w11, 2], {z8.h - z11.h}, {z0.h - z3.h} // 11000001-11100001-01110001-00011010
// CHECK-INST: bfmls za.h[w11, 2, vgx4], { z8.h - z11.h }, { z0.h - z3.h }
// CHECK-ENCODING: [0x1a,0x71,0xe1,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e1711a <unknown>
bfmls za.h[w9, 7, vgx4], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-00110001-10011111
// CHECK-INST: bfmls za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x9f,0x31,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9319f <unknown>
bfmls za.h[w9, 7], {z12.h - z15.h}, {z8.h - z11.h} // 11000001-11101001-00110001-10011111
// CHECK-INST: bfmls za.h[w9, 7, vgx4], { z12.h - z15.h }, { z8.h - z11.h }
// CHECK-ENCODING: [0x9f,0x31,0xe9,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e9319f <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s b/llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
index e6d208db9ac144..58ba20defe3bc0 100644
--- a/llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/bfmopa-diagnostics.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 2>&1 < %s | FileCheck %s
// --------------------------------------------------------------------------//
// Invalid predicate register
diff --git a/llvm/test/MC/AArch64/SME2/bfmopa.s b/llvm/test/MC/AArch64/SME2/bfmopa.s
index 2a9b1e5354ac4f..d347bd5f39cf90 100644
--- a/llvm/test/MC/AArch64/SME2/bfmopa.s
+++ b/llvm/test/MC/AArch64/SME2/bfmopa.s
@@ -1,84 +1,84 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
-// RUN: | llvm-objdump -d --mattr=+sme2,+b16b16 - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
+// RUN: | llvm-objdump -d --mattr=+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2,+b16b16 -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-b16b16 -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
bfmopa za0.h, p0/m, p0/m, z0.h, z0.h // 10000001-10100000-00000000-00001000
// CHECK-INST: bfmopa za0.h, p0/m, p0/m, z0.h, z0.h
// CHECK-ENCODING: [0x08,0x00,0xa0,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a00008 <unknown>
bfmopa za1.h, p5/m, p2/m, z10.h, z21.h // 10000001-10110101-01010101-01001001
// CHECK-INST: bfmopa za1.h, p5/m, p2/m, z10.h, z21.h
// CHECK-ENCODING: [0x49,0x55,0xb5,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81b55549 <unknown>
bfmopa za1.h, p3/m, p7/m, z13.h, z8.h // 10000001-10101000-11101101-10101001
// CHECK-INST: bfmopa za1.h, p3/m, p7/m, z13.h, z8.h
// CHECK-ENCODING: [0xa9,0xed,0xa8,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a8eda9 <unknown>
bfmopa za1.h, p7/m, p7/m, z31.h, z31.h // 10000001-10111111-11111111-11101001
// CHECK-INST: bfmopa za1.h, p7/m, p7/m, z31.h, z31.h
// CHECK-ENCODING: [0xe9,0xff,0xbf,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81bfffe9 <unknown>
bfmopa za1.h, p3/m, p0/m, z17.h, z16.h // 10000001-10110000-00001110-00101001
// CHECK-INST: bfmopa za1.h, p3/m, p0/m, z17.h, z16.h
// CHECK-ENCODING: [0x29,0x0e,0xb0,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81b00e29 <unknown>
bfmopa za1.h, p1/m, p4/m, z1.h, z30.h // 10000001-10111110-10000100-00101001
// CHECK-INST: bfmopa za1.h, p1/m, p4/m, z1.h, z30.h
// CHECK-ENCODING: [0x29,0x84,0xbe,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81be8429 <unknown>
bfmopa za0.h, p5/m, p2/m, z19.h, z20.h // 10000001-10110100-01010110-01101000
// CHECK-INST: bfmopa za0.h, p5/m, p2/m, z19.h, z20.h
// CHECK-ENCODING: [0x68,0x56,0xb4,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81b45668 <unknown>
bfmopa za0.h, p6/m, p0/m, z12.h, z2.h // 10000001-10100010-00011001-10001000
// CHECK-INST: bfmopa za0.h, p6/m, p0/m, z12.h, z2.h
// CHECK-ENCODING: [0x88,0x19,0xa2,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a21988 <unknown>
bfmopa za1.h, p2/m, p6/m, z1.h, z26.h // 10000001-10111010-11001000-00101001
// CHECK-INST: bfmopa za1.h, p2/m, p6/m, z1.h, z26.h
// CHECK-ENCODING: [0x29,0xc8,0xba,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81bac829 <unknown>
bfmopa za1.h, p2/m, p0/m, z22.h, z30.h // 10000001-10111110-00001010-11001001
// CHECK-INST: bfmopa za1.h, p2/m, p0/m, z22.h, z30.h
// CHECK-ENCODING: [0xc9,0x0a,0xbe,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81be0ac9 <unknown>
bfmopa za0.h, p5/m, p7/m, z9.h, z1.h // 10000001-10100001-11110101-00101000
// CHECK-INST: bfmopa za0.h, p5/m, p7/m, z9.h, z1.h
// CHECK-ENCODING: [0x28,0xf5,0xa1,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a1f528 <unknown>
bfmopa za1.h, p2/m, p5/m, z12.h, z11.h // 10000001-10101011-10101001-10001001
// CHECK-INST: bfmopa za1.h, p2/m, p5/m, z12.h, z11.h
// CHECK-ENCODING: [0x89,0xa9,0xab,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81aba989 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s b/llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
index 14c25dea8e795d..fa8390dce4ef11 100644
--- a/llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/bfmops-diagnostics.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 2>&1 < %s | FileCheck %s
// --------------------------------------------------------------------------//
// Invalid predicate register
diff --git a/llvm/test/MC/AArch64/SME2/bfmops.s b/llvm/test/MC/AArch64/SME2/bfmops.s
index 2b76986d10dd99..f0f6afd0e7ff3a 100644
--- a/llvm/test/MC/AArch64/SME2/bfmops.s
+++ b/llvm/test/MC/AArch64/SME2/bfmops.s
@@ -1,84 +1,84 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
-// RUN: | llvm-objdump -d --mattr=+sme2,+b16b16 - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
+// RUN: | llvm-objdump -d --mattr=+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2,+b16b16 -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-b16b16 -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
bfmops za0.h, p0/m, p0/m, z0.h, z0.h // 10000001-10100000-00000000-00011000
// CHECK-INST: bfmops za0.h, p0/m, p0/m, z0.h, z0.h
// CHECK-ENCODING: [0x18,0x00,0xa0,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a00018 <unknown>
bfmops za1.h, p5/m, p2/m, z10.h, z21.h // 10000001-10110101-01010101-01011001
// CHECK-INST: bfmops za1.h, p5/m, p2/m, z10.h, z21.h
// CHECK-ENCODING: [0x59,0x55,0xb5,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81b55559 <unknown>
bfmops za1.h, p3/m, p7/m, z13.h, z8.h // 10000001-10101000-11101101-10111001
// CHECK-INST: bfmops za1.h, p3/m, p7/m, z13.h, z8.h
// CHECK-ENCODING: [0xb9,0xed,0xa8,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a8edb9 <unknown>
bfmops za1.h, p7/m, p7/m, z31.h, z31.h // 10000001-10111111-11111111-11111001
// CHECK-INST: bfmops za1.h, p7/m, p7/m, z31.h, z31.h
// CHECK-ENCODING: [0xf9,0xff,0xbf,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81bffff9 <unknown>
bfmops za1.h, p3/m, p0/m, z17.h, z16.h // 10000001-10110000-00001110-00111001
// CHECK-INST: bfmops za1.h, p3/m, p0/m, z17.h, z16.h
// CHECK-ENCODING: [0x39,0x0e,0xb0,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81b00e39 <unknown>
bfmops za1.h, p1/m, p4/m, z1.h, z30.h // 10000001-10111110-10000100-00111001
// CHECK-INST: bfmops za1.h, p1/m, p4/m, z1.h, z30.h
// CHECK-ENCODING: [0x39,0x84,0xbe,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81be8439 <unknown>
bfmops za0.h, p5/m, p2/m, z19.h, z20.h // 10000001-10110100-01010110-01111000
// CHECK-INST: bfmops za0.h, p5/m, p2/m, z19.h, z20.h
// CHECK-ENCODING: [0x78,0x56,0xb4,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81b45678 <unknown>
bfmops za0.h, p6/m, p0/m, z12.h, z2.h // 10000001-10100010-00011001-10011000
// CHECK-INST: bfmops za0.h, p6/m, p0/m, z12.h, z2.h
// CHECK-ENCODING: [0x98,0x19,0xa2,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a21998 <unknown>
bfmops za1.h, p2/m, p6/m, z1.h, z26.h // 10000001-10111010-11001000-00111001
// CHECK-INST: bfmops za1.h, p2/m, p6/m, z1.h, z26.h
// CHECK-ENCODING: [0x39,0xc8,0xba,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81bac839 <unknown>
bfmops za1.h, p2/m, p0/m, z22.h, z30.h // 10000001-10111110-00001010-11011001
// CHECK-INST: bfmops za1.h, p2/m, p0/m, z22.h, z30.h
// CHECK-ENCODING: [0xd9,0x0a,0xbe,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81be0ad9 <unknown>
bfmops za0.h, p5/m, p7/m, z9.h, z1.h // 10000001-10100001-11110101-00111000
// CHECK-INST: bfmops za0.h, p5/m, p7/m, z9.h, z1.h
// CHECK-ENCODING: [0x38,0xf5,0xa1,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81a1f538 <unknown>
bfmops za1.h, p2/m, p5/m, z12.h, z11.h // 10000001-10101011-10101001-10011001
// CHECK-INST: bfmops za1.h, p2/m, p5/m, z12.h, z11.h
// CHECK-ENCODING: [0x99,0xa9,0xab,0x81]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: 81aba999 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s b/llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
index 5dade3e7ed2f3c..74a2fe174ae9fe 100644
--- a/llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
+++ b/llvm/test/MC/AArch64/SME2/bfsub-diagnostics.s
@@ -1,4 +1,4 @@
-// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 2>&1 < %s | FileCheck %s
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 2>&1 < %s | FileCheck %s
// --------------------------------------------------------------------------//
// Out of range index offset
diff --git a/llvm/test/MC/AArch64/SME2/bfsub.s b/llvm/test/MC/AArch64/SME2/bfsub.s
index 6cfd5073b3bcac..e19d316e955c77 100644
--- a/llvm/test/MC/AArch64/SME2/bfsub.s
+++ b/llvm/test/MC/AArch64/SME2/bfsub.s
@@ -1,300 +1,300 @@
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
// RUN: | FileCheck %s --check-prefix=CHECK-ERROR
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
-// RUN: | llvm-objdump -d --mattr=+sme2,+b16b16 - | FileCheck %s --check-prefix=CHECK-INST
-// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
+// RUN: | llvm-objdump -d --mattr=+sme-b16b16 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme-b16b16 < %s \
// RUN: | llvm-objdump -d --mattr=-sme2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2,+b16b16 < %s \
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme-b16b16 < %s \
// RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
-// RUN: | llvm-mc -triple=aarch64 -mattr=+sme2,+b16b16 -disassemble -show-encoding \
+// RUN: | llvm-mc -triple=aarch64 -mattr=+sme-b16b16 -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
bfsub za.h[w8, 0, vgx2], {z0.h, z1.h} // 11000001-11100100-00011100-00001000
// CHECK-INST: bfsub za.h[w8, 0, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c08 <unknown>
bfsub za.h[w8, 0], {z0.h - z1.h} // 11000001-11100100-00011100-00001000
// CHECK-INST: bfsub za.h[w8, 0, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c08 <unknown>
bfsub za.h[w10, 5, vgx2], {z10.h, z11.h} // 11000001-11100100-01011101-01001101
// CHECK-INST: bfsub za.h[w10, 5, vgx2], { z10.h, z11.h }
// CHECK-ENCODING: [0x4d,0x5d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45d4d <unknown>
bfsub za.h[w10, 5], {z10.h - z11.h} // 11000001-11100100-01011101-01001101
// CHECK-INST: bfsub za.h[w10, 5, vgx2], { z10.h, z11.h }
// CHECK-ENCODING: [0x4d,0x5d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45d4d <unknown>
bfsub za.h[w11, 7, vgx2], {z12.h, z13.h} // 11000001-11100100-01111101-10001111
// CHECK-INST: bfsub za.h[w11, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x8f,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d8f <unknown>
bfsub za.h[w11, 7], {z12.h - z13.h} // 11000001-11100100-01111101-10001111
// CHECK-INST: bfsub za.h[w11, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x8f,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d8f <unknown>
bfsub za.h[w11, 7, vgx2], {z30.h, z31.h} // 11000001-11100100-01111111-11001111
// CHECK-INST: bfsub za.h[w11, 7, vgx2], { z30.h, z31.h }
// CHECK-ENCODING: [0xcf,0x7f,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47fcf <unknown>
bfsub za.h[w11, 7], {z30.h - z31.h} // 11000001-11100100-01111111-11001111
// CHECK-INST: bfsub za.h[w11, 7, vgx2], { z30.h, z31.h }
// CHECK-ENCODING: [0xcf,0x7f,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47fcf <unknown>
bfsub za.h[w8, 5, vgx2], {z16.h, z17.h} // 11000001-11100100-00011110-00001101
// CHECK-INST: bfsub za.h[w8, 5, vgx2], { z16.h, z17.h }
// CHECK-ENCODING: [0x0d,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41e0d <unknown>
bfsub za.h[w8, 5], {z16.h - z17.h} // 11000001-11100100-00011110-00001101
// CHECK-INST: bfsub za.h[w8, 5, vgx2], { z16.h, z17.h }
// CHECK-ENCODING: [0x0d,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41e0d <unknown>
bfsub za.h[w8, 1, vgx2], {z0.h, z1.h} // 11000001-11100100-00011100-00001001
// CHECK-INST: bfsub za.h[w8, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x09,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c09 <unknown>
bfsub za.h[w8, 1], {z0.h - z1.h} // 11000001-11100100-00011100-00001001
// CHECK-INST: bfsub za.h[w8, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x09,0x1c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41c09 <unknown>
bfsub za.h[w10, 0, vgx2], {z18.h, z19.h} // 11000001-11100100-01011110, 01001000
// CHECK-INST: bfsub za.h[w10, 0, vgx2], { z18.h, z19.h }
// CHECK-ENCODING: [0x48,0x5e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45e48 <unknown>
bfsub za.h[w10, 0], {z18.h - z19.h} // 11000001-11100100-01011110-01001000
// CHECK-INST: bfsub za.h[w10, 0, vgx2], { z18.h, z19.h }
// CHECK-ENCODING: [0x48,0x5e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45e48 <unknown>
bfsub za.h[w8, 0, vgx2], {z12.h, z13.h} // 11000001-11100100-00011101-10001000
// CHECK-INST: bfsub za.h[w8, 0, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x88,0x1d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41d88 <unknown>
bfsub za.h[w8, 0], {z12.h - z13.h} // 11000001-11100100-00011101-10001000
// CHECK-INST: bfsub za.h[w8, 0, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x88,0x1d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41d88 <unknown>
bfsub za.h[w10, 1, vgx2], {z0.h, z1.h} // 11000001-11100100-01011100-00001001
// CHECK-INST: bfsub za.h[w10, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x09,0x5c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45c09 <unknown>
bfsub za.h[w10, 1], {z0.h - z1.h} // 11000001-11100100-01011100-00001001
// CHECK-INST: bfsub za.h[w10, 1, vgx2], { z0.h, z1.h }
// CHECK-ENCODING: [0x09,0x5c,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e45c09 <unknown>
bfsub za.h[w8, 5, vgx2], {z22.h, z23.h} // 11000001-11100100-00011110, 11001101
// CHECK-INST: bfsub za.h[w8, 5, vgx2], { z22.h, z23.h }
// CHECK-ENCODING: [0xcd,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41ecd <unknown>
bfsub za.h[w8, 5], {z22.h - z23.h} // 11000001-11100100-00011110-11001101
// CHECK-INST: bfsub za.h[w8, 5, vgx2], { z22.h, z23.h }
// CHECK-ENCODING: [0xcd,0x1e,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e41ecd <unknown>
bfsub za.h[w11, 2, vgx2], {z8.h, z9.h} // 11000001-11100100-01111101-00001010
// CHECK-INST: bfsub za.h[w11, 2, vgx2], { z8.h, z9.h }
// CHECK-ENCODING: [0x0a,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d0a <unknown>
bfsub za.h[w11, 2], {z8.h - z9.h} // 11000001-11100100-01111101-00001010
// CHECK-INST: bfsub za.h[w11, 2, vgx2], { z8.h, z9.h }
// CHECK-ENCODING: [0x0a,0x7d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e47d0a <unknown>
bfsub za.h[w9, 7, vgx2], {z12.h, z13.h} // 11000001-11100100-00111101-10001111
// CHECK-INST: bfsub za.h[w9, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x8f,0x3d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e43d8f <unknown>
bfsub za.h[w9, 7], {z12.h - z13.h} // 11000001-11100100-00111101-10001111
// CHECK-INST: bfsub za.h[w9, 7, vgx2], { z12.h, z13.h }
// CHECK-ENCODING: [0x8f,0x3d,0xe4,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e43d8f <unknown>
bfsub za.h[w8, 0, vgx4], {z0.h - z3.h} // 11000001-11100101-00011100-00001000
// CHECK-INST: bfsub za.h[w8, 0, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x08,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c08 <unknown>
bfsub za.h[w8, 0], {z0.h - z3.h} // 11000001-11100101-00011100-00001000
// CHECK-INST: bfsub za.h[w8, 0, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x08,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c08 <unknown>
bfsub za.h[w10, 5, vgx4], {z8.h - z11.h} // 11000001-11100101-01011101-00001101
// CHECK-INST: bfsub za.h[w10, 5, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x0d,0x5d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55d0d <unknown>
bfsub za.h[w10, 5], {z8.h - z11.h} // 11000001-11100101-01011101-00001101
// CHECK-INST: bfsub za.h[w10, 5, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x0d,0x5d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55d0d <unknown>
bfsub za.h[w11, 7, vgx4], {z12.h - z15.h} // 11000001-11100101-01111101-10001111
// CHECK-INST: bfsub za.h[w11, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x8f,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d8f <unknown>
bfsub za.h[w11, 7], {z12.h - z15.h} // 11000001-11100101-01111101-10001111
// CHECK-INST: bfsub za.h[w11, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x8f,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d8f <unknown>
bfsub za.h[w11, 7, vgx4], {z28.h - z31.h} // 11000001-11100101-01111111-10001111
// CHECK-INST: bfsub za.h[w11, 7, vgx4], { z28.h - z31.h }
// CHECK-ENCODING: [0x8f,0x7f,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57f8f <unknown>
bfsub za.h[w11, 7], {z28.h - z31.h} // 11000001-11100101-01111111-10001111
// CHECK-INST: bfsub za.h[w11, 7, vgx4], { z28.h - z31.h }
// CHECK-ENCODING: [0x8f,0x7f,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57f8f <unknown>
bfsub za.h[w8, 5, vgx4], {z16.h - z19.h} // 11000001-11100101-00011110-00001101
// CHECK-INST: bfsub za.h[w8, 5, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x0d,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e0d <unknown>
bfsub za.h[w8, 5], {z16.h - z19.h} // 11000001-11100101-00011110-00001101
// CHECK-INST: bfsub za.h[w8, 5, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x0d,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e0d <unknown>
bfsub za.h[w8, 1, vgx4], {z0.h - z3.h} // 11000001-11100101-00011100-00001001
// CHECK-INST: bfsub za.h[w8, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x09,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c09 <unknown>
bfsub za.h[w8, 1], {z0.h - z3.h} // 11000001-11100101-00011100-00001001
// CHECK-INST: bfsub za.h[w8, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x09,0x1c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51c09 <unknown>
bfsub za.h[w10, 0, vgx4], {z16.h - z19.h} // 11000001-11100101-01011110-00001000
// CHECK-INST: bfsub za.h[w10, 0, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x08,0x5e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55e08 <unknown>
bfsub za.h[w10, 0], {z16.h - z19.h} // 11000001-11100101-01011110-00001000
// CHECK-INST: bfsub za.h[w10, 0, vgx4], { z16.h - z19.h }
// CHECK-ENCODING: [0x08,0x5e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55e08 <unknown>
bfsub za.h[w8, 0, vgx4], {z12.h - z15.h} // 11000001-11100101-00011101-10001000
// CHECK-INST: bfsub za.h[w8, 0, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x88,0x1d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51d88 <unknown>
bfsub za.h[w8, 0], {z12.h - z15.h} // 11000001-11100101-00011101-10001000
// CHECK-INST: bfsub za.h[w8, 0, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x88,0x1d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51d88 <unknown>
bfsub za.h[w10, 1, vgx4], {z0.h - z3.h} // 11000001-11100101-01011100-00001001
// CHECK-INST: bfsub za.h[w10, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x09,0x5c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55c09 <unknown>
bfsub za.h[w10, 1], {z0.h - z3.h} // 11000001-11100101-01011100-00001001
// CHECK-INST: bfsub za.h[w10, 1, vgx4], { z0.h - z3.h }
// CHECK-ENCODING: [0x09,0x5c,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e55c09 <unknown>
bfsub za.h[w8, 5, vgx4], {z20.h - z23.h} // 11000001-11100101-00011110-10001101
// CHECK-INST: bfsub za.h[w8, 5, vgx4], { z20.h - z23.h }
// CHECK-ENCODING: [0x8d,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e8d <unknown>
bfsub za.h[w8, 5], {z20.h - z23.h} // 11000001-11100101-00011110-10001101
// CHECK-INST: bfsub za.h[w8, 5, vgx4], { z20.h - z23.h }
// CHECK-ENCODING: [0x8d,0x1e,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e51e8d <unknown>
bfsub za.h[w11, 2, vgx4], {z8.h - z11.h} // 11000001-11100101-01111101-00001010
// CHECK-INST: bfsub za.h[w11, 2, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x0a,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d0a <unknown>
bfsub za.h[w11, 2], {z8.h - z11.h} // 11000001-11100101-01111101-00001010
// CHECK-INST: bfsub za.h[w11, 2, vgx4], { z8.h - z11.h }
// CHECK-ENCODING: [0x0a,0x7d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e57d0a <unknown>
bfsub za.h[w9, 7, vgx4], {z12.h - z15.h} // 11000001-11100101-00111101-10001111
// CHECK-INST: bfsub za.h[w9, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x8f,0x3d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e53d8f <unknown>
bfsub za.h[w9, 7], {z12.h - z15.h} // 11000001-11100101-00111101-10001111
// CHECK-INST: bfsub za.h[w9, 7, vgx4], { z12.h - z15.h }
// CHECK-ENCODING: [0x8f,0x3d,0xe5,0xc1]
-// CHECK-ERROR: instruction requires: b16b16 sme2
+// CHECK-ERROR: instruction requires: sme-b16b16
// CHECK-UNKNOWN: c1e53d8f <unknown>
diff --git a/llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s b/llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
index 17d239b140662b..87ac6e3f34ae74 100644
--- a/llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
+++ b/llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
@@ -11,3 +11,9 @@ sqcvt z0.h, {z0.s, z1.s}
bfclamp { z0.h, z1.h }, z0.h, z0.h
// CHECK: error: instruction requires: sve-b16b16
// CHECK: bfclamp { z0.h, z1.h }, z0.h, z0.h
+
+.arch armv9-a+sme-b16b16
+.arch armv9-a+nosme-b16b16
+bfadd za.h[w8, 3], {z20.h-z21.h}
+// CHECK: error: instruction requires: sme-b16b16
+// CHECK: bfadd za.h[w8, 3], {z20.h-z21.h}
diff --git a/llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s b/llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
index 6a7301c66c08d9..84705d69ca362d 100644
--- a/llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
+++ b/llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
@@ -11,4 +11,10 @@ sqcvt z0.h, { z0.s, z1.s }
.arch_extension nosve-b16b16
bfclamp { z0.h, z1.h }, z0.h, z0.h
// CHECK: error: instruction requires: sve-b16b16
-// CHECK: bfclamp { z0.h, z1.h }, z0.h, z0.h
\ No newline at end of file
+// CHECK: bfclamp { z0.h, z1.h }, z0.h, z0.h
+
+.arch_extension sme-b16b16
+.arch_extension nosme-b16b16
+bfadd za.h[w8, 3], {z20.h-z21.h}
+// CHECK: error: instruction requires: sme-b16b16
+// CHECK: bfadd za.h[w8, 3], {z20.h-z21.h}
\ No newline at end of file
diff --git a/llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s b/llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
index 0e6e2e7b305f4e..297e8b7769750d 100644
--- a/llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
+++ b/llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
@@ -7,4 +7,8 @@ sqcvt z0.h, { z0.s, z1.s }
.arch_extension sme2
.arch_extension sve-b16b16
bfclamp { z0.h, z1.h }, z0.h, z0.h
-// CHECK: bfclamp { z0.h, z1.h }, z0.h, z0.h
\ No newline at end of file
+// CHECK: bfclamp { z0.h, z1.h }, z0.h, z0.h
+
+.arch_extension sme-b16b16
+bfadd za.h[w8, 3], {z20.h-z21.h}
+// CHECK: bfadd za.h[w8, 3, vgx2], { z20.h, z21.h }
\ No newline at end of file
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp
index 9efebeba067772..960a9892202b35 100644
--- a/llvm/unittests/TargetParser/TargetParserTest.cpp
+++ b/llvm/unittests/TargetParser/TargetParserTest.cpp
@@ -1993,7 +1993,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
AArch64::AEK_SMEI16I64, AArch64::AEK_SME2,
AArch64::AEK_HBC, AArch64::AEK_MOPS,
AArch64::AEK_PERFMON, AArch64::AEK_SVE2P1,
- AArch64::AEK_SME2P1, AArch64::AEK_B16B16,
+ AArch64::AEK_SME2P1, AArch64::AEK_SMEB16B16,
AArch64::AEK_SMEF16F16, AArch64::AEK_CSSC,
AArch64::AEK_RCPC3, AArch64::AEK_THE,
AArch64::AEK_D128, AArch64::AEK_LSE128,
@@ -2047,7 +2047,6 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
EXPECT_TRUE(llvm::is_contained(Features, "+sve2-sha3"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve2-bitperm"));
EXPECT_TRUE(llvm::is_contained(Features, "+sve2p1"));
- EXPECT_TRUE(llvm::is_contained(Features, "+b16b16"));
EXPECT_TRUE(llvm::is_contained(Features, "+rcpc"));
EXPECT_TRUE(llvm::is_contained(Features, "+rand"));
EXPECT_TRUE(llvm::is_contained(Features, "+mte"));
@@ -2068,6 +2067,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) {
EXPECT_TRUE(llvm::is_contained(Features, "+sme-i16i64"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme-f16f16"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme2"));
+ EXPECT_TRUE(llvm::is_contained(Features, "+sme-b16b16"));
EXPECT_TRUE(llvm::is_contained(Features, "+sme2p1"));
EXPECT_TRUE(llvm::is_contained(Features, "+hbc"));
EXPECT_TRUE(llvm::is_contained(Features, "+mops"));
@@ -2198,7 +2198,6 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
{"sve2-sm4", "nosve2-sm4", "+sve2-sm4", "-sve2-sm4"},
{"sve2-sha3", "nosve2-sha3", "+sve2-sha3", "-sve2-sha3"},
{"sve2p1", "nosve2p1", "+sve2p1", "-sve2p1"},
- {"b16b16", "nob16b16", "+b16b16", "-b16b16"},
{"sve2-bitperm", "nosve2-bitperm", "+sve2-bitperm", "-sve2-bitperm"},
{"dotprod", "nodotprod", "+dotprod", "-dotprod"},
{"rcpc", "norcpc", "+rcpc", "-rcpc"},
@@ -2218,6 +2217,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) {
{"sme-i16i64", "nosme-i16i64", "+sme-i16i64", "-sme-i16i64"},
{"sme-f16f16", "nosme-f16f16", "+sme-f16f16", "-sme-f16f16"},
{"sme2", "nosme2", "+sme2", "-sme2"},
+ {"sme-b16b16", "nosme-b16b16", "+sme-b16b16", "-sme-b16b16"},
{"sme2p1", "nosme2p1", "+sme2p1", "-sme2p1"},
{"hbc", "nohbc", "+hbc", "-hbc"},
{"mops", "nomops", "+mops", "-mops"},
@@ -2451,11 +2451,9 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV8A, {"nofp16", "sve"}, {"fullfp16", "sve"}, {}},
{AArch64::ARMV8A, {"sve", "nofp16"}, {}, {"fullfp16", "sve"}},
- // bf16 -> {sme, b16b16}
+ // bf16 -> {sme}
{AArch64::ARMV8A, {"nobf16", "sme"}, {"bf16", "sme"}, {}},
{AArch64::ARMV8A, {"sme", "nobf16"}, {}, {"bf16", "sme"}},
- {AArch64::ARMV8A, {"nobf16", "b16b16"}, {"bf16", "b16b16"}, {}},
- {AArch64::ARMV8A, {"b16b16", "nobf16"}, {}, {"bf16", "b16b16"}},
// sve -> {sve2, f32mm, f64mm}
{AArch64::ARMV8A, {"nosve", "sve2"}, {"sve", "sve2"}, {}},
@@ -2483,6 +2481,16 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV8A, {"nosve2", "sve2-sm4"}, {"sve2", "sve2-sm4"}, {}},
{AArch64::ARMV8A, {"sve2-sm4", "nosve2"}, {}, {"sve2", "sve2-sm4"}},
+ // sve-b16b16 -> {sme-b16b16}
+ {AArch64::ARMV8A,
+ {"nosve-b16b16", "sme-b16b16"},
+ {"sve-b16b16", "sme-b16b16"},
+ {}},
+ {AArch64::ARMV8A,
+ {"sme-b16b16", "nosve-b16b16"},
+ {},
+ {"sve-b16b16", "sme-b16b16"}},
+
// sme -> {sme2, sme-f16f16, sme-f64f64, sme-i16i64, sme-fa64}
{AArch64::ARMV8A, {"nosme", "sme2"}, {"sme", "sme2"}, {}},
{AArch64::ARMV8A, {"sme2", "nosme"}, {}, {"sme", "sme2"}},
@@ -2496,7 +2504,7 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV8A, {"sme-fa64", "nosme"}, {}, {"sme", "sme-fa64"}},
// sme2 -> {sme2p1, ssve-fp8fma, ssve-fp8dot2, ssve-fp8dot4, sme-f8f16,
- // sme-f8f32}
+ // sme-f8f32, sme-b16b16}
{AArch64::ARMV8A, {"nosme2", "sme2p1"}, {"sme2", "sme2p1"}, {}},
{AArch64::ARMV8A, {"sme2p1", "nosme2"}, {}, {"sme2", "sme2p1"}},
{AArch64::ARMV8A,
@@ -2527,6 +2535,8 @@ AArch64ExtensionDependenciesBaseArchTestParams
{AArch64::ARMV8A, {"sme-f8f16", "nosme2"}, {}, {"sme2", "sme-f8f16"}},
{AArch64::ARMV8A, {"nosme2", "sme-f8f32"}, {"sme2", "sme-f8f32"}, {}},
{AArch64::ARMV8A, {"sme-f8f32", "nosme2"}, {}, {"sme2", "sme-f8f32"}},
+ {AArch64::ARMV8A, {"nosme2", "sme-b16b16"}, {"sme2", "sme-b16b16"}, {}},
+ {AArch64::ARMV8A, {"sme-b16b16", "nosme2"}, {}, {"sme2", "sme-b16b16"}},
// fp8 -> {sme-f8f16, sme-f8f32}
{AArch64::ARMV8A, {"nofp8", "sme-f8f16"}, {"fp8", "sme-f8f16"}, {}},
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