[clang] Reland [C++20] [Modules] [Itanium ABI] Generate the vtable in the mod… (PR #102287)

[Chuanqi Xu via cfe-commits]

================
@@ -5317,6 +5329,17 @@ void ASTWriter::WriteSpecialDeclRecords(Sema &SemaRef) {
   }
   if (!DeleteExprsToAnalyze.empty())
     Stream.EmitRecord(DELETE_EXPRS_TO_ANALYZE, DeleteExprsToAnalyze);
+
+  RecordData VTablesToEmit;
+  for (CXXRecordDecl *RD : PendingEmittingVTables) {
+    if (!wasDeclEmitted(RD))
+      continue;
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ChuanqiXu9 wrote:

We may not be able to do that simply. The current workflow is:

> ParseAST -> WriteAST -> EmitVTables

The values of PendingEmittingVTables are inserted in `ParseAST` phase. And in `WriteAST` phase, we won't write every thing in the AST. The ASTWriter will only write the thing registered in `PrepareWritingSpecialDecls()` and the things reached during the writing process. This is the meaning of `wasDeclEmitted`.

So when we insert the values, we can't know what values are going to be wrote or not. We can only check this after writing the AST (now).

I didn't change the name to `MaybePendingEmittingVTables` since the pattern is pretty common to almost all the records in ASTWriter. I feel it is somewhat inconsistent to rename `PendingEmittingVTables` only.


https://github.com/llvm/llvm-project/pull/102287