[clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)

Craig Topper via cfe-commits cfe-commits at lists.llvm.org
Tue Aug 6 15:54:15 PDT 2024


================
@@ -317,38 +323,45 @@ ABIArgInfo RISCVABIInfo::coerceAndExpandFPCCEligibleStruct(
 
 // Fixed-length RVV vectors are represented as scalable vectors in function
 // args/return and must be coerced from fixed vectors.
-ABIArgInfo RISCVABIInfo::coerceVLSVector(QualType Ty) const {
+ABIArgInfo RISCVABIInfo::coerceVLSVector(QualType Ty,
+                                         unsigned ArgABIVLen) const {
   assert(Ty->isVectorType() && "expected vector type!");
 
   const auto *VT = Ty->castAs<VectorType>();
   assert(VT->getElementType()->isBuiltinType() && "expected builtin type!");
 
-  auto VScale =
-      getContext().getTargetInfo().getVScaleRange(getContext().getLangOpts());
-
   unsigned NumElts = VT->getNumElements();
-  llvm::Type *EltType;
-  if (VT->getVectorKind() == VectorKind::RVVFixedLengthMask) {
-    NumElts *= 8;
-    EltType = llvm::Type::getInt1Ty(getVMContext());
+  llvm::ScalableVectorType *ResType;
+  llvm::Type *EltType = CGT.ConvertType(VT->getElementType());
+
+  if (ArgABIVLen == 0) {
+    // RVV fixed-length vector
+    auto VScale =
+        getContext().getTargetInfo().getVScaleRange(getContext().getLangOpts());
+
+    if (VT->getVectorKind() == VectorKind::RVVFixedLengthMask) {
+      NumElts *= 8;
+      EltType = llvm::Type::getInt1Ty(getVMContext());
+    }
+
+    // The MinNumElts is simplified from equation:
+    // NumElts / VScale =
+    //  (EltSize * NumElts / (VScale * RVVBitsPerBlock))
+    //    * (RVVBitsPerBlock / EltSize)
+    ResType = llvm::ScalableVectorType::get(EltType, NumElts / VScale->first);
   } else {
-    assert(VT->getVectorKind() == VectorKind::RVVFixedLengthData &&
-           "Unexpected vector kind");
-    EltType = CGT.ConvertType(VT->getElementType());
+    // Generic vector
+    ResType = llvm::ScalableVectorType::get(
+        EltType, NumElts * llvm::RISCV::RVVBitsPerBlock / ArgABIVLen);
----------------
topperc wrote:

Do we need to protect this division from returning 0?

Do we need to round up odd number of elements?

What about Zve32 where <vscale x 1 x *> isn't a legal type in the backend?

What about vectors of double on Zve64f or Zve64x? Vectors of double and i64 on Zve32?

Vectors of any illegal element type like i128?

https://github.com/llvm/llvm-project/pull/100346


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