[clang] [llvm] [X86][AVX10.2] Support AVX10.2-MINMAX new instructions. (PR #101598)
Phoebe Wang via cfe-commits
cfe-commits at lists.llvm.org
Sat Aug 3 05:32:13 PDT 2024
================
@@ -0,0 +1,219 @@
+/*===--------------- avx10_2_512minmaxintrin.h - AVX10_2_512MINMAX intrinsics
+ *-----------------===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+ *
+ *===-----------------------------------------------------------------------===
+ */
+#ifndef __IMMINTRIN_H
+#error \
+ "Never use <avx10_2_512minmaxintrin.h> directly; include <immintrin.h> instead."
+#endif // __IMMINTRIN_H
+
+#ifndef __AVX10_2_512MINMAXINTRIN_H
+#define __AVX10_2_512MINMAXINTRIN_H
+
+#define _mm512_minmaxne_pbh(A, B, C) \
+ ((__m512bh)__builtin_ia32_vminmaxnepbf16512( \
+ (__v32bf)(__m512bh)(A), (__v32bf)(__m512bh)(A), (int)(C)))
+
+#define _mm512_mask_minmaxne_pbh(W, U, A, B, C) \
+ ((__m512bh)__builtin_ia32_selectpbf_512( \
+ (__mmask32)(U), \
+ (__v32bf)__builtin_ia32_vminmaxnepbf16512( \
+ (__v32bf)(__m512bh)(A), (__v32bf)(__m512bh)(B), (int)(C)), \
+ (__v32bf)(__m512bh)(W)))
+
+#define _mm512_maskz_minmaxne_pbh(U, A, B, C) \
+ ((__m512bh)__builtin_ia32_selectpbf_512( \
+ (__mmask32)(U), \
+ (__v32bf)__builtin_ia32_vminmaxnepbf16512( \
+ (__v32bf)(__m512bh)(A), (__v32bf)(__m512bh)(B), (int)(C)), \
+ (__v32bf) __builtin_bit_cast(__m512bh, _mm512_setzero_ps())))
+
+#define _mm512_minmax_pd(A, B, C) \
+ ((__m512d)__builtin_ia32_vminmaxpd512_round_mask( \
+ (__v8df)(__m512d)(A), (__v8df)(__m512d)(B), (int)(C), \
+ (__v8df)_mm512_undefined_pd(), (__mmask8) - 1, \
----------------
phoebewang wrote:
`(__mmask8)-1`. The same below.
https://github.com/llvm/llvm-project/pull/101598
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