[clang] [llvm] [RISCV][VLS] Support RISCV VLS calling convention (PR #100346)

Brandon Wu via cfe-commits cfe-commits at lists.llvm.org
Thu Jul 25 02:23:48 PDT 2024


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@@ -608,6 +608,9 @@ class CGFunctionInfo final
   /// Log 2 of the maximum vector width.
   unsigned MaxVectorWidth : 4;
 
+  /// Log2 of ABI_VLEN used in RISCV VLS calling convention.
+  unsigned Log2RISCVABIVLen : 4;
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4vtomat wrote:

Yes, we need 5 bits, thanks for finding out that!

https://github.com/llvm/llvm-project/pull/100346


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