[clang] [llvm] [msan] Implement support for Arm NEON vst{2,3,4} instructions (PR #99360)

[Vitaly Buka via cfe-commits]

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@@ -3865,6 +3866,42 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
     setOriginForNaryOp(I);
   }
 
+  /// Handle Arm NEON vector store intrinsics (vst{2,3,4}).
+  ///
+  /// Arm NEON vector store intrinsics have the output address (pointer) as the
+  /// last argument, with the initial arguments being the inputs. They return
+  /// void.
+  void handleNEONVectorStoreIntrinsic(IntrinsicInst &I) {
+    IRBuilder<> IRB(&I);
+
+    // Don't use getNumOperands() because it includes the callee
+    int numArgOperands = I.arg_size();
+    assert(numArgOperands >= 1);
+
+    // The last arg operand is the output
+    Value *Addr = I.getArgOperand(numArgOperands - 1);
+    if (ClCheckAccessAddress)
+      insertShadowCheck(Addr, &I);
+
+    IntrinsicInst *ShadowI = cast<IntrinsicInst>(I.clone());
+    for (int i = 0; i < numArgOperands - 1; i++) {
+      ShadowI->setArgOperand(i, getShadow(&I, i));
+    }
+
+    Value *ShadowPtr, *OriginPtr;
+    std::tie(ShadowPtr, OriginPtr) = getShadowOriginPtr(
+        Addr, IRB, ShadowI->getType(), Align(1), /*isStore*/ true);
+    ShadowI->setArgOperand(numArgOperands - 1, ShadowPtr);
+    ShadowI->insertAfter(&I);
+
+    if (MS.TrackOrigins) {
+      OriginCombiner OC(this, IRB);
+      for (int i = 0; i < numArgOperands - 1; i++)
+        OC.Add(I.getArgOperand(i));
+      OC.Done(&I);
----------------
vitalybuka wrote:

OriginCombiner uses combined origin as origin of instruction return value

here `void Done(Instruction *I) {` dose not work
we likely need another `DoneAndStore` for ptr like cases

https://github.com/llvm/llvm-project/pull/99360