[clang] [llvm] [RISC-V] Remove experimental for Zicfiss/Zicfilp. (PR #98891)
Yeting Kuo via cfe-commits
cfe-commits at lists.llvm.org
Mon Jul 15 05:30:36 PDT 2024
https://github.com/yetingk created https://github.com/llvm/llvm-project/pull/98891
Both of them are ratified.
https://wiki.riscv.org/display/HOME/Ratified+Extensions
>From fe7a971ae7c7dd7436bc39506bf660f49b37c974 Mon Sep 17 00:00:00 2001
From: Yeting Kuo <yeting.kuo at sifive.com>
Date: Mon, 15 Jul 2024 00:51:19 -0700
Subject: [PATCH] [RISC-V] Remove experimental for Zicfiss/Zicfilp.
Both of them are ratified.
https://wiki.riscv.org/display/HOME/Ratified+Extensions
---
.../Driver/print-supported-extensions-riscv.c | 4 ++--
clang/test/Preprocessor/riscv-target-features.c | 16 ++++++----------
llvm/lib/Target/RISCV/RISCVFeatures.td | 12 +++++-------
llvm/test/CodeGen/RISCV/attributes.ll | 8 ++++----
llvm/test/CodeGen/RISCV/jumptable-swguarded.ll | 4 ++--
llvm/test/CodeGen/RISCV/shadowcallstack.ll | 8 ++++----
.../CodeGen/RISCV/zicfilp-indirect-branch.ll | 2 +-
llvm/test/MC/RISCV/attribute-arch-invalid.s | 4 ++--
llvm/test/MC/RISCV/attribute-arch.s | 8 ++++----
llvm/test/MC/RISCV/compressed-zicfiss.s | 12 ++++++------
llvm/test/MC/RISCV/option-arch.s | 2 +-
llvm/test/MC/RISCV/rv32zicfiss-invalid.s | 2 +-
llvm/test/MC/RISCV/rv64zicfiss-invalid.s | 2 +-
llvm/test/MC/RISCV/tail-call.s | 12 ++++++------
llvm/test/MC/RISCV/zicfilp-invalid.s | 4 ++--
llvm/test/MC/RISCV/zicfilp-valid.s | 12 ++++++------
llvm/test/MC/RISCV/zicfiss-valid.s | 12 ++++++------
llvm/unittests/TargetParser/RISCVISAInfoTest.cpp | 16 ++++++++--------
18 files changed, 67 insertions(+), 73 deletions(-)
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c b/clang/test/Driver/print-supported-extensions-riscv.c
index 875472202d242..b48ad31690667 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -22,6 +22,8 @@
// CHECK-NEXT: ziccif 1.0 'Ziccif' (Main Memory Supports Instruction Fetch with Atomicity Requirement)
// CHECK-NEXT: zicclsm 1.0 'Zicclsm' (Main Memory Supports Misaligned Loads/Stores)
// CHECK-NEXT: ziccrse 1.0 'Ziccrse' (Main Memory Supports Forward Progress on LR/SC Sequences)
+// CHECK-NEXT: zicfilp 1.0 'Zicfilp' (Landing pad)
+// CHECK-NEXT: zicfiss 1.0 'Zicfiss' (Shadow stack)
// CHECK-NEXT: zicntr 2.0 'Zicntr' (Base Counters and Timers)
// CHECK-NEXT: zicond 1.0 'Zicond' (Integer Conditional Operations)
// CHECK-NEXT: zicsr 2.0 'zicsr' (CSRs)
@@ -169,8 +171,6 @@
// CHECK-NEXT: xwchc 2.2 'Xwchc' (WCH/QingKe additional compressed opcodes)
// CHECK-EMPTY:
// CHECK-NEXT: Experimental extensions
-// CHECK-NEXT: zicfilp 0.4 'Zicfilp' (Landing pad)
-// CHECK-NEXT: zicfiss 0.4 'Zicfiss' (Shadow stack)
// CHECK-NEXT: zalasr 0.1 'Zalasr' (Load-Acquire and Store-Release Instructions)
// CHECK-NEXT: smmpm 1.0 'Smmpm' (Machine-level Pointer Masking for M-mode)
// CHECK-NEXT: smnpm 1.0 'Smnpm' (Machine-level Pointer Masking for next lower privilege mode)
diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c
index 34ec19c70f48a..f5a82beaa5713 100644
--- a/clang/test/Preprocessor/riscv-target-features.c
+++ b/clang/test/Preprocessor/riscv-target-features.c
@@ -1642,13 +1642,11 @@
// RUN: -o - | FileCheck --check-prefix=CHECK-ZFBFMIN-EXT %s
// CHECK-ZFBFMIN-EXT: __riscv_zfbfmin 1000000{{$}}
-// RUN: %clang --target=riscv32 -menable-experimental-extensions \
-// RUN: -march=rv32i_zicfilp0p4 -E -dM %s \
+// RUN: %clang --target=riscv32 -march=rv32i_zicfilp1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZICFILP-EXT %s
-// RUN: %clang --target=riscv64 -menable-experimental-extensions \
-// RUN: -march=rv64i_zicfilp0p4 -E -dM %s \
+// RUN: %clang --target=riscv64 -march=rv64i_zicfilp1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZICFILP-EXT %s
-// CHECK-ZICFILP-EXT: __riscv_zicfilp 4000{{$}}
+// CHECK-ZICFILP-EXT: __riscv_zicfilp 1000000{{$}}
// RUN: %clang --target=riscv32-unknown-linux-gnu \
// RUN: -march=rv32iztso1p0 -E -dM %s \
@@ -1674,13 +1672,11 @@
// RUN: -o - | FileCheck --check-prefix=CHECK-ZVFBFWMA-EXT %s
// CHECK-ZVFBFWMA-EXT: __riscv_zvfbfwma 1000000{{$}}
-// RUN: %clang -target riscv32 -menable-experimental-extensions \
-// RUN: -march=rv32izicfiss0p4 -E -dM %s \
+// RUN: %clang -target riscv32 -march=rv32izicfiss1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZICFISS-EXT %s
-// RUN: %clang -target riscv64 -menable-experimental-extensions \
-// RUN: -march=rv64izicfiss0p4 -E -dM %s \
+// RUN: %clang -target riscv64 -march=rv64izicfiss1p0 -E -dM %s \
// RUN: -o - | FileCheck --check-prefix=CHECK-ZICFISS-EXT %s
-// CHECK-ZICFISS-EXT: __riscv_zicfiss 4000{{$}}
+// CHECK-ZICFISS-EXT: __riscv_zicfiss 1000000{{$}}
// RUN: %clang --target=riscv32 -menable-experimental-extensions \
// RUN: -march=rv32i_ssnpm1p0 -E -dM %s \
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index d3cb2aeab41cb..46c061ee63bf5 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -150,10 +150,9 @@ def HasStdExtZimop : Predicate<"Subtarget->hasStdExtZimop()">,
AssemblerPredicate<(all_of FeatureStdExtZimop),
"'Zimop' (May-Be-Operations)">;
-def FeatureStdExtZicfilp
- : RISCVExperimentalExtension<"zicfilp", 0, 4,
- "'Zicfilp' (Landing pad)",
- [FeatureStdExtZicsr]>;
+def FeatureStdExtZicfilp : RISCVExtension<"zicfilp", 1, 0,
+ "'Zicfilp' (Landing pad)",
+ [FeatureStdExtZicsr]>;
def HasStdExtZicfilp : Predicate<"Subtarget->hasStdExtZicfilp()">,
AssemblerPredicate<(all_of FeatureStdExtZicfilp),
"'Zicfilp' (Landing pad)">;
@@ -161,9 +160,8 @@ def NoStdExtZicfilp : Predicate<"!Subtarget->hasStdExtZicfilp()">,
AssemblerPredicate<(all_of (not FeatureStdExtZicfilp))>;
def FeatureStdExtZicfiss
- : RISCVExperimentalExtension<"zicfiss", 0, 4,
- "'Zicfiss' (Shadow stack)",
- [FeatureStdExtZicsr, FeatureStdExtZimop]>;
+ : RISCVExtension<"zicfiss", 1, 0, "'Zicfiss' (Shadow stack)",
+ [FeatureStdExtZicsr, FeatureStdExtZimop]>;
def HasStdExtZicfiss : Predicate<"Subtarget->hasStdExtZicfiss()">,
AssemblerPredicate<(all_of FeatureStdExtZicfiss),
"'Zicfiss' (Shadow stack)">;
diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll
index 5f82d757a22ec..347e1bf9fc00f 100644
--- a/llvm/test/CodeGen/RISCV/attributes.ll
+++ b/llvm/test/CodeGen/RISCV/attributes.ll
@@ -123,7 +123,7 @@
; RUN: llc -mtriple=riscv32 -mattr=+a,zacas %s -o - | FileCheck --check-prefix=RV32ZACAS %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV32ZALASR %s
; RUN: llc -mtriple=riscv32 -mattr=+zama16b %s -o - | FileCheck --check-prefixes=CHECK,RV32ZAMA16B %s
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV32ZICFILP %s
+; RUN: llc -mtriple=riscv32 -mattr=+zicfilp %s -o - | FileCheck --check-prefix=RV32ZICFILP %s
; RUN: llc -mtriple=riscv32 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV32ZABHA %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-ssnpm %s -o - | FileCheck --check-prefix=RV32SSNPM %s
; RUN: llc -mtriple=riscv32 -mattr=+experimental-smnpm %s -o - | FileCheck --check-prefix=RV32SMNPM %s
@@ -261,7 +261,7 @@
; RUN: llc -mtriple=riscv64 -mattr=+zvfbfwma %s -o - | FileCheck --check-prefixes=CHECK,RV64ZVFBFWMA %s
; RUN: llc -mtriple=riscv64 -mattr=+a,zacas %s -o - | FileCheck --check-prefix=RV64ZACAS %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zalasr %s -o - | FileCheck --check-prefix=RV64ZALASR %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfilp %s -o - | FileCheck --check-prefix=RV64ZICFILP %s
+; RUN: llc -mtriple=riscv64 -mattr=+zicfilp %s -o - | FileCheck --check-prefix=RV64ZICFILP %s
; RUN: llc -mtriple=riscv64 -mattr=+a,+zabha %s -o - | FileCheck --check-prefix=RV64ZABHA %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-ssnpm %s -o - | FileCheck --check-prefix=RV64SSNPM %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-smnpm %s -o - | FileCheck --check-prefix=RV64SMNPM %s
@@ -407,7 +407,7 @@
; RV32ZACAS: .attribute 5, "rv32i2p1_a2p1_zacas1p0"
; RV32ZALASR: .attribute 5, "rv32i2p1_zalasr0p1"
; RV32ZAMA16B: .attribute 5, "rv32i2p1_zama16b1p0"
-; RV32ZICFILP: .attribute 5, "rv32i2p1_zicfilp0p4_zicsr2p0"
+; RV32ZICFILP: .attribute 5, "rv32i2p1_zicfilp1p0_zicsr2p0"
; RV32ZABHA: .attribute 5, "rv32i2p1_a2p1_zabha1p0"
; RV32SSNPM: .attribute 5, "rv32i2p1_ssnpm1p0"
; RV32SMNPM: .attribute 5, "rv32i2p1_smnpm1p0"
@@ -543,7 +543,7 @@
; RV64ZVFBFWMA: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zfbfmin1p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvfbfwma1p0_zvl32b1p0"
; RV64ZACAS: .attribute 5, "rv64i2p1_a2p1_zacas1p0"
; RV64ZALASR: .attribute 5, "rv64i2p1_zalasr0p1"
-; RV64ZICFILP: .attribute 5, "rv64i2p1_zicfilp0p4_zicsr2p0"
+; RV64ZICFILP: .attribute 5, "rv64i2p1_zicfilp1p0_zicsr2p0"
; RV64ZABHA: .attribute 5, "rv64i2p1_a2p1_zabha1p0"
; RV64SSNPM: .attribute 5, "rv64i2p1_ssnpm1p0"
; RV64SMNPM: .attribute 5, "rv64i2p1_smnpm1p0"
diff --git a/llvm/test/CodeGen/RISCV/jumptable-swguarded.ll b/llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
index 9d57ca74cd78a..65d819b963551 100644
--- a/llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
+++ b/llvm/test/CodeGen/RISCV/jumptable-swguarded.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple riscv32 -mattr=+experimental-zicfilp < %s | FileCheck %s
-; RUN: llc -mtriple riscv64 -mattr=+experimental-zicfilp < %s | FileCheck %s
+; RUN: llc -mtriple riscv32 -mattr=+zicfilp < %s | FileCheck %s
+; RUN: llc -mtriple riscv64 -mattr=+zicfilp < %s | FileCheck %s
; RUN: llc -mtriple riscv32 < %s | FileCheck %s --check-prefix=NO-ZICFILP
; RUN: llc -mtriple riscv64 < %s | FileCheck %s --check-prefix=NO-ZICFILP
diff --git a/llvm/test/CodeGen/RISCV/shadowcallstack.ll b/llvm/test/CodeGen/RISCV/shadowcallstack.ll
index a320b44d2c6a8..5d429cdca8cd1 100644
--- a/llvm/test/CodeGen/RISCV/shadowcallstack.ll
+++ b/llvm/test/CodeGen/RISCV/shadowcallstack.ll
@@ -3,13 +3,13 @@
; RUN: | FileCheck %s --check-prefix=RV32
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
; RUN: | FileCheck %s --check-prefix=RV64
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfiss < %s \
+; RUN: llc -mtriple=riscv32 -mattr=+zicfiss < %s \
; RUN: -verify-machineinstrs | FileCheck %s --check-prefix=RV32-ZICFISS
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfiss < %s \
+; RUN: llc -mtriple=riscv64 -mattr=+zicfiss < %s \
; RUN: -verify-machineinstrs | FileCheck %s --check-prefix=RV64-ZICFISS
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-zicfiss,forced-sw-shadow-stack \
+; RUN: llc -mtriple=riscv32 -mattr=+zicfiss,forced-sw-shadow-stack \
; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV32
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfiss,forced-sw-shadow-stack \
+; RUN: llc -mtriple=riscv64 -mattr=+zicfiss,forced-sw-shadow-stack \
; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefix=RV64
define void @f1() shadowcallstack {
diff --git a/llvm/test/CodeGen/RISCV/zicfilp-indirect-branch.ll b/llvm/test/CodeGen/RISCV/zicfilp-indirect-branch.ll
index bccd28ee7e2b3..b70c1bbf6dd7d 100644
--- a/llvm/test/CodeGen/RISCV/zicfilp-indirect-branch.ll
+++ b/llvm/test/CodeGen/RISCV/zicfilp-indirect-branch.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
; RUN: llc -mtriple=riscv64 -stop-after=finalize-isel < %s | FileCheck %s
-; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicfilp -stop-after=finalize-isel < %s | FileCheck -check-prefixes=ZICFILP %s
+; RUN: llc -mtriple=riscv64 -mattr=+zicfilp -stop-after=finalize-isel < %s | FileCheck -check-prefixes=ZICFILP %s
@brind.arr = internal unnamed_addr constant [2 x ptr] [ptr blockaddress(@brind, %5), ptr blockaddress(@brind, %8)], align 8
@x = dso_local global i32 0, align 4
diff --git a/llvm/test/MC/RISCV/attribute-arch-invalid.s b/llvm/test/MC/RISCV/attribute-arch-invalid.s
index 4ed8f6a027894..cb206d63d47aa 100644
--- a/llvm/test/MC/RISCV/attribute-arch-invalid.s
+++ b/llvm/test/MC/RISCV/attribute-arch-invalid.s
@@ -5,5 +5,5 @@
## Version strings are required for experimental extensions
-.attribute arch, "rv32izicfilp"
-# CHECK: error: invalid arch name 'rv32izicfilp', experimental extension requires explicit version number `zicfilp`
+.attribute arch, "rv32izalasr"
+# CHECK: error: invalid arch name 'rv32izalasr', experimental extension requires explicit version number `zalasr`
diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s
index 7d0858ff2ebba..0ba15cfd489cb 100644
--- a/llvm/test/MC/RISCV/attribute-arch.s
+++ b/llvm/test/MC/RISCV/attribute-arch.s
@@ -408,11 +408,11 @@
.attribute arch, "rv32i_xcvbi"
# CHECK: attribute 5, "rv32i2p1_xcvbi1p0"
-.attribute arch, "rv32i_zicfilp0p4"
-# CHECK: attribute 5, "rv32i2p1_zicfilp0p4_zicsr2p0"
+.attribute arch, "rv32i_zicfilp1p0"
+# CHECK: attribute 5, "rv32i2p1_zicfilp1p0_zicsr2p0"
-.attribute arch, "rv32i_zicfiss0p4"
-# CHECK: .attribute 5, "rv32i2p1_zicfiss0p4_zicsr2p0_zimop1p0"
+.attribute arch, "rv32i_zicfiss1p0"
+# CHECK: .attribute 5, "rv32i2p1_zicfiss1p0_zicsr2p0_zimop1p0"
.attribute arch, "rv64i_xsfvfwmaccqqq"
# CHECK: attribute 5, "rv64i2p1_f2p2_zicsr2p0_zve32f1p0_zve32x1p0_zvfbfmin1p0_zvl32b1p0_xsfvfwmaccqqq1p0"
diff --git a/llvm/test/MC/RISCV/compressed-zicfiss.s b/llvm/test/MC/RISCV/compressed-zicfiss.s
index 2ebf9d3af3be8..82b36160f07bc 100644
--- a/llvm/test/MC/RISCV/compressed-zicfiss.s
+++ b/llvm/test/MC/RISCV/compressed-zicfiss.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zicfiss,+zcmop -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zicfiss,+zcmop -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zicfiss,+zcmop < %s \
-# RUN: | llvm-objdump --mattr=+experimental-zicfiss,+zcmop -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zicfiss,+zcmop < %s \
+# RUN: | llvm-objdump --mattr=+zicfiss,+zcmop -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zicfiss,+zcmop -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zicfiss,+zcmop -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zicfiss,+zcmop < %s \
-# RUN: | llvm-objdump --mattr=+experimental-zicfiss,+zcmop -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zicfiss,+zcmop < %s \
+# RUN: | llvm-objdump --mattr=+zicfiss,+zcmop -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
#
# RUN: not llvm-mc -triple riscv32 -riscv-no-aliases -show-encoding < %s 2>&1 \
diff --git a/llvm/test/MC/RISCV/option-arch.s b/llvm/test/MC/RISCV/option-arch.s
index 7826252f66e6c..5605fa1d4d2ed 100644
--- a/llvm/test/MC/RISCV/option-arch.s
+++ b/llvm/test/MC/RISCV/option-arch.s
@@ -1,7 +1,7 @@
# RUN: llvm-mc -triple riscv32 -mattr=+experimental -show-encoding < %s \
# RUN: | FileCheck -check-prefixes=CHECK %s
# RUN: llvm-mc -triple riscv32 -mattr=+experimental -filetype=obj < %s \
-# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+m,+a,+f,+zba,+experimental-zicfiss -d -M no-aliases - \
+# RUN: | llvm-objdump --triple=riscv32 --mattr=+c,+m,+a,+f,+zba,+zicfiss -d -M no-aliases - \
# RUN: | FileCheck -check-prefixes=CHECK-INST %s
# Test '.option arch, +' and '.option arch, -' directive
diff --git a/llvm/test/MC/RISCV/rv32zicfiss-invalid.s b/llvm/test/MC/RISCV/rv32zicfiss-invalid.s
index 1cedcb97e2e7f..bff4f0e3f4191 100644
--- a/llvm/test/MC/RISCV/rv32zicfiss-invalid.s
+++ b/llvm/test/MC/RISCV/rv32zicfiss-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple=riscv32 -mattr=+experimental-zicfiss,+c -riscv-no-aliases -show-encoding \
+# RUN: not llvm-mc %s -triple=riscv32 -mattr=+zicfiss,+c -riscv-no-aliases -show-encoding \
# RUN: 2>&1 | FileCheck -check-prefixes=CHECK-ERR %s
# CHECK-ERR: error: invalid operand for instruction
diff --git a/llvm/test/MC/RISCV/rv64zicfiss-invalid.s b/llvm/test/MC/RISCV/rv64zicfiss-invalid.s
index 1296940455e85..a26296933d6d5 100644
--- a/llvm/test/MC/RISCV/rv64zicfiss-invalid.s
+++ b/llvm/test/MC/RISCV/rv64zicfiss-invalid.s
@@ -1,4 +1,4 @@
-# RUN: not llvm-mc %s -triple=riscv64 -mattr=+experimental-zicfiss,+c -riscv-no-aliases -show-encoding \
+# RUN: not llvm-mc %s -triple=riscv64 -mattr=+zicfiss,+c -riscv-no-aliases -show-encoding \
# RUN: 2>&1 | FileCheck -check-prefixes=CHECK-ERR %s
# CHECK-ERR: error: invalid operand for instruction
diff --git a/llvm/test/MC/RISCV/tail-call.s b/llvm/test/MC/RISCV/tail-call.s
index 7c9f28bdfacda..325a02d7d210c 100644
--- a/llvm/test/MC/RISCV/tail-call.s
+++ b/llvm/test/MC/RISCV/tail-call.s
@@ -12,18 +12,18 @@
# RUN: llvm-mc -triple riscv64 < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zicfilp < %s \
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zicfilp < %s \
# RUN: | llvm-objdump -d - | FileCheck --check-prefix=INSTR-ZICFILP %s
-# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+experimental-zicfilp < %s \
+# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+zicfilp < %s \
# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
-# RUN: llvm-mc -triple riscv32 -mattr=+experimental-zicfilp < %s -show-encoding \
+# RUN: llvm-mc -triple riscv32 -mattr=+zicfilp < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zicfilp < %s \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zicfilp < %s \
# RUN: | llvm-objdump -d - | FileCheck --check-prefix=INSTR-ZICFILP %s
-# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+experimental-zicfilp < %s \
+# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+zicfilp < %s \
# RUN: | llvm-readobj -r - | FileCheck -check-prefix=RELOC %s
-# RUN: llvm-mc -triple riscv64 -mattr=+experimental-zicfilp < %s -show-encoding \
+# RUN: llvm-mc -triple riscv64 -mattr=+zicfilp < %s -show-encoding \
# RUN: | FileCheck -check-prefix=FIXUP %s
.long foo
diff --git a/llvm/test/MC/RISCV/zicfilp-invalid.s b/llvm/test/MC/RISCV/zicfilp-invalid.s
index 5b22c0a7e21b9..c050e7d3370ae 100644
--- a/llvm/test/MC/RISCV/zicfilp-invalid.s
+++ b/llvm/test/MC/RISCV/zicfilp-invalid.s
@@ -1,6 +1,6 @@
-# RUN: not llvm-mc -triple riscv32 -mattr=+experimental-zicfilp -riscv-no-aliases -show-encoding < %s 2>&1 \
+# RUN: not llvm-mc -triple riscv32 -mattr=+zicfilp -riscv-no-aliases -show-encoding < %s 2>&1 \
# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
-# RUN: not llvm-mc -triple riscv64 -mattr=+experimental-zicfilp -riscv-no-aliases -show-encoding < %s 2>&1 \
+# RUN: not llvm-mc -triple riscv64 -mattr=+zicfilp -riscv-no-aliases -show-encoding < %s 2>&1 \
# RUN: | FileCheck -check-prefixes=CHECK-NO-EXT %s
# CHECK-NO-EXT: immediate must be an integer in the range [0, 1048575]
diff --git a/llvm/test/MC/RISCV/zicfilp-valid.s b/llvm/test/MC/RISCV/zicfilp-valid.s
index 308e9b60bd7c3..b2bcf97ea044a 100644
--- a/llvm/test/MC/RISCV/zicfilp-valid.s
+++ b/llvm/test/MC/RISCV/zicfilp-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+experimental-zicfilp -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+zicfilp -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM %s
-# RUN: llvm-mc %s -triple=riscv64 -mattr=+experimental-zicfilp -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -mattr=+zicfilp -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+experimental-zicfilp < %s \
-# RUN: | llvm-objdump --mattr=+experimental-zicfilp --no-print-imm-hex -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+zicfilp < %s \
+# RUN: | llvm-objdump --mattr=+zicfilp --no-print-imm-hex -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+experimental-zicfilp < %s \
-# RUN: | llvm-objdump --mattr=+experimental-zicfilp --no-print-imm-hex -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zicfilp < %s \
+# RUN: | llvm-objdump --mattr=+zicfilp --no-print-imm-hex -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
#
# RUN: not llvm-mc -triple riscv32 -riscv-no-aliases -show-encoding < %s 2>&1 \
diff --git a/llvm/test/MC/RISCV/zicfiss-valid.s b/llvm/test/MC/RISCV/zicfiss-valid.s
index fd69d37d7cfa0..1cf0219cd1fd2 100644
--- a/llvm/test/MC/RISCV/zicfiss-valid.s
+++ b/llvm/test/MC/RISCV/zicfiss-valid.s
@@ -1,12 +1,12 @@
-# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+experimental-zicfiss -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv32 -mattr=+a,+zicfiss -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+experimental-zicfiss < %s \
-# RUN: | llvm-objdump --mattr=+a,+experimental-zicfiss -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+a,+zicfiss < %s \
+# RUN: | llvm-objdump --mattr=+a,+zicfiss -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc %s -triple=riscv64 -defsym=RV64=1 -mattr=+a,+experimental-zicfiss -riscv-no-aliases -show-encoding \
+# RUN: llvm-mc %s -triple=riscv64 -defsym=RV64=1 -mattr=+a,+zicfiss -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM-RV64,CHECK-ASM,CHECK-ASM-AND-OBJ-RV64,CHECK-ASM-AND-OBJ %s
-# RUN: llvm-mc -filetype=obj -triple=riscv64 -defsym=RV64=1 -mattr=+a,+experimental-zicfiss < %s \
-# RUN: | llvm-objdump --mattr=+a,+experimental-zicfiss -M no-aliases -d -r - \
+# RUN: llvm-mc -filetype=obj -triple=riscv64 -defsym=RV64=1 -mattr=+a,+zicfiss < %s \
+# RUN: | llvm-objdump --mattr=+a,+zicfiss -M no-aliases -d -r - \
# RUN: | FileCheck --check-prefixes=CHECK-ASM-AND-OBJ-RV64,CHECK-ASM-AND-OBJ %s
#
# RUN: not llvm-mc -triple riscv32 -riscv-no-aliases -show-encoding < %s 2>&1 \
diff --git a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
index d50079870f7ac..6291d2766a15a 100644
--- a/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
+++ b/llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
@@ -879,6 +879,8 @@ R"(All available -march extensions for RISC-V
ziccif 1.0
zicclsm 1.0
ziccrse 1.0
+ zicfilp 1.0
+ zicfiss 1.0
zicntr 2.0
zicond 1.0
zicsr 2.0
@@ -1026,9 +1028,7 @@ R"(All available -march extensions for RISC-V
xwchc 2.2
Experimental extensions
- zicfilp 0.4 This is a long dummy description
- zicfiss 0.4
- zalasr 0.1
+ zalasr 0.1 This is a long dummy description
smmpm 1.0
smnpm 1.0
ssnpm 1.0
@@ -1057,7 +1057,7 @@ For example, clang -march=rv32i_v1p0)";
StringMap<StringRef> DummyMap;
DummyMap["i"] = "This is a long dummy description";
- DummyMap["experimental-zicfilp"] = "This is a long dummy description";
+ DummyMap["experimental-zalasr"] = "This is a long dummy description";
outs().flush();
testing::internal::CaptureStdout();
@@ -1079,16 +1079,16 @@ R"(Extensions enabled for the given RISC-V target
i 2.1 'I' (Base Integer Instruction Set)
Experimental extensions
- zicfilp 0.4 'Zicfilp' (Landing pad)
+ zalasr 0.1 'Zalasr' (Load-Acquire and Store-Release Instructions)
-ISA String: rv64i2p1_zicfilp0p4_zicsr2p0
+ISA String: rv64i2p1_zalasr0p1
)";
// clang-format on
StringMap<StringRef> DescMap;
DescMap["i"] = "'I' (Base Integer Instruction Set)";
- DescMap["experimental-zicfilp"] = "'Zicfilp' (Landing pad)";
- std::set<StringRef> EnabledExtensions = {"i", "experimental-zicfilp"};
+ DescMap["experimental-zalasr"] = "'Zalasr' (Load-Acquire and Store-Release Instructions)";
+ std::set<StringRef> EnabledExtensions = {"i", "experimental-zalasr"};
outs().flush();
testing::internal::CaptureStdout();
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