[clang] 015526b - [RISCV] Fix spelling instuctions->instructions.
Craig Topper via cfe-commits
cfe-commits at lists.llvm.org
Tue Jul 9 22:36:27 PDT 2024
Author: Craig Topper
Date: 2024-07-09T22:35:46-07:00
New Revision: 015526bf3fc6843ad28f9e0809598453228c4bc2
URL: https://github.com/llvm/llvm-project/commit/015526bf3fc6843ad28f9e0809598453228c4bc2
DIFF: https://github.com/llvm/llvm-project/commit/015526bf3fc6843ad28f9e0809598453228c4bc2.diff
LOG: [RISCV] Fix spelling instuctions->instructions.
Taken from #98259 and with the necessary test updates added.
Added:
Modified:
clang/test/Driver/print-supported-extensions-riscv.c
llvm/lib/Target/RISCV/RISCVFeatures.td
llvm/test/MC/RISCV/rv32zcmt-valid.s
Removed:
################################################################################
diff --git a/clang/test/Driver/print-supported-extensions-riscv.c b/clang/test/Driver/print-supported-extensions-riscv.c
index 49bdb21ac59d6..d3df5b9208e74 100644
--- a/clang/test/Driver/print-supported-extensions-riscv.c
+++ b/clang/test/Driver/print-supported-extensions-riscv.c
@@ -51,8 +51,8 @@
// CHECK-NEXT: zce 1.0 'Zce' (Compressed extensions for microcontrollers)
// CHECK-NEXT: zcf 1.0 'Zcf' (Compressed Single-Precision Floating-Point Instructions)
// CHECK-NEXT: zcmop 1.0 'Zcmop' (Compressed May-Be-Operations)
-// CHECK-NEXT: zcmp 1.0 'Zcmp' (sequenced instuctions for code-size reduction)
-// CHECK-NEXT: zcmt 1.0 'Zcmt' (table jump instuctions for code-size reduction)
+// CHECK-NEXT: zcmp 1.0 'Zcmp' (sequenced instructions for code-size reduction)
+// CHECK-NEXT: zcmt 1.0 'Zcmt' (table jump instructions for code-size reduction)
// CHECK-NEXT: zba 1.0 'Zba' (Address Generation Instructions)
// CHECK-NEXT: zbb 1.0 'Zbb' (Basic Bit-Manipulation)
// CHECK-NEXT: zbc 1.0 'Zbc' (Carry-Less Multiplication)
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index e2a8fb485850f..72d01f1258013 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -406,19 +406,19 @@ def FeatureStdExtZcf
def FeatureStdExtZcmp
: RISCVExtension<"zcmp", 1, 0,
- "'Zcmp' (sequenced instuctions for code-size reduction)",
+ "'Zcmp' (sequenced instructions for code-size reduction)",
[FeatureStdExtZca]>;
def HasStdExtZcmp : Predicate<"Subtarget->hasStdExtZcmp() && !Subtarget->hasStdExtC()">,
AssemblerPredicate<(all_of FeatureStdExtZcmp),
- "'Zcmp' (sequenced instuctions for code-size reduction)">;
+ "'Zcmp' (sequenced instructions for code-size reduction)">;
def FeatureStdExtZcmt
: RISCVExtension<"zcmt", 1, 0,
- "'Zcmt' (table jump instuctions for code-size reduction)",
+ "'Zcmt' (table jump instructions for code-size reduction)",
[FeatureStdExtZca, FeatureStdExtZicsr]>;
def HasStdExtZcmt : Predicate<"Subtarget->hasStdExtZcmt()">,
AssemblerPredicate<(all_of FeatureStdExtZcmt),
- "'Zcmt' (table jump instuctions for code-size reduction)">;
+ "'Zcmt' (table jump instructions for code-size reduction)">;
def FeatureStdExtZce
: RISCVExtension<"zce", 1, 0,
diff --git a/llvm/test/MC/RISCV/rv32zcmt-valid.s b/llvm/test/MC/RISCV/rv32zcmt-valid.s
index bc58e189d0ffa..a3829fed829f0 100644
--- a/llvm/test/MC/RISCV/rv32zcmt-valid.s
+++ b/llvm/test/MC/RISCV/rv32zcmt-valid.s
@@ -24,10 +24,10 @@
# CHECK-ASM-AND-OBJ: cm.jt 1
# CHECK-ASM: encoding: [0x06,0xa0]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instuctions for code-size reduction){{$}}
+# CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instructions for code-size reduction){{$}}
cm.jt 1
# CHECK-ASM-AND-OBJ: cm.jalt 32
# CHECK-ASM: encoding: [0x82,0xa0]
-# CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instuctions for code-size reduction){{$}}
+# CHECK-NO-EXT: error: instruction requires the following: 'Zcmt' (table jump instructions for code-size reduction){{$}}
cm.jalt 32
More information about the cfe-commits
mailing list