[clang] [llvm] [AArch64] Add -mlr-for-calls-only to replace the now removed -ffixed-x30 flag. (PR #98073)

[Amara Emerson via cfe-commits]

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@@ -3267,10 +3267,13 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
         InsertSEH(MIB, TII, MachineInstr::FrameSetup);
     } else { // The code when the pair of ZReg is not present
       MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc));
-      if (!MRI.isReserved(Reg1))
+      const AArch64RegisterInfo *RegInfo =
+          static_cast<const AArch64RegisterInfo *>(
+              MF.getSubtarget().getRegisterInfo());
+      if (!RegInfo->isStrictlyReservedReg(MF, Reg1))
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aemerson wrote:

> I think this can happen anyway? For example, with the frame/base pointer.

Indeed :(

> We could mess with the allocation orders so LR isn't allocated, despite being an allocatable register. This has basically all the properties we want... but we don't have the necessary infrastructure to make it straightforward.

Yeah, I thought about something along these lines. Perhaps if we could dynamically alter regclasses.

I think I'll give the changing reservedness approach a go here since there's already some precedent for it.

https://github.com/llvm/llvm-project/pull/98073