[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Vikram Hegde via cfe-commits
cfe-commits at lists.llvm.org
Fri Jun 14 09:11:15 PDT 2024
================
@@ -0,0 +1,65 @@
+; RUN: llc -stop-after=amdgpu-isel -mtriple=amdgcn-- -mcpu=gfx1100 -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,ISEL %s
+
+; CHECK-LABEL: name: basic_readfirstlane_i64
+; CHECK: [[TOKEN:%[0-9]+]]{{[^ ]*}} = CONVERGENCECTRL_ANCHOR
----------------
vikramRH wrote:
I currently see machine verifier failure which is not related to this patch. An i32 example with trunc here, https://godbolt.org/z/he8asMe77.
This is also seen with wider type legalizations that we do now, so I cannot integrate these with existing tests just yet. am I missing something here ?
https://github.com/llvm/llvm-project/pull/89217
More information about the cfe-commits
mailing list