[clang] [serialization] no transitive decl change (PR #92083)

[Chuanqi Xu via cfe-commits]

ChuanqiXu9 wrote:

Oh, the time regression is surprising to me. And I observed that @alexfh only reports (compile performance) problems on AArch64 but @bgra8 reports (size increase problems) on both ARM64 and X86_64. 

@alexfh is it true?

So I **guess** the problem may come from the unaligned access. I'll try to refactor it to store 2 32-bits integer instead of 1 64 bits in the PCM files. It may still be helpful to locate the problem and prepare a reproducer though. 

https://github.com/llvm/llvm-project/pull/92083