[clang] [llvm] [RISCV] Add riscv_atomic.h and Zawrs/Zalrsc builtins (PR #94578)

[Eli Friedman via cfe-commits]

efriedma-quic wrote:

> I don't know much about there intrinsics on ARM, what are the stronger guarantees?

The Arm specifies that there's a memory reservation, and you can write whatever operations you want as long as you don't break that reservation.  And the reservation is usually only a few bytes. RISC-V specifically only guarantees behavior for sequences of integer instructions.

https://github.com/llvm/llvm-project/pull/94578