[clang] [llvm] [AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (PR #89217)
Matt Arsenault via cfe-commits
cfe-commits at lists.llvm.org
Thu Jun 6 06:25:38 PDT 2024
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@@ -0,0 +1,19 @@
+; RUN: not --crash llc -stop-after=amdgpu-isel -mtriple=amdgcn-- -mcpu=gfx900 -verify-machineinstrs -o - %s 2>&1 | FileCheck %s
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arsenm wrote:
This is not an IR verifier test, it is a codegen test that fails the machine verifier. A machine verifier would go in test/MachineVerifier, and preferably would be written in MIR and not rely on codegen.
I thought the point of this test was to show that the selection did not produce a machine verifier error after selection, so this is broken
https://github.com/llvm/llvm-project/pull/89217
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