[clang] [X86] Add support for MS inp functions. (PR #93804)
Malay Sanghi via cfe-commits
cfe-commits at lists.llvm.org
Thu May 30 21:15:05 PDT 2024
https://github.com/MalaySanghi updated https://github.com/llvm/llvm-project/pull/93804
>From de79bf75b68825440b939f030e1d659d26f3d2ea Mon Sep 17 00:00:00 2001
From: Malay Sanghi <malay.sanghi at intel.com>
Date: Thu, 30 May 2024 01:39:41 -0700
Subject: [PATCH 1/4] Add support for MS inp functions.
support _inp, _inpw, _inpd, inp, inpw.
These functions were removed from the Windows runtime library, but aare still supported for kernel mode development.
---
clang/lib/Headers/intrin.h | 22 +++++++
clang/test/CodeGen/X86/ms-x86-intrinsics.c | 76 ++++++++++++++++++++++
2 files changed, 98 insertions(+)
diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 5ceb986a1f652..67a062d2166b0 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -329,6 +329,28 @@ static __inline__ void __DEFAULT_FN_ATTRS __stosq(unsigned __int64 *__dst,
static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
__asm__ volatile("hlt");
}
+
+static inline int _inp(unsigned short port) {
+ int ret;
+ __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+ return ret;
+}
+
+static inline unsigned short _inpw(unsigned short port) {
+ unsigned short ret;
+ __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+ return ret;
+}
+
+static inline unsigned long _inpd(unsigned short port) {
+ unsigned long ret;
+ __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+ return ret;
+}
+
+#define inp(port) _inp((port))
+#define inpw(port) _inpw((port))
+
#endif
#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index aa557c8e19a83..c51f2d53ca771 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -63,6 +63,82 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) {
// CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
// CHECK: ret i64 [[RES]]
+
+int test_inp(unsigned short port) {
+ return _inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT: entry:
+// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT: ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT: entry:
+// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT: ret i32 [[TMP0]]
+
+unsigned short test_inpw(unsigned short port) {
+ return _inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT: entry:
+// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT: ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT: entry:
+// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT: ret i16 [[TMP0]]
+
+unsigned long test_inpd(unsigned short port) {
+ return _inpd(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT: entry:
+// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT: ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT: entry:
+// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT: ret i32 [[TMP0]]
+
+int test_inp2(unsigned short port) {
+ return inp(port);
+}
+// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT: entry:
+// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT: ret i32 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT: entry:
+// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT: ret i32 [[TMP0]]
+
+unsigned short test_inpw2(unsigned short port) {
+ return inpw(port);
+}
+// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw2(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
+// CHECK-I386-NEXT: entry:
+// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-I386-NEXT: ret i16 [[TMP0]]
+//
+// CHECK-X64-LABEL: define dso_local i16 @test_inpw2(
+// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
+// CHECK-X64-NEXT: entry:
+// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-X64-NEXT: ret i16 [[TMP0]]
+
#if defined(__x86_64__)
char test__readgsbyte(unsigned long Offset) {
>From 46fd6b17b66a83c4108d355539a9f0ad092525df Mon Sep 17 00:00:00 2001
From: Malay Sanghi <malay.sanghi at intel.com>
Date: Thu, 30 May 2024 07:10:32 -0700
Subject: [PATCH 2/4] reduce checks
---
clang/test/CodeGen/X86/ms-x86-intrinsics.c | 75 ++++++----------------
1 file changed, 20 insertions(+), 55 deletions(-)
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index c51f2d53ca771..a0180ef837777 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -67,77 +67,42 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b) {
int test_inp(unsigned short port) {
return _inp(port);
}
-// CHECK-I386-LABEL: define dso_local i32 @test_inp(
-// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
-// CHECK-I386-NEXT: entry:
-// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-I386-NEXT: ret i32 [[TMP0]]
-//
-// CHECK-X64-LABEL: define dso_local i32 @test_inp(
-// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
-// CHECK-X64-NEXT: entry:
-// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-X64-NEXT: ret i32 [[TMP0]]
+// CHECK-LABEL: i32 @test_inp(i16 noundef
+// CHECK-SAME: [[PORT:%.*]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT: ret i32 [[TMP0]]
unsigned short test_inpw(unsigned short port) {
return _inpw(port);
}
-// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw(
-// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
-// CHECK-I386-NEXT: entry:
-// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-I386-NEXT: ret i16 [[TMP0]]
-//
-// CHECK-X64-LABEL: define dso_local i16 @test_inpw(
-// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
-// CHECK-X64-NEXT: entry:
-// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-X64-NEXT: ret i16 [[TMP0]]
+// CHECK-LABEL: i16 @test_inpw(i16 noundef
+// CHECK-SAME: [[PORT:%.*]])
+// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT: ret i16 [[TMP0]]
unsigned long test_inpd(unsigned short port) {
return _inpd(port);
}
-// CHECK-I386-LABEL: define dso_local i32 @test_inpd(
-// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
-// CHECK-I386-NEXT: entry:
-// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-I386-NEXT: ret i32 [[TMP0]]
-//
-// CHECK-X64-LABEL: define dso_local i32 @test_inpd(
-// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
-// CHECK-X64-NEXT: entry:
-// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-X64-NEXT: ret i32 [[TMP0]]
+// CHECK-LABEL: i32 @test_inpd(i16 noundef
+// CHECK-SAME: [[PORT:%.*]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT: ret i32 [[TMP0]]
int test_inp2(unsigned short port) {
return inp(port);
}
-// CHECK-I386-LABEL: define dso_local i32 @test_inp2(
-// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
-// CHECK-I386-NEXT: entry:
-// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-I386-NEXT: ret i32 [[TMP0]]
-//
-// CHECK-X64-LABEL: define dso_local i32 @test_inp2(
-// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
-// CHECK-X64-NEXT: entry:
-// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-X64-NEXT: ret i32 [[TMP0]]
+// CHECK-LABEL: i32 @test_inp2(i16 noundef
+// CHECK-SAME: [[PORT:%.*]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT: ret i32 [[TMP0]]
unsigned short test_inpw2(unsigned short port) {
return inpw(port);
}
-// CHECK-I386-LABEL: define dso_local zeroext i16 @test_inpw2(
-// CHECK-I386-SAME: i16 noundef zeroext [[PORT:%.*]])
-// CHECK-I386-NEXT: entry:
-// CHECK-I386-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-I386-NEXT: ret i16 [[TMP0]]
-//
-// CHECK-X64-LABEL: define dso_local i16 @test_inpw2(
-// CHECK-X64-SAME: i16 noundef [[PORT:%.*]])
-// CHECK-X64-NEXT: entry:
-// CHECK-X64-NEXT: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
-// CHECK-X64-NEXT: ret i16 [[TMP0]]
+// CHECK-LABEL: i16 @test_inpw2(i16 noundef
+// CHECK-SAME: [[PORT:%.*]])
+// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK-NEXT: ret i16 [[TMP0]]
#if defined(__x86_64__)
>From 1899e28a262ebc6248af0791179456fe199d07bb Mon Sep 17 00:00:00 2001
From: Malay Sanghi <malay.sanghi at intel.com>
Date: Thu, 30 May 2024 07:32:23 -0700
Subject: [PATCH 3/4] fix opcode
---
clang/lib/Headers/intrin.h | 4 ++--
clang/test/CodeGen/X86/ms-x86-intrinsics.c | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 67a062d2166b0..132cc791b3593 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -338,13 +338,13 @@ static inline int _inp(unsigned short port) {
static inline unsigned short _inpw(unsigned short port) {
unsigned short ret;
- __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
+ __asm__ volatile("inw %w1, %b0" : "=a"(ret) : "Nd"(port));
return ret;
}
static inline unsigned long _inpd(unsigned short port) {
unsigned long ret;
- __asm__ volatile("inb %k1, %b0" : "=a"(ret) : "Nd"(port));
+ __asm__ volatile("inl %k1, %b0" : "=a"(ret) : "Nd"(port));
return ret;
}
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index a0180ef837777..995123ec93e92 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -77,7 +77,7 @@ unsigned short test_inpw(unsigned short port) {
}
// CHECK-LABEL: i16 @test_inpw(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i16 [[TMP0]]
unsigned long test_inpd(unsigned short port) {
@@ -85,7 +85,7 @@ unsigned long test_inpd(unsigned short port) {
}
// CHECK-LABEL: i32 @test_inpd(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i32 [[TMP0]]
int test_inp2(unsigned short port) {
@@ -101,7 +101,7 @@ unsigned short test_inpw2(unsigned short port) {
}
// CHECK-LABEL: i16 @test_inpw2(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i16 [[TMP0]]
#if defined(__x86_64__)
>From 8e424c59689228a88444ab7f5220caffc5889b87 Mon Sep 17 00:00:00 2001
From: Malay Sanghi <malay.sanghi at intel.com>
Date: Thu, 30 May 2024 21:07:30 -0700
Subject: [PATCH 4/4] fix modifier
---
clang/lib/Headers/intrin.h | 6 +++---
clang/test/CodeGen/X86/ms-x86-intrinsics.c | 10 +++++-----
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/clang/lib/Headers/intrin.h b/clang/lib/Headers/intrin.h
index 132cc791b3593..ed0da9aa19764 100644
--- a/clang/lib/Headers/intrin.h
+++ b/clang/lib/Headers/intrin.h
@@ -332,19 +332,19 @@ static __inline__ void __DEFAULT_FN_ATTRS __halt(void) {
static inline int _inp(unsigned short port) {
int ret;
- __asm__ volatile("inb %b1, %b0" : "=a"(ret) : "Nd"(port));
+ __asm__ volatile("inb %w1, %b0" : "=a"(ret) : "Nd"(port));
return ret;
}
static inline unsigned short _inpw(unsigned short port) {
unsigned short ret;
- __asm__ volatile("inw %w1, %b0" : "=a"(ret) : "Nd"(port));
+ __asm__ volatile("inw %w1, %w0" : "=a"(ret) : "Nd"(port));
return ret;
}
static inline unsigned long _inpd(unsigned short port) {
unsigned long ret;
- __asm__ volatile("inl %k1, %b0" : "=a"(ret) : "Nd"(port));
+ __asm__ volatile("inl %w1, %k0" : "=a"(ret) : "Nd"(port));
return ret;
}
diff --git a/clang/test/CodeGen/X86/ms-x86-intrinsics.c b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
index 995123ec93e92..d186d4acd2a27 100644
--- a/clang/test/CodeGen/X86/ms-x86-intrinsics.c
+++ b/clang/test/CodeGen/X86/ms-x86-intrinsics.c
@@ -69,7 +69,7 @@ int test_inp(unsigned short port) {
}
// CHECK-LABEL: i32 @test_inp(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i32 [[TMP0]]
unsigned short test_inpw(unsigned short port) {
@@ -77,7 +77,7 @@ unsigned short test_inpw(unsigned short port) {
}
// CHECK-LABEL: i16 @test_inpw(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, ${0:w}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i16 [[TMP0]]
unsigned long test_inpd(unsigned short port) {
@@ -85,7 +85,7 @@ unsigned long test_inpd(unsigned short port) {
}
// CHECK-LABEL: i32 @test_inpd(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:k}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inl ${1:w}, ${0:k}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i32 [[TMP0]]
int test_inp2(unsigned short port) {
@@ -93,7 +93,7 @@ int test_inp2(unsigned short port) {
}
// CHECK-LABEL: i32 @test_inp2(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:b}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i32 asm sideeffect "inb ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i32 [[TMP0]]
unsigned short test_inpw2(unsigned short port) {
@@ -101,7 +101,7 @@ unsigned short test_inpw2(unsigned short port) {
}
// CHECK-LABEL: i16 @test_inpw2(i16 noundef
// CHECK-SAME: [[PORT:%.*]])
-// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, ${0:b}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
+// CHECK: [[TMP0:%.*]] = tail call i16 asm sideeffect "inw ${1:w}, ${0:w}", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"(i16 [[PORT]])
// CHECK-NEXT: ret i16 [[TMP0]]
#if defined(__x86_64__)
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