[clang] 9276a03 - MIPS/Clang: Add more false option pairs into validateTarget (#91968)
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Wed May 22 07:54:49 PDT 2024
Author: YunQiang Su
Date: 2024-05-22T22:54:45+08:00
New Revision: 9276a03b5492d0ac62c48c4313139dbf32d7b9e1
URL: https://github.com/llvm/llvm-project/commit/9276a03b5492d0ac62c48c4313139dbf32d7b9e1
DIFF: https://github.com/llvm/llvm-project/commit/9276a03b5492d0ac62c48c4313139dbf32d7b9e1.diff
LOG: MIPS/Clang: Add more false option pairs into validateTarget (#91968)
The option pairs include:
-mfpxx -mips1
-msoft-float -mmsa
-mmsa -mabi=32 with 32bit pre-R2 CPUs
-mfpxx -mmsa
-mfp32 -mmsa
Added:
Modified:
clang/lib/Basic/Targets/Mips.cpp
Removed:
################################################################################
diff --git a/clang/lib/Basic/Targets/Mips.cpp b/clang/lib/Basic/Targets/Mips.cpp
index 3a65f53c52485..174bc9d2ab996 100644
--- a/clang/lib/Basic/Targets/Mips.cpp
+++ b/clang/lib/Basic/Targets/Mips.cpp
@@ -273,6 +273,34 @@ bool MipsTargetInfo::validateTarget(DiagnosticsEngine &Diags) const {
Diags.Report(diag::err_mips_fp64_req) << "-mfp64";
return false;
}
+ // FPXX requires mips2+
+ if (FPMode == FPXX && CPU == "mips1") {
+ Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfpxx" << CPU;
+ return false;
+ }
+ // -mmsa with -msoft-float makes nonsense
+ if (FloatABI == SoftFloat && HasMSA) {
+ Diags.Report(diag::err_opt_not_valid_with_opt) << "-msoft-float"
+ << "-mmsa";
+ return false;
+ }
+ // Option -mmsa permitted on Mips32 iff revision 2 or higher is present
+ if (HasMSA && (CPU == "mips1" || CPU == "mips2" || getISARev() < 2) &&
+ ABI == "o32") {
+ Diags.Report(diag::err_mips_fp64_req) << "-mmsa";
+ return false;
+ }
+ // MSA requires FP64
+ if (FPMode == FPXX && HasMSA) {
+ Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfpxx"
+ << "-mmsa";
+ return false;
+ }
+ if (FPMode == FP32 && HasMSA) {
+ Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfp32"
+ << "-mmsa";
+ return false;
+ }
return true;
}
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