[clang] [llvm] [AMDGPU][WIP] Add support for i64/f64 readlane, writelane and readfirstlane operations. (PR #89217)

[Matt Arsenault via cfe-commits]

================
@@ -18410,6 +18410,24 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
         CGM.getIntrinsic(Intrinsic::amdgcn_update_dpp, Args[0]->getType());
     return Builder.CreateCall(F, Args);
   }
+  case AMDGPU::BI__builtin_amdgcn_readlane:
+  case AMDGPU::BI__builtin_amdgcn_readfirstlane: {
----------------
arsenm wrote:

readfirstlane case can just call emitUnaryBuiltin. readlane can probably get away with emitBinaryBuiltin, although it doesn't quite fit the binary intrinsic signature 

https://github.com/llvm/llvm-project/pull/89217