[clang] [llvm] [InstCombine] Swap out range metadata to range attribute for cttz/ctlz/ctpop (PR #88776)
Andreas Jonson via cfe-commits
cfe-commits at lists.llvm.org
Fri Apr 19 03:08:37 PDT 2024
https://github.com/andjo403 updated https://github.com/llvm/llvm-project/pull/88776
>From bd3e83f909e85bab1e31cca10925913ed13fac8d Mon Sep 17 00:00:00 2001
From: Andreas Jonson <andjo403 at hotmail.com>
Date: Wed, 17 Apr 2024 23:01:12 +0200
Subject: [PATCH 1/2] [InstCombine] Swap out range metadata to range attribute
for cttz/ctlz/ctpop
---
llvm/include/llvm/IR/Attributes.h | 5 +
llvm/include/llvm/IR/InstrTypes.h | 5 +
llvm/lib/IR/Attributes.cpp | 7 +
.../InstCombine/InstCombineCalls.cpp | 31 ++--
llvm/test/Transforms/InstCombine/bit_ceil.ll | 28 +--
llvm/test/Transforms/InstCombine/bit_floor.ll | 16 +-
.../Transforms/InstCombine/cmp-intrinsic.ll | 28 +--
.../InstCombine/ctlz-cttz-bitreverse.ll | 12 +-
.../InstCombine/ctlz-cttz-shifts.ll | 25 +--
.../InstCombine/ctpop-bswap-bitreverse.ll | 8 +-
.../test/Transforms/InstCombine/ctpop-cttz.ll | 18 +-
.../test/Transforms/InstCombine/ctpop-pow2.ll | 4 +-
llvm/test/Transforms/InstCombine/ctpop.ll | 64 +++----
llvm/test/Transforms/InstCombine/cttz-abs.ll | 34 ++--
.../Transforms/InstCombine/cttz-negative.ll | 14 +-
llvm/test/Transforms/InstCombine/cttz.ll | 36 ++--
llvm/test/Transforms/InstCombine/ffs-1.ll | 6 +-
llvm/test/Transforms/InstCombine/ffs-i16.ll | 4 +-
llvm/test/Transforms/InstCombine/fls-i16.ll | 4 +-
llvm/test/Transforms/InstCombine/fls.ll | 2 +-
.../InstCombine/fold-ctpop-of-not.ll | 32 ++--
.../InstCombine/fold-log2-ceil-idiom.ll | 57 +++---
.../InstCombine/freeze-integer-intrinsics.ll | 16 +-
llvm/test/Transforms/InstCombine/freeze.ll | 3 +-
.../Transforms/InstCombine/icmp-ne-pow2.ll | 20 +--
.../InstCombine/intrinsic-select.ll | 18 +-
.../test/Transforms/InstCombine/intrinsics.ll | 24 +--
llvm/test/Transforms/InstCombine/ispow2.ll | 166 +++++++++---------
.../Transforms/InstCombine/known-non-zero.ll | 18 +-
.../InstCombine/known-phi-recurse.ll | 10 +-
.../Transforms/InstCombine/minmax-fold.ll | 2 +-
.../InstCombine/reduction-add-sext-zext-i1.ll | 14 +-
.../InstCombine/reduction-xor-sext-zext-i1.ll | 14 +-
.../InstCombine/select-cmp-cttz-ctlz.ll | 94 +++++-----
.../InstCombine/select-ctlz-to-cttz.ll | 32 ++--
llvm/test/Transforms/InstCombine/select.ll | 2 +-
llvm/test/Transforms/InstCombine/sext.ll | 6 +-
.../Transforms/InstCombine/shift-cttz-ctlz.ll | 15 +-
llvm/test/Transforms/InstCombine/shift.ll | 4 +-
llvm/test/Transforms/InstCombine/sub-xor.ll | 2 +-
llvm/test/Transforms/InstCombine/xor.ll | 8 +-
.../zext-ctlz-trunc-to-ctlz-add.ll | 14 +-
.../LoopVectorize/reduction-inloop.ll | 6 +-
.../X86/loop-idiom-vs-indvars.ll | 2 +-
.../PhaseOrdering/lower-table-based-cttz.ll | 2 +-
45 files changed, 465 insertions(+), 467 deletions(-)
diff --git a/llvm/include/llvm/IR/Attributes.h b/llvm/include/llvm/IR/Attributes.h
index 7dd8a329029a34..5e3ba1f32e6ab0 100644
--- a/llvm/include/llvm/IR/Attributes.h
+++ b/llvm/include/llvm/IR/Attributes.h
@@ -747,6 +747,11 @@ class AttributeList {
addDereferenceableOrNullParamAttr(LLVMContext &C, unsigned ArgNo,
uint64_t Bytes) const;
+ /// Add the range attribute to the attribute set at the return value index.
+ /// Returns a new list because attribute lists are immutable.
+ [[nodiscard]] AttributeList addRangeRetAttr(LLVMContext &C,
+ const ConstantRange &CR) const;
+
/// Add the allocsize attribute to the attribute set at the given arg index.
/// Returns a new list because attribute lists are immutable.
[[nodiscard]] AttributeList
diff --git a/llvm/include/llvm/IR/InstrTypes.h b/llvm/include/llvm/IR/InstrTypes.h
index 8e6bef69218c2b..b9af3a6ca42c06 100644
--- a/llvm/include/llvm/IR/InstrTypes.h
+++ b/llvm/include/llvm/IR/InstrTypes.h
@@ -1941,6 +1941,11 @@ class CallBase : public Instruction {
Attrs = Attrs.addDereferenceableRetAttr(getContext(), Bytes);
}
+ /// adds the range attribute to the list of attributes.
+ void addRangeRetAttr(const ConstantRange &CR) {
+ Attrs = Attrs.addRangeRetAttr(getContext(), CR);
+ }
+
/// Determine whether the return value has the given attribute.
bool hasRetAttr(Attribute::AttrKind Kind) const {
return hasRetAttrImpl(Kind);
diff --git a/llvm/lib/IR/Attributes.cpp b/llvm/lib/IR/Attributes.cpp
index b2d9992cdc0258..9c48a481de1ff6 100644
--- a/llvm/lib/IR/Attributes.cpp
+++ b/llvm/lib/IR/Attributes.cpp
@@ -1530,6 +1530,13 @@ AttributeList::addDereferenceableOrNullParamAttr(LLVMContext &C, unsigned Index,
return addParamAttributes(C, Index, B);
}
+AttributeList AttributeList::addRangeRetAttr(LLVMContext &C,
+ const ConstantRange &CR) const {
+ AttrBuilder B(C);
+ B.addRangeAttr(CR);
+ return addRetAttributes(C, B);
+}
+
AttributeList AttributeList::addAllocSizeParamAttr(
LLVMContext &C, unsigned Index, unsigned ElemSizeArg,
const std::optional<unsigned> &NumElemsArg) {
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
index aa547565bd0859..ef051ce258a161 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
@@ -606,14 +606,13 @@ static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombinerImpl &IC) {
return IC.replaceOperand(II, 1, IC.Builder.getTrue());
}
- // Add range metadata since known bits can't completely reflect what we know.
- auto *IT = cast<IntegerType>(Op0->getType()->getScalarType());
- if (IT && IT->getBitWidth() != 1 && !II.getMetadata(LLVMContext::MD_range)) {
- Metadata *LowAndHigh[] = {
- ConstantAsMetadata::get(ConstantInt::get(IT, DefiniteZeros)),
- ConstantAsMetadata::get(ConstantInt::get(IT, PossibleZeros + 1))};
- II.setMetadata(LLVMContext::MD_range,
- MDNode::get(II.getContext(), LowAndHigh));
+ // Add range attribute since known bits can't completely reflect what we know.
+ unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
+ if (BitWidth != 1 && !II.hasRetAttr(Attribute::Range) &&
+ !II.getMetadata(LLVMContext::MD_range)) {
+ ConstantRange Range(APInt(BitWidth, DefiniteZeros),
+ APInt(BitWidth, PossibleZeros + 1));
+ II.addRangeRetAttr(Range);
return &II;
}
@@ -685,16 +684,12 @@ static Instruction *foldCtpop(IntrinsicInst &II, InstCombinerImpl &IC) {
Constant::getNullValue(Ty)),
Ty);
- // Add range metadata since known bits can't completely reflect what we know.
- auto *IT = cast<IntegerType>(Ty->getScalarType());
- unsigned MinCount = Known.countMinPopulation();
- unsigned MaxCount = Known.countMaxPopulation();
- if (IT->getBitWidth() != 1 && !II.getMetadata(LLVMContext::MD_range)) {
- Metadata *LowAndHigh[] = {
- ConstantAsMetadata::get(ConstantInt::get(IT, MinCount)),
- ConstantAsMetadata::get(ConstantInt::get(IT, MaxCount + 1))};
- II.setMetadata(LLVMContext::MD_range,
- MDNode::get(II.getContext(), LowAndHigh));
+ // Add range attribute since known bits can't completely reflect what we know.
+ if (BitWidth != 1 && !II.hasRetAttr(Attribute::Range) &&
+ !II.getMetadata(LLVMContext::MD_range)) {
+ ConstantRange Range(APInt(BitWidth, Known.countMinPopulation()),
+ APInt(BitWidth, Known.countMaxPopulation() + 1));
+ II.addRangeRetAttr(Range);
return &II;
}
diff --git a/llvm/test/Transforms/InstCombine/bit_ceil.ll b/llvm/test/Transforms/InstCombine/bit_ceil.ll
index 52e70c78ba5428..16631afa4878da 100644
--- a/llvm/test/Transforms/InstCombine/bit_ceil.ll
+++ b/llvm/test/Transforms/InstCombine/bit_ceil.ll
@@ -5,7 +5,7 @@
define i32 @bit_ceil_32(i32 %x) {
; CHECK-LABEL: @bit_ceil_32(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP2]]
@@ -24,7 +24,7 @@ define i32 @bit_ceil_32(i32 %x) {
define i64 @bit_ceil_64(i64 %x) {
; CHECK-LABEL: @bit_ceil_64(
; CHECK-NEXT: [[DEC:%.*]] = add i64 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[DEC]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[DEC]], i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i64 0, [[CTLZ]]
; CHECK-NEXT: [[TMP2:%.*]] = and i64 [[TMP1]], 63
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i64 1, [[TMP2]]
@@ -44,7 +44,7 @@ define i32 @bit_ceil_32_minus_1(i32 %x) {
; CHECK-LABEL: @bit_ceil_32_minus_1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X:%.*]], -2
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -64,7 +64,7 @@ entry:
; std::bit_ceil<uint32_t>(x + 1)
define i32 @bit_ceil_32_plus_1(i32 %x) {
; CHECK-LABEL: @bit_ceil_32_plus_1(
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP2]]
@@ -84,7 +84,7 @@ define i32 @bit_ceil_plus_2(i32 %x) {
; CHECK-LABEL: @bit_ceil_plus_2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[X:%.*]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -105,7 +105,7 @@ define i32 @bit_ceil_32_neg(i32 %x) {
; CHECK-LABEL: @bit_ceil_32_neg(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -127,7 +127,7 @@ define i32 @bit_ceil_not(i32 %x) {
; CHECK-LABEL: @bit_ceil_not(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[SUB:%.*]] = sub i32 -2, [[X:%.*]]
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SUB]], i1 false)
; CHECK-NEXT: [[TMP0:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP1]]
@@ -147,7 +147,7 @@ entry:
define i32 @bit_ceil_commuted_operands(i32 %x) {
; CHECK-LABEL: @bit_ceil_commuted_operands(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: ret i32 [[SHL]]
@@ -165,7 +165,7 @@ define i32 @bit_ceil_commuted_operands(i32 %x) {
define i32 @bit_ceil_wrong_select_constant(i32 %x) {
; CHECK-LABEL: @bit_ceil_wrong_select_constant(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[UGT_INV:%.*]] = icmp ult i32 [[X]], 2
@@ -185,7 +185,7 @@ define i32 @bit_ceil_wrong_select_constant(i32 %x) {
define i32 @bit_ceil_32_wrong_cond(i32 %x) {
; CHECK-LABEL: @bit_ceil_32_wrong_cond(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 2
@@ -205,7 +205,7 @@ define i32 @bit_ceil_32_wrong_cond(i32 %x) {
define i32 @bit_ceil_wrong_sub_constant(i32 %x) {
; CHECK-LABEL: @bit_ceil_wrong_sub_constant(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 33, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 1
@@ -225,7 +225,7 @@ define i32 @bit_ceil_wrong_sub_constant(i32 %x) {
define i32 @bit_ceil_32_shl_used_twice(i32 %x, ptr %p) {
; CHECK-LABEL: @bit_ceil_32_shl_used_twice(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 1
@@ -247,7 +247,7 @@ define i32 @bit_ceil_32_shl_used_twice(i32 %x, ptr %p) {
define i32 @bit_ceil_32_sub_used_twice(i32 %x, ptr %p) {
; CHECK-LABEL: @bit_ceil_32_sub_used_twice(
; CHECK-NEXT: [[DEC:%.*]] = add i32 [[X:%.*]], -1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[DEC]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[UGT:%.*]] = icmp ugt i32 [[X]], 1
@@ -269,7 +269,7 @@ define i32 @bit_ceil_32_sub_used_twice(i32 %x, ptr %p) {
define <4 x i32> @bit_ceil_v4i32(<4 x i32> %x) {
; CHECK-LABEL: @bit_ceil_v4i32(
; CHECK-NEXT: [[DEC:%.*]] = add <4 x i32> [[X:%.*]], <i32 -1, i32 -1, i32 -1, i32 -1>
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[DEC]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[DEC]], i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw <4 x i32> zeroinitializer, [[CTLZ]]
; CHECK-NEXT: [[TMP2:%.*]] = and <4 x i32> [[TMP1]], <i32 31, i32 31, i32 31, i32 31>
; CHECK-NEXT: [[SEL:%.*]] = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, [[TMP2]]
diff --git a/llvm/test/Transforms/InstCombine/bit_floor.ll b/llvm/test/Transforms/InstCombine/bit_floor.ll
index 9daa8eee8969c0..bd8aabf4431c0a 100644
--- a/llvm/test/Transforms/InstCombine/bit_floor.ll
+++ b/llvm/test/Transforms/InstCombine/bit_floor.ll
@@ -5,7 +5,7 @@ define i32 @bit_floor_32(i32 %x) {
; CHECK-LABEL: @bit_floor_32(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -24,7 +24,7 @@ define i64 @bit_floor_64(i64 %x) {
; CHECK-LABEL: @bit_floor_64(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i64 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i64 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[LSHR]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i64 1, 65) i64 @llvm.ctlz.i64(i64 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i64 64, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i64 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i64 0, i64 [[SHL]]
@@ -44,7 +44,7 @@ define i32 @bit_floor_commuted_operands(i32 %x) {
; CHECK-LABEL: @bit_floor_commuted_operands(
; CHECK-NEXT: [[NE0_NOT:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[NE0_NOT]], i32 0, i32 [[SHL]]
@@ -64,7 +64,7 @@ define i32 @bit_floor_lshr_used_twice(i32 %x, ptr %p) {
; CHECK-LABEL: @bit_floor_lshr_used_twice(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -86,7 +86,7 @@ define i32 @bit_floor_ctlz_used_twice(i32 %x, ptr %p) {
; CHECK-LABEL: @bit_floor_ctlz_used_twice(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -108,7 +108,7 @@ define i32 @bit_floor_sub_used_twice(i32 %x, ptr %p) {
; CHECK-LABEL: @bit_floor_sub_used_twice(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -130,7 +130,7 @@ define i32 @bit_floor_shl_used_twice(i32 %x, ptr %p) {
; CHECK-LABEL: @bit_floor_shl_used_twice(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq i32 [[X:%.*]], 0
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 [[X]], 1
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw i32 32, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[EQ0]], i32 0, i32 [[SHL]]
@@ -152,7 +152,7 @@ define <4 x i32> @bit_floor_v4i32(<4 x i32> %x) {
; CHECK-LABEL: @bit_floor_v4i32(
; CHECK-NEXT: [[EQ0:%.*]] = icmp eq <4 x i32> [[X:%.*]], zeroinitializer
; CHECK-NEXT: [[LSHR:%.*]] = lshr <4 x i32> [[X]], <i32 1, i32 1, i32 1, i32 1>
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[LSHR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 1, 33) <4 x i32> @llvm.ctlz.v4i32(<4 x i32> [[LSHR]], i1 false)
; CHECK-NEXT: [[SUB:%.*]] = sub nuw nsw <4 x i32> <i32 32, i32 32, i32 32, i32 32>, [[CTLZ]]
; CHECK-NEXT: [[SHL:%.*]] = shl nuw <4 x i32> <i32 1, i32 1, i32 1, i32 1>, [[SUB]]
; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[EQ0]], <4 x i32> zeroinitializer, <4 x i32> [[SHL]]
diff --git a/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll b/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
index 66cbb2636cbc2b..9a9f359fa80b4a 100644
--- a/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
+++ b/llvm/test/Transforms/InstCombine/cmp-intrinsic.ll
@@ -125,7 +125,7 @@ define <2 x i1> @ctlz_ne_other_v2i32(<2 x i32> %a) {
define i1 @ctlz_eq_other_i32_multiuse(i32 %x, ptr %p) {
; CHECK-LABEL: @ctlz_eq_other_i32_multiuse(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: store i32 [[LZ]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[LZ]], 24
; CHECK-NEXT: ret i1 [[CMP]]
@@ -178,7 +178,7 @@ define i1 @ctlz_ugt_other_i32(i32 %x) {
define i1 @ctlz_ugt_other_multiuse_i32(i32 %x, ptr %p) {
; CHECK-LABEL: @ctlz_ugt_other_multiuse_i32(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: store i32 [[LZ]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[X]], 32768
; CHECK-NEXT: ret i1 [[CMP]]
@@ -221,7 +221,7 @@ define <2 x i1> @ctlz_ult_other_v2i32(<2 x i32> %x) {
define <2 x i1> @ctlz_ult_other_multiuse_v2i32(<2 x i32> %x, ptr %p) {
; CHECK-LABEL: @ctlz_ult_other_multiuse_v2i32(
-; CHECK-NEXT: [[LZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false)
; CHECK-NEXT: store <2 x i32> [[LZ]], ptr [[P:%.*]], align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[X]], <i32 65535, i32 65535>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
@@ -338,7 +338,7 @@ define <2 x i1> @cttz_ne_other_v2i32(<2 x i32> %a) {
define i1 @cttz_eq_other_i33_multiuse(i33 %x, ptr %p) {
; CHECK-LABEL: @cttz_eq_other_i33_multiuse(
-; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i33 0, 34) i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false)
; CHECK-NEXT: store i33 [[TZ]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i33 [[TZ]], 4
; CHECK-NEXT: ret i1 [[CMP]]
@@ -384,7 +384,7 @@ define i1 @cttz_ugt_other_i33(i33 %x) {
define i1 @cttz_ugt_other_multiuse_i33(i33 %x, ptr %p) {
; CHECK-LABEL: @cttz_ugt_other_multiuse_i33(
-; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i33 0, 34) i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false)
; CHECK-NEXT: store i33 [[TZ]], ptr [[P:%.*]], align 4
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i33 [[TZ]], 16
; CHECK-NEXT: ret i1 [[CMP]]
@@ -428,7 +428,7 @@ define <2 x i1> @cttz_ult_other_v2i32(<2 x i32> %x) {
define <2 x i1> @cttz_ult_other_multiuse_v2i32(<2 x i32> %x, ptr %p) {
; CHECK-LABEL: @cttz_ult_other_multiuse_v2i32(
-; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
; CHECK-NEXT: store <2 x i32> [[TZ]], ptr [[P:%.*]], align 8
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TZ]], <i32 16, i32 16>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
@@ -502,7 +502,7 @@ define <2 x i1> @ctpop_ne_bitwidth_v2i32(<2 x i32> %x) {
define i1 @ctpop_ugt_bitwidth_minus_one_i8(i8 %x, ptr %p) {
; CHECK-LABEL: @ctpop_ugt_bitwidth_minus_one_i8(
-; CHECK-NEXT: [[POP:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[POP:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: store i8 [[POP]], ptr [[P:%.*]], align 1
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], -1
; CHECK-NEXT: ret i1 [[CMP]]
@@ -563,7 +563,7 @@ define i1 @trunc_cttz_ult_other_i33_i6(i33 %x) {
define i1 @trunc_cttz_ult_other_i33_i5(i33 %x) {
; CHECK-LABEL: @trunc_cttz_ult_other_i33_i5(
-; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i33 0, 34) i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 true)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i33 [[TZ]] to i5
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i5 [[TRUNC]], 7
; CHECK-NEXT: ret i1 [[CMP]]
@@ -590,7 +590,7 @@ define i1 @trunc_cttz_true_ult_other_i32_i5(i32 %x) {
define i1 @trunc_cttz_false_ult_other_i32_i5(i32 %x) {
; CHECK-LABEL: @trunc_cttz_false_ult_other_i32_i5(
-; CHECK-NEXT: [[TZ:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[TZ]] to i5
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i5 [[TRUNC]], 7
; CHECK-NEXT: ret i1 [[CMP]]
@@ -617,7 +617,7 @@ define i1 @trunc_cttz_false_ult_other_i32_i6(i32 %x) {
define i1 @trunc_cttz_false_ult_other_i32_i6_extra_use(i32 %x) {
; CHECK-LABEL: @trunc_cttz_false_ult_other_i32_i6_extra_use(
-; CHECK-NEXT: [[TZ:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw i32 [[TZ]] to i6
; CHECK-NEXT: call void @use6(i6 [[TRUNC]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i6 [[TRUNC]], 7
@@ -667,7 +667,7 @@ define i1 @trunc_ctlz_ugt_other_i33_i6(i33 %x) {
define i1 @trunc_ctlz_ugt_other_i33_i5(i33 %x) {
; CHECK-LABEL: @trunc_ctlz_ugt_other_i33_i5(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i33 @llvm.ctlz.i33(i33 [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i33 0, 34) i33 @llvm.ctlz.i33(i33 [[X:%.*]], i1 true)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i33 [[LZ]] to i5
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i5 [[TRUNC]], 4
; CHECK-NEXT: ret i1 [[CMP]]
@@ -693,7 +693,7 @@ define i1 @trunc_ctlz_true_ugt_other_i32_i5(i32 %x) {
define i1 @trunc_ctlz_false_ugt_other_i32_i5(i32 %x) {
; CHECK-LABEL: @trunc_ctlz_false_ugt_other_i32_i5(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[LZ]] to i5
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i5 [[TRUNC]], 4
; CHECK-NEXT: ret i1 [[CMP]]
@@ -719,7 +719,7 @@ define i1 @trunc_ctlz_false_ugt_other_i32_i6(i32 %x) {
define i1 @trunc_ctlz_false_ugt_other_i32_i6_extra_use(i32 %x) {
; CHECK-LABEL: @trunc_ctlz_false_ugt_other_i32_i6_extra_use(
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw i32 [[LZ]] to i6
; CHECK-NEXT: call void @use6(i6 [[TRUNC]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i6 [[TRUNC]], 4
@@ -758,7 +758,7 @@ define i1 @trunc_ctpop_eq_bitwidth_i8(i8 %x) {
define i1 @trunc_negative_destbits_not_enough(i33 %x) {
; CHECK-LABEL: @trunc_negative_destbits_not_enough(
-; CHECK-NEXT: [[TZ:%.*]] = tail call i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i33 0, 34) i33 @llvm.cttz.i33(i33 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i33 [[TZ]] to i4
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i4 [[TRUNC]], 7
; CHECK-NEXT: ret i1 [[CMP]]
diff --git a/llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll b/llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll
index a5189f47650569..ec822f4b8fb3a5 100644
--- a/llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll
+++ b/llvm/test/Transforms/InstCombine/ctlz-cttz-bitreverse.ll
@@ -3,7 +3,7 @@
define i32 @ctlz_true_bitreverse(i32 %x) {
; CHECK-LABEL: @ctlz_true_bitreverse(
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bitreverse.i32(i32 %x)
@@ -13,7 +13,7 @@ define i32 @ctlz_true_bitreverse(i32 %x) {
define <2 x i64> @ctlz_true_bitreverse_vec(<2 x i64> %x) {
; CHECK-LABEL: @ctlz_true_bitreverse_vec(
-; CHECK-NEXT: [[B:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 true)
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = tail call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %x)
@@ -23,7 +23,7 @@ define <2 x i64> @ctlz_true_bitreverse_vec(<2 x i64> %x) {
define i32 @ctlz_false_bitreverse(i32 %x) {
; CHECK-LABEL: @ctlz_false_bitreverse(
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bitreverse.i32(i32 %x)
@@ -33,7 +33,7 @@ define i32 @ctlz_false_bitreverse(i32 %x) {
define i32 @cttz_true_bitreverse(i32 %x) {
; CHECK-LABEL: @cttz_true_bitreverse(
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bitreverse.i32(i32 %x)
@@ -43,7 +43,7 @@ define i32 @cttz_true_bitreverse(i32 %x) {
define <2 x i64> @cttz_true_bitreverse_vec(<2 x i64> %x) {
; CHECK-LABEL: @cttz_true_bitreverse_vec(
-; CHECK-NEXT: [[B:%.*]] = call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.ctlz.v2i64(<2 x i64> [[X:%.*]], i1 true)
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = tail call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %x)
@@ -53,7 +53,7 @@ define <2 x i64> @cttz_true_bitreverse_vec(<2 x i64> %x) {
define i32 @cttz_false_bitreverse(i32 %x) {
; CHECK-LABEL: @cttz_false_bitreverse(
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bitreverse.i32(i32 %x)
diff --git a/llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll b/llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
index 86fef51872b190..15aa87f72c49a1 100644
--- a/llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
+++ b/llvm/test/Transforms/InstCombine/ctlz-cttz-shifts.ll
@@ -122,7 +122,7 @@ define <2 x i32> @vec2_shl_nsw_ctlz_true_neg(<2 x i32>) {
; CHECK-LABEL: define <2 x i32> @vec2_shl_nsw_ctlz_true_neg(
; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
; CHECK-NEXT: [[SHL:%.*]] = shl nsw <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
-; CHECK-NEXT: [[CTLZ:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 1, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
;
%shl = shl nsw <2 x i32> <i32 8387584, i32 4276440>, %0
@@ -134,7 +134,7 @@ define <2 x i32> @vec2_lshr_ctlz_false_neg(<2 x i32>) {
; CHECK-LABEL: define <2 x i32> @vec2_lshr_ctlz_false_neg(
; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
; CHECK-NEXT: [[DIV:%.*]] = lshr <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
-; CHECK-NEXT: [[CTLZ:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[DIV]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 9, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[DIV]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
;
%div = lshr <2 x i32> <i32 8387584, i32 4276440>, %0
@@ -146,7 +146,7 @@ define <2 x i32> @vec2_shl_ctlz_false_neg(<2 x i32>) {
; CHECK-LABEL: define <2 x i32> @vec2_shl_ctlz_false_neg(
; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
-; CHECK-NEXT: [[CTLZ:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 false), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[SHL]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
;
%shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0
@@ -158,7 +158,7 @@ define <2 x i32> @vec2_lshr_cttz_false_neg(<2 x i32>) {
; CHECK-LABEL: define <2 x i32> @vec2_lshr_cttz_false_neg(
; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
; CHECK-NEXT: [[LSHR:%.*]] = lshr <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
-; CHECK-NEXT: [[CTTZ:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[LSHR]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[LSHR]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
;
%lshr = lshr <2 x i32> <i32 8387584, i32 4276440>, %0
@@ -170,7 +170,7 @@ define <2 x i32> @vec2_shl_cttz_false_neg(<2 x i32>) {
; CHECK-LABEL: define <2 x i32> @vec2_shl_cttz_false_neg(
; CHECK-SAME: <2 x i32> [[TMP0:%.*]]) {
; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> <i32 8387584, i32 4276440>, [[TMP0]]
-; CHECK-NEXT: [[CTTZ:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[SHL]], i1 false), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 3, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[SHL]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
;
%shl = shl <2 x i32> <i32 8387584, i32 4276440>, %0
@@ -182,7 +182,7 @@ define i32 @lshr_ctlz_faslse_neg(i32) {
; CHECK-LABEL: define i32 @lshr_ctlz_faslse_neg(
; CHECK-SAME: i32 [[TMP0:%.*]]) {
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 8387584, [[TMP0]]
-; CHECK-NEXT: [[CTLZ:%.*]] = call i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 9, 33) i32 @llvm.ctlz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: ret i32 [[CTLZ]]
;
%lshr = lshr i32 8387584, %0
@@ -194,7 +194,7 @@ define i32 @shl_ctlz_false_neg(i32) {
; CHECK-LABEL: define i32 @shl_ctlz_false_neg(
; CHECK-SAME: i32 [[TMP0:%.*]]) {
; CHECK-NEXT: [[SHL:%.*]] = shl i32 8387584, [[TMP0]]
-; CHECK-NEXT: [[CTLZ:%.*]] = call i32 @llvm.ctlz.i32(i32 [[SHL]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[SHL]], i1 false)
; CHECK-NEXT: ret i32 [[CTLZ]]
;
%shl = shl i32 8387584, %0
@@ -206,7 +206,7 @@ define i32 @lshr_cttz_false_neg(i32) {
; CHECK-LABEL: define i32 @lshr_cttz_false_neg(
; CHECK-SAME: i32 [[TMP0:%.*]]) {
; CHECK-NEXT: [[LSHR:%.*]] = lshr i32 8387584, [[TMP0]]
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[LSHR]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[LSHR]], i1 false)
; CHECK-NEXT: ret i32 [[CTTZ]]
;
%lshr = lshr i32 8387584, %0
@@ -218,17 +218,10 @@ define i32 @shl_cttz_false_neg(i32) {
; CHECK-LABEL: define i32 @shl_cttz_false_neg(
; CHECK-SAME: i32 [[TMP0:%.*]]) {
; CHECK-NEXT: [[SHL:%.*]] = shl i32 8387584, [[TMP0]]
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[SHL]], i1 false), !range [[RNG4:![0-9]+]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 10, 33) i32 @llvm.cttz.i32(i32 [[SHL]], i1 false)
; CHECK-NEXT: ret i32 [[CTTZ]]
;
%shl = shl i32 8387584, %0
%cttz = call i32 @llvm.cttz.i32(i32 %shl, i1 false)
ret i32 %cttz
}
-;.
-; CHECK: [[RNG0]] = !{i32 1, i32 33}
-; CHECK: [[RNG1]] = !{i32 9, i32 33}
-; CHECK: [[RNG2]] = !{i32 0, i32 33}
-; CHECK: [[RNG3]] = !{i32 3, i32 33}
-; CHECK: [[RNG4]] = !{i32 10, i32 33}
-;.
diff --git a/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll b/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
index 2f523f90edda88..7e4050873dc924 100644
--- a/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop-bswap-bitreverse.ll
@@ -3,7 +3,7 @@
define i32 @ctpop_bitreverse(i32 %x) {
; CHECK-LABEL: @ctpop_bitreverse(
-; CHECK-NEXT: [[B:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[B:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bitreverse.i32(i32 %x)
@@ -13,7 +13,7 @@ define i32 @ctpop_bitreverse(i32 %x) {
define <2 x i64> @ctpop_bitreverse_vec(<2 x i64> %x) {
; CHECK-LABEL: @ctpop_bitreverse_vec(
-; CHECK-NEXT: [[B:%.*]] = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]]), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]])
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = tail call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %x)
@@ -23,7 +23,7 @@ define <2 x i64> @ctpop_bitreverse_vec(<2 x i64> %x) {
define i32 @ctpop_bswap(i32 %x) {
; CHECK-LABEL: @ctpop_bswap(
-; CHECK-NEXT: [[B:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[B:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: ret i32 [[B]]
;
%a = tail call i32 @llvm.bswap.i32(i32 %x)
@@ -33,7 +33,7 @@ define i32 @ctpop_bswap(i32 %x) {
define <2 x i64> @ctpop_bswap_vec(<2 x i64> %x) {
; CHECK-LABEL: @ctpop_bswap_vec(
-; CHECK-NEXT: [[B:%.*]] = tail call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> [[X:%.*]])
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = tail call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %x)
diff --git a/llvm/test/Transforms/InstCombine/ctpop-cttz.ll b/llvm/test/Transforms/InstCombine/ctpop-cttz.ll
index 70868554bdc1bb..a505654fa96e7f 100644
--- a/llvm/test/Transforms/InstCombine/ctpop-cttz.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop-cttz.ll
@@ -8,7 +8,7 @@ declare <2 x i32> @llvm.ctpop.v2i32(<2 x i32>)
; __builtin_popcount(i | -i) -> 32 - __builtin_cttz(i, false)
define i32 @ctpop1(i32 %0) {
; CHECK-LABEL: @ctpop1(
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[TMP0:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[TMP2]]
;
%2 = sub i32 0, %0
@@ -20,7 +20,7 @@ define i32 @ctpop1(i32 %0) {
define <2 x i32> @ctpop1v(<2 x i32> %0) {
; CHECK-LABEL: @ctpop1v(
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false)
; CHECK-NEXT: [[TMP3:%.*]] = sub nuw nsw <2 x i32> <i32 32, i32 32>, [[TMP2]]
; CHECK-NEXT: ret <2 x i32> [[TMP3]]
;
@@ -35,7 +35,7 @@ define i32 @ctpop1_multiuse(i32 %0) {
; CHECK-NEXT: [[TMP2:%.*]] = sub i32 0, [[TMP0:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = or i32 [[TMP2]], [[TMP0]]
; CHECK-NEXT: [[TMP4:%.*]] = xor i32 [[TMP3]], -1
-; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP4]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP5:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP4]])
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[TMP3]]
; CHECK-NEXT: ret i32 [[TMP6]]
;
@@ -51,7 +51,7 @@ define i32 @ctpop1_multiuse(i32 %0) {
; __builtin_popcount(~i & (i-1)) -> __builtin_cttz(i, false)
define i32 @ctpop2(i32 %0) {
; CHECK-LABEL: @ctpop2(
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[TMP0:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[TMP2]]
;
%2 = xor i32 %0, -1
@@ -63,7 +63,7 @@ define i32 @ctpop2(i32 %0) {
define <2 x i32> @ctpop2v(<2 x i32> %0) {
; CHECK-LABEL: @ctpop2v(
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[TMP2]]
;
%2 = xor <2 x i32> %0, <i32 -1, i32 -1>
@@ -78,7 +78,7 @@ define i32 @ctpop2_multiuse(i32 %0) {
; CHECK-NEXT: [[TMP2:%.*]] = xor i32 [[TMP0:%.*]], -1
; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[TMP0]], -1
; CHECK-NEXT: [[TMP4:%.*]] = and i32 [[TMP3]], [[TMP2]]
-; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP5:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false)
; CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP5]], [[TMP4]]
; CHECK-NEXT: ret i32 [[TMP6]]
;
@@ -94,7 +94,7 @@ define i32 @ctpop2_multiuse(i32 %0) {
; __builtin_popcount((i & -i) - 1) -> __builtin_cttz(i, false)
define i32 @ctpop3(i32 %0) {
; CHECK-LABEL: @ctpop3(
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP0:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[TMP0:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[TMP2]]
;
%2 = sub i32 0, %0
@@ -106,7 +106,7 @@ define i32 @ctpop3(i32 %0) {
define <2 x i32> @ctpop3v(<2 x i32> %0) {
; CHECK-LABEL: @ctpop3v(
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[TMP2]]
;
%2 = sub <2 x i32> zeroinitializer, %0
@@ -118,7 +118,7 @@ define <2 x i32> @ctpop3v(<2 x i32> %0) {
define <2 x i32> @ctpop3v_poison(<2 x i32> %0) {
; CHECK-LABEL: @ctpop3v_poison(
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[TMP2]]
;
%2 = sub <2 x i32> zeroinitializer, %0
diff --git a/llvm/test/Transforms/InstCombine/ctpop-pow2.ll b/llvm/test/Transforms/InstCombine/ctpop-pow2.ll
index f6757c2ff33cfa..7facdaf7590d38 100644
--- a/llvm/test/Transforms/InstCombine/ctpop-pow2.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop-pow2.ll
@@ -60,7 +60,7 @@ define i8 @ctpop_imin_plus1_lshr_nz(i8 %x) {
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 [[X:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
; CHECK-NEXT: [[V:%.*]] = lshr i8 -127, [[X]]
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[V]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[V]])
; CHECK-NEXT: ret i8 [[CNT]]
;
%cmp = icmp ne i8 %x, 0
@@ -104,7 +104,7 @@ define <2 x i32> @ctpop_lshr_intmin_intmin_plus1_vec_nz(<2 x i32> %x) {
; CHECK-LABEL: @ctpop_lshr_intmin_intmin_plus1_vec_nz(
; CHECK-NEXT: [[X1:%.*]] = or <2 x i32> [[X:%.*]], <i32 1, i32 1>
; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i32> <i32 -2147483648, i32 -2147483647>, [[X1]]
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHR]]), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHR]])
; CHECK-NEXT: ret <2 x i32> [[CNT]]
;
%x1 = or <2 x i32> %x, <i32 1 ,i32 1>
diff --git a/llvm/test/Transforms/InstCombine/ctpop.ll b/llvm/test/Transforms/InstCombine/ctpop.ll
index b3653e5071ba25..83700e72de0809 100644
--- a/llvm/test/Transforms/InstCombine/ctpop.ll
+++ b/llvm/test/Transforms/InstCombine/ctpop.ll
@@ -49,7 +49,7 @@ define i1 @test3(i32 %arg) {
; Negative test for when we know nothing
define i1 @test4(i8 %arg) {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[ARG:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[ARG:%.*]])
; CHECK-NEXT: [[RES:%.*]] = icmp eq i8 [[CNT]], 2
; CHECK-NEXT: ret i1 [[RES]]
;
@@ -118,7 +118,7 @@ define <2 x i32> @mask_one_bit_splat(<2 x i32> %x, ptr %p) {
define i32 @_parity_of_not(i32 %x) {
; CHECK-LABEL: @_parity_of_not(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = and i32 [[TMP1]], 1
; CHECK-NEXT: ret i32 [[R]]
;
@@ -133,7 +133,7 @@ define i32 @_parity_of_not(i32 %x) {
define i7 @_parity_of_not_odd_type(i7 %x) {
; CHECK-LABEL: @_parity_of_not_odd_type(
; CHECK-NEXT: [[NEG:%.*]] = xor i7 [[X:%.*]], -1
-; CHECK-NEXT: [[CNT:%.*]] = tail call i7 @llvm.ctpop.i7(i7 [[NEG]]), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = tail call range(i7 0, 8) i7 @llvm.ctpop.i7(i7 [[NEG]])
; CHECK-NEXT: [[R:%.*]] = and i7 [[CNT]], 1
; CHECK-NEXT: ret i7 [[R]]
;
@@ -145,7 +145,7 @@ define i7 @_parity_of_not_odd_type(i7 %x) {
define <2 x i32> @_parity_of_not_vec(<2 x i32> %x) {
; CHECK-LABEL: @_parity_of_not_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
@@ -157,7 +157,7 @@ define <2 x i32> @_parity_of_not_vec(<2 x i32> %x) {
define <2 x i32> @_parity_of_not_poison(<2 x i32> %x) {
; CHECK-LABEL: @_parity_of_not_poison(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
@@ -169,7 +169,7 @@ define <2 x i32> @_parity_of_not_poison(<2 x i32> %x) {
define <2 x i32> @_parity_of_not_poison2(<2 x i32> %x) {
; CHECK-LABEL: @_parity_of_not_poison2(
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = and <2 x i32> [[CNT]], <i32 1, i32 poison>
; CHECK-NEXT: ret <2 x i32> [[R]]
;
@@ -200,7 +200,7 @@ define i32 @ctpop_add(i32 %a, i32 %b) {
define i32 @ctpop_add_no_common_bits(i32 %a, i32 %b) {
; CHECK-LABEL: @ctpop_add_no_common_bits(
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.fshl.i32(i32 [[A:%.*]], i32 [[B:%.*]], i32 16)
-; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[RES:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
; CHECK-NEXT: ret i32 [[RES]]
;
%shl16 = shl i32 %a, 16
@@ -214,7 +214,7 @@ define i32 @ctpop_add_no_common_bits(i32 %a, i32 %b) {
define <2 x i32> @ctpop_add_no_common_bits_vec(<2 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: @ctpop_add_no_common_bits_vec(
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]], <2 x i32> <i32 16, i32 16>)
-; CHECK-NEXT: [[RES:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[RES:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]])
; CHECK-NEXT: ret <2 x i32> [[RES]]
;
%shl16 = shl <2 x i32> %a, <i32 16, i32 16>
@@ -228,9 +228,9 @@ define <2 x i32> @ctpop_add_no_common_bits_vec(<2 x i32> %a, <2 x i32> %b) {
define <2 x i32> @ctpop_add_no_common_bits_vec_use(<2 x i32> %a, <2 x i32> %b, ptr %p) {
; CHECK-LABEL: @ctpop_add_no_common_bits_vec_use(
; CHECK-NEXT: [[SHL16:%.*]] = shl <2 x i32> [[A:%.*]], <i32 16, i32 16>
-; CHECK-NEXT: [[CTPOP1:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]]), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[CTPOP1:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]])
; CHECK-NEXT: [[LSHL16:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 16, i32 16>
-; CHECK-NEXT: [[CTPOP2:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]]), !range [[RNG3]]
+; CHECK-NEXT: [[CTPOP2:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]])
; CHECK-NEXT: store <2 x i32> [[CTPOP2]], ptr [[P:%.*]], align 8
; CHECK-NEXT: [[RES:%.*]] = add nuw nsw <2 x i32> [[CTPOP1]], [[CTPOP2]]
; CHECK-NEXT: ret <2 x i32> [[RES]]
@@ -247,10 +247,10 @@ define <2 x i32> @ctpop_add_no_common_bits_vec_use(<2 x i32> %a, <2 x i32> %b, p
define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b, ptr %p) {
; CHECK-LABEL: @ctpop_add_no_common_bits_vec_use2(
; CHECK-NEXT: [[SHL16:%.*]] = shl <2 x i32> [[A:%.*]], <i32 16, i32 16>
-; CHECK-NEXT: [[CTPOP1:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]]), !range [[RNG3]]
+; CHECK-NEXT: [[CTPOP1:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[SHL16]])
; CHECK-NEXT: store <2 x i32> [[CTPOP1]], ptr [[P:%.*]], align 8
; CHECK-NEXT: [[LSHL16:%.*]] = lshr <2 x i32> [[B:%.*]], <i32 16, i32 16>
-; CHECK-NEXT: [[CTPOP2:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]]), !range [[RNG3]]
+; CHECK-NEXT: [[CTPOP2:%.*]] = tail call range(i32 0, 17) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[LSHL16]])
; CHECK-NEXT: [[RES:%.*]] = add nuw nsw <2 x i32> [[CTPOP1]], [[CTPOP2]]
; CHECK-NEXT: ret <2 x i32> [[RES]]
;
@@ -265,7 +265,7 @@ define <2 x i32> @ctpop_add_no_common_bits_vec_use2(<2 x i32> %a, <2 x i32> %b,
define i8 @ctpop_rotate_left(i8 %a, i8 %amt) {
; CHECK-LABEL: @ctpop_rotate_left(
-; CHECK-NEXT: [[RES:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[RES:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
; CHECK-NEXT: ret i8 [[RES]]
;
%rotl = tail call i8 @llvm.fshl.i8(i8 %a, i8 %a, i8 %amt)
@@ -275,7 +275,7 @@ define i8 @ctpop_rotate_left(i8 %a, i8 %amt) {
define i8 @ctpop_rotate_right(i8 %a, i8 %amt) {
; CHECK-LABEL: @ctpop_rotate_right(
-; CHECK-NEXT: [[RES:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[RES:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
; CHECK-NEXT: ret i8 [[RES]]
;
%rotr = tail call i8 @llvm.fshr.i8(i8 %a, i8 %a, i8 %amt)
@@ -289,7 +289,7 @@ declare i8 @llvm.fshr.i8(i8, i8, i8)
define i8 @sub_ctpop(i8 %a) {
; CHECK-LABEL: @sub_ctpop(
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[A:%.*]], -1
-; CHECK-NEXT: [[RES:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]]
+; CHECK-NEXT: [[RES:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: ret i8 [[RES]]
;
%cnt = tail call i8 @llvm.ctpop.i8(i8 %a)
@@ -299,7 +299,7 @@ define i8 @sub_ctpop(i8 %a) {
define i8 @sub_ctpop_wrong_cst(i8 %a) {
; CHECK-LABEL: @sub_ctpop_wrong_cst(
-; CHECK-NEXT: [[CNT:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
; CHECK-NEXT: [[RES:%.*]] = sub nsw i8 5, [[CNT]]
; CHECK-NEXT: ret i8 [[RES]]
;
@@ -310,7 +310,7 @@ define i8 @sub_ctpop_wrong_cst(i8 %a) {
define i8 @sub_ctpop_unknown(i8 %a, i8 %b) {
; CHECK-LABEL: @sub_ctpop_unknown(
-; CHECK-NEXT: [[CNT:%.*]] = tail call i8 @llvm.ctpop.i8(i8 [[A:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = tail call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[A:%.*]])
; CHECK-NEXT: [[RES:%.*]] = sub i8 [[B:%.*]], [[CNT]]
; CHECK-NEXT: ret i8 [[RES]]
;
@@ -322,7 +322,7 @@ define i8 @sub_ctpop_unknown(i8 %a, i8 %b) {
define <2 x i32> @sub_ctpop_vec(<2 x i32> %a) {
; CHECK-LABEL: @sub_ctpop_vec(
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[A:%.*]], <i32 -1, i32 -1>
-; CHECK-NEXT: [[RES:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[RES:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]])
; CHECK-NEXT: ret <2 x i32> [[RES]]
;
%cnt = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> %a)
@@ -332,7 +332,7 @@ define <2 x i32> @sub_ctpop_vec(<2 x i32> %a) {
define <2 x i32> @sub_ctpop_vec_extra_use(<2 x i32> %a, ptr %p) {
; CHECK-LABEL: @sub_ctpop_vec_extra_use(
-; CHECK-NEXT: [[CNT:%.*]] = tail call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[A:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[CNT:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[A:%.*]])
; CHECK-NEXT: store <2 x i32> [[CNT]], ptr [[P:%.*]], align 8
; CHECK-NEXT: [[RES:%.*]] = sub nuw nsw <2 x i32> <i32 32, i32 32>, [[CNT]]
; CHECK-NEXT: ret <2 x i32> [[RES]]
@@ -345,7 +345,7 @@ define <2 x i32> @sub_ctpop_vec_extra_use(<2 x i32> %a, ptr %p) {
define i32 @zext_ctpop(i16 %x) {
; CHECK-LABEL: @zext_ctpop(
-; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ctpop.i16(i16 [[X:%.*]]), !range [[RNG4:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) i16 @llvm.ctpop.i16(i16 [[X:%.*]])
; CHECK-NEXT: [[P:%.*]] = zext nneg i16 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[P]]
;
@@ -356,7 +356,7 @@ define i32 @zext_ctpop(i16 %x) {
define <2 x i32> @zext_ctpop_vec(<2 x i7> %x) {
; CHECK-LABEL: @zext_ctpop_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i7> @llvm.ctpop.v2i7(<2 x i7> [[X:%.*]]), !range [[RNG2]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i7 0, 8) <2 x i7> @llvm.ctpop.v2i7(<2 x i7> [[X:%.*]])
; CHECK-NEXT: [[P:%.*]] = zext nneg <2 x i7> [[TMP1]] to <2 x i32>
; CHECK-NEXT: ret <2 x i32> [[P]]
;
@@ -369,7 +369,7 @@ define i32 @zext_ctpop_extra_use(i16 %x, ptr %q) {
; CHECK-LABEL: @zext_ctpop_extra_use(
; CHECK-NEXT: [[Z:%.*]] = zext i16 [[X:%.*]] to i32
; CHECK-NEXT: store i32 [[Z]], ptr [[Q:%.*]], align 4
-; CHECK-NEXT: [[P:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Z]]), !range [[RNG3]]
+; CHECK-NEXT: [[P:%.*]] = call range(i32 0, 17) i32 @llvm.ctpop.i32(i32 [[Z]])
; CHECK-NEXT: ret i32 [[P]]
;
%z = zext i16 %x to i32
@@ -381,7 +381,7 @@ define i32 @zext_ctpop_extra_use(i16 %x, ptr %q) {
define i32 @parity_xor(i32 %arg, i32 %arg1) {
; CHECK-LABEL: @parity_xor(
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[ARG1:%.*]], [[ARG:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
; CHECK-NEXT: [[I4:%.*]] = and i32 [[TMP2]], 1
; CHECK-NEXT: ret i32 [[I4]]
;
@@ -395,7 +395,7 @@ define i32 @parity_xor(i32 %arg, i32 %arg1) {
define i32 @parity_xor_trunc(i64 %arg, i64 %arg1) {
; CHECK-LABEL: @parity_xor_trunc(
; CHECK-NEXT: [[TMP1:%.*]] = xor i64 [[ARG1:%.*]], [[ARG:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.ctpop.i64(i64 [[TMP1]]), !range [[RNG5:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[TMP1]])
; CHECK-NEXT: [[I4:%.*]] = trunc nuw nsw i64 [[TMP2]] to i32
; CHECK-NEXT: [[I5:%.*]] = and i32 [[I4]], 1
; CHECK-NEXT: ret i32 [[I5]]
@@ -411,7 +411,7 @@ define i32 @parity_xor_trunc(i64 %arg, i64 %arg1) {
define <2 x i32> @parity_xor_vec(<2 x i32> %arg, <2 x i32> %arg1) {
; CHECK-LABEL: @parity_xor_vec(
; CHECK-NEXT: [[TMP1:%.*]] = xor <2 x i32> [[ARG1:%.*]], [[ARG:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[TMP1]])
; CHECK-NEXT: [[I4:%.*]] = and <2 x i32> [[TMP2]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i32> [[I4]]
;
@@ -424,8 +424,8 @@ define <2 x i32> @parity_xor_vec(<2 x i32> %arg, <2 x i32> %arg1) {
define i32 @parity_xor_wrong_cst(i32 %arg, i32 %arg1) {
; CHECK-LABEL: @parity_xor_wrong_cst(
-; CHECK-NEXT: [[I:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG:%.*]]), !range [[RNG1]]
-; CHECK-NEXT: [[I2:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[I:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG:%.*]])
+; CHECK-NEXT: [[I2:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]])
; CHECK-NEXT: [[I3:%.*]] = xor i32 [[I2]], [[I]]
; CHECK-NEXT: [[I4:%.*]] = and i32 [[I3]], 3
; CHECK-NEXT: ret i32 [[I4]]
@@ -439,11 +439,11 @@ define i32 @parity_xor_wrong_cst(i32 %arg, i32 %arg1) {
define i32 @parity_xor_extra_use(i32 %arg, i32 %arg1) {
; CHECK-LABEL: @parity_xor_extra_use(
-; CHECK-NEXT: [[I:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[I:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG:%.*]])
; CHECK-NEXT: [[I2:%.*]] = and i32 [[I]], 1
; CHECK-NEXT: tail call void @use(i32 [[I2]])
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[ARG1:%.*]], [[ARG]]
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
; CHECK-NEXT: [[I5:%.*]] = and i32 [[TMP2]], 1
; CHECK-NEXT: ret i32 [[I5]]
;
@@ -458,11 +458,11 @@ define i32 @parity_xor_extra_use(i32 %arg, i32 %arg1) {
define i32 @parity_xor_extra_use2(i32 %arg, i32 %arg1) {
; CHECK-LABEL: @parity_xor_extra_use2(
-; CHECK-NEXT: [[I:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[I:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[ARG1:%.*]])
; CHECK-NEXT: [[I2:%.*]] = and i32 [[I]], 1
; CHECK-NEXT: tail call void @use(i32 [[I2]])
; CHECK-NEXT: [[TMP1:%.*]] = xor i32 [[ARG1]], [[ARG:%.*]]
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctpop.i32(i32 [[TMP1]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[TMP1]])
; CHECK-NEXT: [[I5:%.*]] = and i32 [[TMP2]], 1
; CHECK-NEXT: ret i32 [[I5]]
;
@@ -477,7 +477,7 @@ define i32 @parity_xor_extra_use2(i32 %arg, i32 %arg1) {
define i32 @select_ctpop_zero(i32 %x) {
; CHECK-LABEL: @select_ctpop_zero(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: ret i32 [[CTPOP]]
;
%ctpop = call i32 @llvm.ctpop.i32(i32 %x)
diff --git a/llvm/test/Transforms/InstCombine/cttz-abs.ll b/llvm/test/Transforms/InstCombine/cttz-abs.ll
index 0141b2cd71cec9..9d3b6168e710be 100644
--- a/llvm/test/Transforms/InstCombine/cttz-abs.ll
+++ b/llvm/test/Transforms/InstCombine/cttz-abs.ll
@@ -3,7 +3,7 @@
define i32 @cttz_abs(i32 %x) {
; CHECK-LABEL: @cttz_abs(
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@@ -15,7 +15,7 @@ define i32 @cttz_abs(i32 %x) {
define <2 x i64> @cttz_abs_vec(<2 x i64> %x) {
; CHECK-LABEL: @cttz_abs_vec(
-; CHECK-NEXT: [[R:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[R:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[R]]
;
%c = icmp slt <2 x i64> %x, zeroinitializer
@@ -29,7 +29,7 @@ define i32 @cttz_abs2(i32 %x) {
; CHECK-LABEL: @cttz_abs2(
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], 0
; CHECK-NEXT: call void @use_cond(i1 [[C]])
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, 0
@@ -44,7 +44,7 @@ define i32 @cttz_abs3(i32 %x) {
; CHECK-LABEL: @cttz_abs3(
; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[X:%.*]], -1
; CHECK-NEXT: call void @use_cond(i1 [[C]])
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, -1
@@ -57,7 +57,7 @@ define i32 @cttz_abs3(i32 %x) {
define i32 @cttz_abs4(i32 %x) {
; CHECK-LABEL: @cttz_abs4(
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@@ -69,7 +69,7 @@ define i32 @cttz_abs4(i32 %x) {
define i32 @cttz_nabs(i32 %x) {
; CHECK-LABEL: @cttz_nabs(
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@@ -81,7 +81,7 @@ define i32 @cttz_nabs(i32 %x) {
define <2 x i64> @cttz_nabs_vec(<2 x i64> %x) {
; CHECK-LABEL: @cttz_nabs_vec(
-; CHECK-NEXT: [[R:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[R:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[R]]
;
%c = icmp slt <2 x i64> %x, zeroinitializer
@@ -93,7 +93,7 @@ define <2 x i64> @cttz_nabs_vec(<2 x i64> %x) {
define i64 @cttz_abs_64(i64 %x) {
; CHECK-LABEL: @cttz_abs_64(
-; CHECK-NEXT: [[R:%.*]] = call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[R:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[R]]
;
%c = icmp slt i64 %x, 0
@@ -107,7 +107,7 @@ define i32 @cttz_abs_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_abs_multiuse(
; CHECK-NEXT: [[D:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: call void @use_abs(i32 [[D]])
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@@ -123,7 +123,7 @@ define i32 @cttz_nabs_multiuse(i32 %x) {
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.abs.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[D:%.*]] = sub i32 0, [[TMP1]]
; CHECK-NEXT: call void @use_abs(i32 [[D]])
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 1
@@ -141,7 +141,7 @@ define i32 @no_cttz_abs(i32 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 2
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[D]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 2
@@ -156,7 +156,7 @@ define i32 @no_cttz_abs2(i32 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt i32 [[X:%.*]], 0
; CHECK-NEXT: [[S:%.*]] = sub i32 1, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[S]], i32 [[X]]
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[D]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp slt i32 %x, 0
@@ -172,7 +172,7 @@ define i32 @no_cttz_abs3(i32 %x) {
; CHECK-NEXT: call void @use_cond(i1 [[C]])
; CHECK-NEXT: [[S:%.*]] = sub i32 0, [[X]]
; CHECK-NEXT: [[D:%.*]] = select i1 [[C]], i32 [[X]], i32 [[S]]
-; CHECK-NEXT: [[R:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[D]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[D]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%c = icmp sgt i32 %x, -2
@@ -188,7 +188,7 @@ define <2 x i64> @no_cttz_abs_vec(<2 x i64> %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i64> [[X:%.*]], <i64 2, i64 1>
; CHECK-NEXT: [[S:%.*]] = sub <2 x i64> <i64 1, i64 0>, [[X]]
; CHECK-NEXT: [[D:%.*]] = select <2 x i1> [[C]], <2 x i64> [[S]], <2 x i64> [[X]]
-; CHECK-NEXT: [[R:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[D]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[R:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[D]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[R]]
;
%c = icmp slt <2 x i64> %x, <i64 2, i64 1>
@@ -203,7 +203,7 @@ define <2 x i64> @no_cttz_nabs_vec(<2 x i64> %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt <2 x i64> [[X:%.*]], <i64 2, i64 1>
; CHECK-NEXT: [[S:%.*]] = sub <2 x i64> <i64 1, i64 0>, [[X]]
; CHECK-NEXT: [[D:%.*]] = select <2 x i1> [[C]], <2 x i64> [[X]], <2 x i64> [[S]]
-; CHECK-NEXT: [[R:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[D]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[R:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[D]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[R]]
;
%c = icmp slt <2 x i64> %x, <i64 2, i64 1>
@@ -215,7 +215,7 @@ define <2 x i64> @no_cttz_nabs_vec(<2 x i64> %x) {
define i32 @cttz_abs_intrin(i32 %x) {
; CHECK-LABEL: @cttz_abs_intrin(
-; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[R]]
;
%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
@@ -225,7 +225,7 @@ define i32 @cttz_abs_intrin(i32 %x) {
define i32 @cttz_nabs_intrin(i32 %x) {
; CHECK-LABEL: @cttz_nabs_intrin(
-; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[R]]
;
%a = call i32 @llvm.abs.i32(i32 %x, i1 false)
diff --git a/llvm/test/Transforms/InstCombine/cttz-negative.ll b/llvm/test/Transforms/InstCombine/cttz-negative.ll
index 139da840af9e4e..6f812e420935db 100644
--- a/llvm/test/Transforms/InstCombine/cttz-negative.ll
+++ b/llvm/test/Transforms/InstCombine/cttz-negative.ll
@@ -3,7 +3,7 @@
define i32 @cttz_neg_value(i32 %x) {
; CHECK-LABEL: @cttz_neg_value(
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[B]]
;
%a = sub i32 0, %x
@@ -15,7 +15,7 @@ define i32 @cttz_neg_value_multiuse(i32 %x) {
; CHECK-LABEL: @cttz_neg_value_multiuse(
; CHECK-NEXT: [[A:%.*]] = sub i32 0, [[X:%.*]]
; CHECK-NEXT: call void @use(i32 [[A]])
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.cttz.i32(i32 [[X]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 false)
; CHECK-NEXT: ret i32 [[B]]
;
%a = sub i32 0, %x
@@ -26,7 +26,7 @@ define i32 @cttz_neg_value_multiuse(i32 %x) {
define i64 @cttz_neg_value_64(i64 %x) {
; CHECK-LABEL: @cttz_neg_value_64(
-; CHECK-NEXT: [[B:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i64 [[B]]
;
%a = sub i64 0, %x
@@ -36,7 +36,7 @@ define i64 @cttz_neg_value_64(i64 %x) {
define i64 @cttz_neg_value2_64(i64 %x) {
; CHECK-LABEL: @cttz_neg_value2_64(
-; CHECK-NEXT: [[B:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[B:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[B]]
;
%a = sub i64 0, %x
@@ -46,7 +46,7 @@ define i64 @cttz_neg_value2_64(i64 %x) {
define <2 x i64> @cttz_neg_value_vec(<2 x i64> %x) {
; CHECK-LABEL: @cttz_neg_value_vec(
-; CHECK-NEXT: [[B:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = sub <2 x i64> zeroinitializer, %x
@@ -59,7 +59,7 @@ define <2 x i64> @cttz_neg_value_vec(<2 x i64> %x) {
define i32 @cttz_nonneg_value(i32 %x) {
; CHECK-LABEL: @cttz_nonneg_value(
; CHECK-NEXT: [[A:%.*]] = sub i32 1, [[X:%.*]]
-; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[B:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A]], i1 false)
; CHECK-NEXT: ret i32 [[B]]
;
%a = sub i32 1, %x
@@ -70,7 +70,7 @@ define i32 @cttz_nonneg_value(i32 %x) {
define <2 x i64> @cttz_nonneg_value_vec(<2 x i64> %x) {
; CHECK-LABEL: @cttz_nonneg_value_vec(
; CHECK-NEXT: [[A:%.*]] = sub <2 x i64> <i64 1, i64 0>, [[X:%.*]]
-; CHECK-NEXT: [[B:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[A]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[B:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[A]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[B]]
;
%a = sub <2 x i64> <i64 1, i64 0>, %x
diff --git a/llvm/test/Transforms/InstCombine/cttz.ll b/llvm/test/Transforms/InstCombine/cttz.ll
index 6ea5e5e141b2ed..3595cff5f1aed0 100644
--- a/llvm/test/Transforms/InstCombine/cttz.ll
+++ b/llvm/test/Transforms/InstCombine/cttz.ll
@@ -8,7 +8,7 @@ declare void @use(i32)
define i32 @cttz_zext_zero_undef(i16 %x) {
; CHECK-LABEL: @cttz_zext_zero_undef(
-; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true)
; CHECK-NEXT: [[TZ:%.*]] = zext nneg i16 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[TZ]]
;
@@ -20,7 +20,7 @@ define i32 @cttz_zext_zero_undef(i16 %x) {
define i32 @cttz_zext_zero_def(i16 %x) {
; CHECK-LABEL: @cttz_zext_zero_def(
; CHECK-NEXT: [[Z:%.*]] = zext i16 [[X:%.*]] to i32
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Z]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Z]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%z = zext i16 %x to i32
@@ -32,7 +32,7 @@ define i32 @cttz_zext_zero_undef_extra_use(i16 %x) {
; CHECK-LABEL: @cttz_zext_zero_undef_extra_use(
; CHECK-NEXT: [[Z:%.*]] = zext i16 [[X:%.*]] to i32
; CHECK-NEXT: call void @use(i32 [[Z]])
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Z]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Z]], i1 true)
; CHECK-NEXT: ret i32 [[TZ]]
;
%z = zext i16 %x to i32
@@ -43,7 +43,7 @@ define i32 @cttz_zext_zero_undef_extra_use(i16 %x) {
define <2 x i64> @cttz_zext_zero_undef_vec(<2 x i32> %x) {
; CHECK-LABEL: @cttz_zext_zero_undef_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true)
; CHECK-NEXT: [[TZ:%.*]] = zext nneg <2 x i32> [[TMP1]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[TZ]]
;
@@ -55,7 +55,7 @@ define <2 x i64> @cttz_zext_zero_undef_vec(<2 x i32> %x) {
define <2 x i64> @cttz_zext_zero_def_vec(<2 x i32> %x) {
; CHECK-LABEL: @cttz_zext_zero_def_vec(
; CHECK-NEXT: [[Z:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TZ:%.*]] = tail call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[Z]], i1 false), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[TZ:%.*]] = tail call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[Z]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[TZ]]
;
%z = zext <2 x i32> %x to <2 x i64>
@@ -65,7 +65,7 @@ define <2 x i64> @cttz_zext_zero_def_vec(<2 x i32> %x) {
define i32 @cttz_sext_zero_undef(i16 %x) {
; CHECK-LABEL: @cttz_sext_zero_undef(
-; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true)
; CHECK-NEXT: [[TZ:%.*]] = zext nneg i16 [[TMP1]] to i32
; CHECK-NEXT: ret i32 [[TZ]]
;
@@ -77,7 +77,7 @@ define i32 @cttz_sext_zero_undef(i16 %x) {
define i32 @cttz_sext_zero_def(i16 %x) {
; CHECK-LABEL: @cttz_sext_zero_def(
; CHECK-NEXT: [[TMP1:%.*]] = zext i16 [[X:%.*]] to i32
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[TMP1]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%s = sext i16 %x to i32
@@ -89,7 +89,7 @@ define i32 @cttz_sext_zero_undef_extra_use(i16 %x) {
; CHECK-LABEL: @cttz_sext_zero_undef_extra_use(
; CHECK-NEXT: [[S:%.*]] = sext i16 [[X:%.*]] to i32
; CHECK-NEXT: call void @use(i32 [[S]])
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[S]], i1 true)
; CHECK-NEXT: ret i32 [[TZ]]
;
%s = sext i16 %x to i32
@@ -100,7 +100,7 @@ define i32 @cttz_sext_zero_undef_extra_use(i16 %x) {
define <2 x i64> @cttz_sext_zero_undef_vec(<2 x i32> %x) {
; CHECK-LABEL: @cttz_sext_zero_undef_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true)
; CHECK-NEXT: [[TZ:%.*]] = zext nneg <2 x i32> [[TMP1]] to <2 x i64>
; CHECK-NEXT: ret <2 x i64> [[TZ]]
;
@@ -112,7 +112,7 @@ define <2 x i64> @cttz_sext_zero_undef_vec(<2 x i32> %x) {
define <2 x i64> @cttz_sext_zero_def_vec(<2 x i32> %x) {
; CHECK-LABEL: @cttz_sext_zero_def_vec(
; CHECK-NEXT: [[TMP1:%.*]] = zext <2 x i32> [[X:%.*]] to <2 x i64>
-; CHECK-NEXT: [[TZ:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[TMP1]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[TMP1]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[TZ]]
;
%s = sext <2 x i32> %x to <2 x i64>
@@ -122,7 +122,7 @@ define <2 x i64> @cttz_sext_zero_def_vec(<2 x i32> %x) {
define i32 @cttz_of_lowest_set_bit(i32 %x) {
; CHECK-LABEL: @cttz_of_lowest_set_bit(
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%sub = sub i32 0, %x
@@ -134,7 +134,7 @@ define i32 @cttz_of_lowest_set_bit(i32 %x) {
define i32 @cttz_of_lowest_set_bit_commuted(i32 %xx) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_commuted(
; CHECK-NEXT: [[X:%.*]] = udiv i32 42, [[XX:%.*]]
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[X]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%x = udiv i32 42, %xx ; thwart complexity-based canonicalization
@@ -146,7 +146,7 @@ define i32 @cttz_of_lowest_set_bit_commuted(i32 %xx) {
define i32 @cttz_of_lowest_set_bit_poison_flag(i32 %x) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_poison_flag(
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[TZ]]
;
%sub = sub i32 0, %x
@@ -157,7 +157,7 @@ define i32 @cttz_of_lowest_set_bit_poison_flag(i32 %x) {
define <2 x i64> @cttz_of_lowest_set_bit_vec(<2 x i64> %x) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_vec(
-; CHECK-NEXT: [[TZ:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[TZ]]
;
%sub = sub <2 x i64> zeroinitializer, %x
@@ -168,7 +168,7 @@ define <2 x i64> @cttz_of_lowest_set_bit_vec(<2 x i64> %x) {
define <2 x i64> @cttz_of_lowest_set_bit_vec_undef(<2 x i64> %x) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_vec_undef(
-; CHECK-NEXT: [[TZ:%.*]] = call <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i64> [[TZ]]
;
%sub = sub <2 x i64> zeroinitializer, %x
@@ -181,7 +181,7 @@ define i32 @cttz_of_lowest_set_bit_wrong_const(i32 %x) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_wrong_const(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[X:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[SUB]], [[X]]
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[AND]], i1 false), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 1, 33) i32 @llvm.cttz.i32(i32 [[AND]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%sub = sub i32 1, %x
@@ -194,7 +194,7 @@ define i32 @cttz_of_lowest_set_bit_wrong_operand(i32 %x, i32 %y) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_wrong_operand(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[Y:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[SUB]], [[X:%.*]]
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[AND]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[AND]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%sub = sub i32 0, %y
@@ -207,7 +207,7 @@ define i32 @cttz_of_lowest_set_bit_wrong_intrinsic(i32 %x) {
; CHECK-LABEL: @cttz_of_lowest_set_bit_wrong_intrinsic(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[X:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[SUB]], [[X]]
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.ctlz.i32(i32 [[AND]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[AND]], i1 false)
; CHECK-NEXT: ret i32 [[TZ]]
;
%sub = sub i32 0, %x
diff --git a/llvm/test/Transforms/InstCombine/ffs-1.ll b/llvm/test/Transforms/InstCombine/ffs-1.ll
index 7cf080765bb1b6..db01801b1225cd 100644
--- a/llvm/test/Transforms/InstCombine/ffs-1.ll
+++ b/llvm/test/Transforms/InstCombine/ffs-1.ll
@@ -148,7 +148,7 @@ define i32 @test_simplify12() {
define i32 @test_simplify13(i32 %x) {
; ALL-LABEL: @test_simplify13(
-; ALL-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 %x, i1 true), !range !0
+; ALL-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %x, i1 true)
; ALL-NEXT: [[TMP1:%.*]] = add nuw nsw i32 [[CTTZ]], 1
; ALL-NEXT: [[TMP2:%.*]] = icmp eq i32 %x, 0
; ALL-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]
@@ -164,7 +164,7 @@ define i32 @test_simplify14(i32 %x) {
; GENERIC-NEXT: ret i32 [[RET]]
;
; TARGET-LABEL: @test_simplify14(
-; TARGET-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 %x, i1 true), !range !0
+; TARGET-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %x, i1 true)
; TARGET-NEXT: [[TMP1:%.*]] = add nuw nsw i32 [[CTTZ]], 1
; TARGET-NEXT: [[TMP2:%.*]] = icmp eq i32 %x, 0
; TARGET-NEXT: [[TMP3:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]]
@@ -180,7 +180,7 @@ define i32 @test_simplify15(i64 %x) {
; GENERIC-NEXT: ret i32 [[RET]]
;
; TARGET-LABEL: @test_simplify15(
-; TARGET-NEXT: [[CTTZ:%.*]] = call i64 @llvm.cttz.i64(i64 %x, i1 true), !range !1
+; TARGET-NEXT: [[CTTZ:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %x, i1 true)
; TARGET-NEXT: [[TMP1:%.*]] = trunc nuw nsw i64 [[CTTZ]] to i32
; TARGET-NEXT: [[TMP2:%.*]] = add nuw nsw i32 [[TMP1]], 1
; TARGET-NEXT: [[TMP3:%.*]] = icmp eq i64 %x, 0
diff --git a/llvm/test/Transforms/InstCombine/ffs-i16.ll b/llvm/test/Transforms/InstCombine/ffs-i16.ll
index f2b1f074f86d56..ab5f1307f4d9d3 100644
--- a/llvm/test/Transforms/InstCombine/ffs-i16.ll
+++ b/llvm/test/Transforms/InstCombine/ffs-i16.ll
@@ -17,7 +17,7 @@ define void @fold_ffs(i16 %x) {
; AVR-LABEL: @fold_ffs(
; AVR-NEXT: call addrspace(1) void @sink(i16 0)
; AVR-NEXT: call addrspace(1) void @sink(i16 1)
-; AVR-NEXT: [[CTTZ:%.*]] = call addrspace(1) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; AVR-NEXT: [[CTTZ:%.*]] = call range(i16 0, 17) addrspace(1) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true)
; AVR-NEXT: [[TMP1:%.*]] = add nuw nsw i16 [[CTTZ]], 1
; AVR-NEXT: [[DOTNOT:%.*]] = icmp eq i16 [[X]], 0
; AVR-NEXT: [[NX:%.*]] = select i1 [[DOTNOT]], i16 0, i16 [[TMP1]]
@@ -27,7 +27,7 @@ define void @fold_ffs(i16 %x) {
; MSP430-LABEL: @fold_ffs(
; MSP430-NEXT: call void @sink(i16 0)
; MSP430-NEXT: call void @sink(i16 1)
-; MSP430-NEXT: [[CTTZ:%.*]] = call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; MSP430-NEXT: [[CTTZ:%.*]] = call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 true)
; MSP430-NEXT: [[TMP1:%.*]] = add nuw nsw i16 [[CTTZ]], 1
; MSP430-NEXT: [[DOTNOT:%.*]] = icmp eq i16 [[X]], 0
; MSP430-NEXT: [[NX:%.*]] = select i1 [[DOTNOT]], i16 0, i16 [[TMP1]]
diff --git a/llvm/test/Transforms/InstCombine/fls-i16.ll b/llvm/test/Transforms/InstCombine/fls-i16.ll
index 54692fde5303eb..e48397f5116a4b 100644
--- a/llvm/test/Transforms/InstCombine/fls-i16.ll
+++ b/llvm/test/Transforms/InstCombine/fls-i16.ll
@@ -17,7 +17,7 @@ define void @fold_fls(i16 %x) {
; AVR-LABEL: @fold_fls(
; AVR-NEXT: call addrspace(1) void @sink(i16 0)
; AVR-NEXT: call addrspace(1) void @sink(i16 1)
-; AVR-NEXT: [[CTLZ:%.*]] = call addrspace(1) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; AVR-NEXT: [[CTLZ:%.*]] = call range(i16 0, 17) addrspace(1) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; AVR-NEXT: [[NX:%.*]] = sub nuw nsw i16 16, [[CTLZ]]
; AVR-NEXT: call addrspace(1) void @sink(i16 [[NX]])
; AVR-NEXT: ret void
@@ -25,7 +25,7 @@ define void @fold_fls(i16 %x) {
; MSP430-LABEL: @fold_fls(
; MSP430-NEXT: call void @sink(i16 0)
; MSP430-NEXT: call void @sink(i16 1)
-; MSP430-NEXT: [[CTLZ:%.*]] = call i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; MSP430-NEXT: [[CTLZ:%.*]] = call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; MSP430-NEXT: [[NX:%.*]] = sub nuw nsw i16 16, [[CTLZ]]
; MSP430-NEXT: call void @sink(i16 [[NX]])
; MSP430-NEXT: ret void
diff --git a/llvm/test/Transforms/InstCombine/fls.ll b/llvm/test/Transforms/InstCombine/fls.ll
index 7710093e195a11..68bc0a2fc8a1d1 100644
--- a/llvm/test/Transforms/InstCombine/fls.ll
+++ b/llvm/test/Transforms/InstCombine/fls.ll
@@ -31,7 +31,7 @@ define i32 @myflsll() {
define i32 @flsnotconst(i64 %z) {
; CHECK-LABEL: @flsnotconst(
-; CHECK-NEXT: [[CTLZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[Z:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[Z:%.*]], i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = trunc nuw nsw i64 [[CTLZ]] to i32
; CHECK-NEXT: [[GOO:%.*]] = sub nsw i32 64, [[TMP1]]
; CHECK-NEXT: ret i32 [[GOO]]
diff --git a/llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll b/llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
index bbce5c2d625ec8..4626d19bd2899d 100644
--- a/llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
+++ b/llvm/test/Transforms/InstCombine/fold-ctpop-of-not.ll
@@ -8,7 +8,7 @@ declare <2 x i8> @llvm.ctpop.v2i8(<2 x i8>)
define i8 @fold_sub_c_ctpop(i8 %x) {
; CHECK-LABEL: @fold_sub_c_ctpop(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = add nuw nsw i8 [[TMP1]], 4
; CHECK-NEXT: ret i8 [[R]]
;
@@ -21,7 +21,7 @@ define i8 @fold_sub_c_ctpop(i8 %x) {
define i8 @fold_sub_var_ctpop_fail(i8 %x, i8 %y) {
; CHECK-LABEL: @fold_sub_var_ctpop_fail(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[NX]])
; CHECK-NEXT: [[R:%.*]] = sub i8 [[Y:%.*]], [[CNT]]
; CHECK-NEXT: ret i8 [[R]]
;
@@ -33,7 +33,7 @@ define i8 @fold_sub_var_ctpop_fail(i8 %x, i8 %y) {
define <2 x i8> @fold_sub_ctpop_c(<2 x i8> %x) {
; CHECK-LABEL: @fold_sub_ctpop_c(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = sub nuw nsw <2 x i8> <i8 -55, i8 -56>, [[TMP1]]
; CHECK-NEXT: ret <2 x i8> [[R]]
;
@@ -45,7 +45,7 @@ define <2 x i8> @fold_sub_ctpop_c(<2 x i8> %x) {
define i8 @fold_add_ctpop_c(i8 %x) {
; CHECK-LABEL: @fold_add_ctpop_c(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = sub nuw nsw i8 71, [[TMP1]]
; CHECK-NEXT: ret i8 [[R]]
;
@@ -57,7 +57,7 @@ define i8 @fold_add_ctpop_c(i8 %x) {
define i8 @fold_distjoint_or_ctpop_c(i8 %x) {
; CHECK-LABEL: @fold_distjoint_or_ctpop_c(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = sub nuw nsw i8 72, [[TMP1]]
; CHECK-NEXT: ret i8 [[R]]
;
@@ -70,7 +70,7 @@ define i8 @fold_distjoint_or_ctpop_c(i8 %x) {
define i8 @fold_or_ctpop_c_fail(i8 %x) {
; CHECK-LABEL: @fold_or_ctpop_c_fail(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[NX]])
; CHECK-NEXT: [[R:%.*]] = or i8 [[CNT]], 65
; CHECK-NEXT: ret i8 [[R]]
;
@@ -83,7 +83,7 @@ define i8 @fold_or_ctpop_c_fail(i8 %x) {
define i8 @fold_add_ctpop_var_fail(i8 %x, i8 %y) {
; CHECK-LABEL: @fold_add_ctpop_var_fail(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[NX]])
; CHECK-NEXT: [[R:%.*]] = add i8 [[CNT]], [[Y:%.*]]
; CHECK-NEXT: ret i8 [[R]]
;
@@ -105,7 +105,7 @@ define i1 @fold_icmp_sgt_ctpop_c_i2_fail(i2 %x, i2 %C) {
define i1 @fold_cmp_eq_ctpop_c(i8 %x) {
; CHECK-LABEL: @fold_cmp_eq_ctpop_c(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], 6
; CHECK-NEXT: ret i1 [[R]]
;
@@ -118,7 +118,7 @@ define i1 @fold_cmp_eq_ctpop_c(i8 %x) {
define i1 @fold_cmp_eq_ctpop_c_multiuse_fail(i8 %x) {
; CHECK-LABEL: @fold_cmp_eq_ctpop_c_multiuse_fail(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -1
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[NX]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[CNT]], 2
; CHECK-NEXT: call void @use.i8(i8 [[CNT]])
; CHECK-NEXT: ret i1 [[R]]
@@ -132,7 +132,7 @@ define i1 @fold_cmp_eq_ctpop_c_multiuse_fail(i8 %x) {
define <2 x i1> @fold_cmp_ne_ctpop_c(<2 x i8> %x) {
; CHECK-LABEL: @fold_cmp_ne_ctpop_c(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 -36, i8 5>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -145,7 +145,7 @@ define <2 x i1> @fold_cmp_ne_ctpop_c(<2 x i8> %x) {
define <2 x i1> @fold_cmp_ne_ctpop_var_fail(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @fold_cmp_ne_ctpop_var_fail(
; CHECK-NEXT: [[NX:%.*]] = xor <2 x i8> [[X:%.*]], <i8 -1, i8 -1>
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[NX]])
; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[CNT]], [[Y:%.*]]
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -159,7 +159,7 @@ define i1 @fold_cmp_ult_ctpop_c(i8 %x, i8 %y, i1 %cond) {
; CHECK-LABEL: @fold_cmp_ult_ctpop_c(
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 -16, [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i8 [[X:%.*]], i8 [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP2]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP3:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP2]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[TMP3]], 3
; CHECK-NEXT: ret i1 [[R]]
;
@@ -175,7 +175,7 @@ define i1 @fold_cmp_sle_ctpop_c(i8 %x, i8 %y, i1 %cond) {
; CHECK-LABEL: @fold_cmp_sle_ctpop_c(
; CHECK-NEXT: [[TMP1:%.*]] = sub i8 -16, [[Y:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[COND:%.*]], i8 [[X:%.*]], i8 [[TMP1]]
-; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP2]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP3:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP2]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[TMP3]], 4
; CHECK-NEXT: ret i1 [[R]]
;
@@ -190,7 +190,7 @@ define i1 @fold_cmp_sle_ctpop_c(i8 %x, i8 %y, i1 %cond) {
define i1 @fold_cmp_ult_ctpop_c_no_not_inst_save_fail(i8 %x) {
; CHECK-LABEL: @fold_cmp_ult_ctpop_c_no_not_inst_save_fail(
; CHECK-NEXT: [[NX:%.*]] = xor i8 [[X:%.*]], -2
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctpop.i8(i8 [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[NX]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[CNT]], 5
; CHECK-NEXT: ret i1 [[R]]
;
@@ -202,7 +202,7 @@ define i1 @fold_cmp_ult_ctpop_c_no_not_inst_save_fail(i8 %x) {
define <2 x i1> @fold_cmp_ugt_ctpop_c(<2 x i8> %x) {
; CHECK-LABEL: @fold_cmp_ugt_ctpop_c(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 0, i8 2>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -215,7 +215,7 @@ define <2 x i1> @fold_cmp_ugt_ctpop_c(<2 x i8> %x) {
define <2 x i1> @fold_cmp_ugt_ctpop_c_out_of_range_fail(<2 x i8> %x) {
; CHECK-LABEL: @fold_cmp_ugt_ctpop_c_out_of_range_fail(
; CHECK-NEXT: [[NX:%.*]] = xor <2 x i8> [[X:%.*]], <i8 -1, i8 -1>
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[NX]]), !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[NX]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[CNT]], <i8 2, i8 10>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
diff --git a/llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll b/llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
index a631aacd97ff94..17e51e73201b16 100644
--- a/llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
+++ b/llvm/test/Transforms/InstCombine/fold-log2-ceil-idiom.ll
@@ -5,7 +5,7 @@ define i32 @log2_ceil_idiom(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: [[RET:%.*]] = sub nuw nsw i32 32, [[TMP2]]
; CHECK-NEXT: ret i32 [[RET]]
;
@@ -22,7 +22,7 @@ define i5 @log2_ceil_idiom_trunc(i32 %x) {
; CHECK-LABEL: define i5 @log2_ceil_idiom_trunc(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: [[TMP3:%.*]] = sub nsw i32 0, [[TMP2]]
; CHECK-NEXT: [[RET:%.*]] = trunc i32 [[TMP3]] to i5
; CHECK-NEXT: ret i5 [[RET]]
@@ -41,7 +41,7 @@ define i64 @log2_ceil_idiom_zext(i32 %x) {
; CHECK-LABEL: define i64 @log2_ceil_idiom_zext(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: [[TMP3:%.*]] = sub nuw nsw i32 32, [[TMP2]]
; CHECK-NEXT: [[RET:%.*]] = zext nneg i32 [[TMP3]] to i64
; CHECK-NEXT: ret i64 [[RET]]
@@ -60,7 +60,7 @@ define i32 @log2_ceil_idiom_power2_test2(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_power2_test2(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: [[RET:%.*]] = sub nuw nsw i32 32, [[TMP2]]
; CHECK-NEXT: ret i32 [[RET]]
;
@@ -77,7 +77,7 @@ define i32 @log2_ceil_idiom_commuted(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_commuted(
; CHECK-SAME: i32 [[X:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: [[RET:%.*]] = sub nuw nsw i32 32, [[TMP2]]
; CHECK-NEXT: ret i32 [[RET]]
;
@@ -93,10 +93,10 @@ define i32 @log2_ceil_idiom_commuted(i32 %x) {
define i32 @log2_ceil_idiom_multiuse1(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_multiuse1(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: call void @use32(i32 [[CTPOP]])
; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[X]], -1
-; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[TMP1]], i1 false)
; CHECK-NEXT: [[RET:%.*]] = sub nuw nsw i32 32, [[TMP2]]
; CHECK-NEXT: ret i32 [[RET]]
;
@@ -115,9 +115,9 @@ define i32 @log2_ceil_idiom_multiuse1(i32 %x) {
define i32 @log2_ceil_idiom_x_may_be_zero(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_x_may_be_zero(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 false)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -135,10 +135,10 @@ define i32 @log2_ceil_idiom_x_may_be_zero(i32 %x) {
define i4 @log2_ceil_idiom_trunc_too_short(i32 %x) {
; CHECK-LABEL: define i4 @log2_ceil_idiom_trunc_too_short(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[CTLZ]] to i4
; CHECK-NEXT: [[XOR:%.*]] = xor i4 [[TRUNC]], -1
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i4
; CHECK-NEXT: [[RET:%.*]] = add i4 [[XOR]], [[ZEXT]]
@@ -157,9 +157,9 @@ define i4 @log2_ceil_idiom_trunc_too_short(i32 %x) {
define i32 @log2_ceil_idiom_mismatched_operands(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_mismatched_operands(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[Y]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -177,9 +177,9 @@ define i32 @log2_ceil_idiom_mismatched_operands(i32 %x, i32 %y) {
define i32 @log2_ceil_idiom_wrong_constant(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_wrong_constant(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 30
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -197,9 +197,9 @@ define i32 @log2_ceil_idiom_wrong_constant(i32 %x) {
define i32 @log2_ceil_idiom_not_a_power2_test1(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_not_a_power2_test1(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -217,9 +217,9 @@ define i32 @log2_ceil_idiom_not_a_power2_test1(i32 %x) {
define i32 @log2_ceil_idiom_not_a_power2_test2(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_not_a_power2_test2(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 2
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -237,10 +237,10 @@ define i32 @log2_ceil_idiom_not_a_power2_test2(i32 %x) {
define i32 @log2_ceil_idiom_multiuse2(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_multiuse2(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: call void @use32(i32 [[CTLZ]])
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -259,10 +259,10 @@ define i32 @log2_ceil_idiom_multiuse2(i32 %x) {
define i32 @log2_ceil_idiom_multiuse3(i32 %x) {
; CHECK-LABEL: define i32 @log2_ceil_idiom_multiuse3(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: call void @use32(i32 [[XOR]])
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i32 [[XOR]], [[ZEXT]]
@@ -281,11 +281,11 @@ define i32 @log2_ceil_idiom_multiuse3(i32 %x) {
define i5 @log2_ceil_idiom_trunc_multiuse4(i32 %x) {
; CHECK-LABEL: define i5 @log2_ceil_idiom_trunc_multiuse4(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw i32 [[CTLZ]] to i5
; CHECK-NEXT: call void @use5(i5 [[TRUNC]])
; CHECK-NEXT: [[XOR:%.*]] = xor i5 [[TRUNC]], -1
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i5
; CHECK-NEXT: [[RET:%.*]] = add i5 [[XOR]], [[ZEXT]]
@@ -305,11 +305,11 @@ define i5 @log2_ceil_idiom_trunc_multiuse4(i32 %x) {
define i64 @log2_ceil_idiom_zext_multiuse5(i32 %x) {
; CHECK-LABEL: define i64 @log2_ceil_idiom_zext_multiuse5(
; CHECK-SAME: i32 [[X:%.*]]) {
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X]], i1 true)
; CHECK-NEXT: [[XOR:%.*]] = xor i32 [[CTLZ]], 31
; CHECK-NEXT: [[EXT:%.*]] = zext nneg i32 [[XOR]] to i64
; CHECK-NEXT: call void @use64(i64 [[EXT]])
-; CHECK-NEXT: [[CTPOP:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[CTPOP]], 1
; CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i64
; CHECK-NEXT: [[RET:%.*]] = add nuw nsw i64 [[EXT]], [[ZEXT]]
@@ -332,6 +332,3 @@ declare void @use64(i64)
declare i32 @llvm.ctlz.i32(i32, i1)
declare i32 @llvm.ctpop.i32(i32)
-;.
-; CHECK: [[RNG0]] = !{i32 0, i32 33}
-;.
diff --git a/llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll b/llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll
index 105bd28fb052e8..c4a590e1a12bfa 100644
--- a/llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/freeze-integer-intrinsics.ll
@@ -3,7 +3,7 @@
define i32 @ctlz_true_freeze(i32 %arg) {
; CHECK-LABEL: @ctlz_true_freeze(
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @llvm.ctlz.i32(i32 [[ARG:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CALL:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[ARG:%.*]], i1 true)
; CHECK-NEXT: [[FREEZE:%.*]] = freeze i32 [[CALL]]
; CHECK-NEXT: ret i32 [[FREEZE]]
;
@@ -15,7 +15,7 @@ define i32 @ctlz_true_freeze(i32 %arg) {
define i32 @ctlz_false_freeze(i32 %arg) {
; CHECK-LABEL: @ctlz_false_freeze(
; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]]
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @llvm.ctlz.i32(i32 [[ARG_FR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[ARG_FR]], i1 false)
; CHECK-NEXT: ret i32 [[CALL]]
;
%call = call i32 @llvm.ctlz.i32(i32 %arg, i1 false)
@@ -25,7 +25,7 @@ define i32 @ctlz_false_freeze(i32 %arg) {
define i32 @ctlz_true_noundef_freeze(i32 %arg) {
; CHECK-LABEL: @ctlz_true_noundef_freeze(
-; CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @llvm.ctlz.i32(i32 [[ARG:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call noundef range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[ARG:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[CALL]]
;
%call = call noundef i32 @llvm.ctlz.i32(i32 %arg, i1 true)
@@ -35,7 +35,7 @@ define i32 @ctlz_true_noundef_freeze(i32 %arg) {
define i32 @cttz_true_freeze(i32 %arg) {
; CHECK-LABEL: @cttz_true_freeze(
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @llvm.cttz.i32(i32 [[ARG:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG:%.*]], i1 true)
; CHECK-NEXT: [[FREEZE:%.*]] = freeze i32 [[CALL]]
; CHECK-NEXT: ret i32 [[FREEZE]]
;
@@ -46,7 +46,7 @@ define i32 @cttz_true_freeze(i32 %arg) {
define i32 @cttz_true_noundef_freeze(i32 %arg) {
; CHECK-LABEL: @cttz_true_noundef_freeze(
-; CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @llvm.cttz.i32(i32 [[ARG:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call noundef range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[CALL]]
;
%call = call noundef i32 @llvm.cttz.i32(i32 %arg, i1 true)
@@ -57,7 +57,7 @@ define i32 @cttz_true_noundef_freeze(i32 %arg) {
define i32 @freeze_cttz_true(i32 %arg) {
; CHECK-LABEL: @freeze_cttz_true(
; CHECK-NEXT: [[FREEZE:%.*]] = freeze i32 [[ARG:%.*]]
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @llvm.cttz.i32(i32 [[FREEZE]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[FREEZE]], i1 true)
; CHECK-NEXT: ret i32 [[CALL]]
;
%freeze = freeze i32 %arg
@@ -68,7 +68,7 @@ define i32 @freeze_cttz_true(i32 %arg) {
define i32 @cttz_false_freeze(i32 %arg) {
; CHECK-LABEL: @cttz_false_freeze(
; CHECK-NEXT: [[ARG_FR:%.*]] = freeze i32 [[ARG:%.*]]
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @llvm.cttz.i32(i32 [[ARG_FR]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG_FR]], i1 false)
; CHECK-NEXT: ret i32 [[CALL]]
;
%call = call i32 @llvm.cttz.i32(i32 %arg, i1 false)
@@ -79,7 +79,7 @@ define i32 @cttz_false_freeze(i32 %arg) {
define i32 @freeze_cttz_false(i32 %arg) {
; CHECK-LABEL: @freeze_cttz_false(
; CHECK-NEXT: [[FREEZE:%.*]] = freeze i32 [[ARG:%.*]]
-; CHECK-NEXT: [[CALL:%.*]] = call i32 @llvm.cttz.i32(i32 [[FREEZE]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CALL:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[FREEZE]], i1 false)
; CHECK-NEXT: ret i32 [[CALL]]
;
%freeze = freeze i32 %arg
diff --git a/llvm/test/Transforms/InstCombine/freeze.ll b/llvm/test/Transforms/InstCombine/freeze.ll
index adcf7d50f413be..391d626a795c7d 100644
--- a/llvm/test/Transforms/InstCombine/freeze.ll
+++ b/llvm/test/Transforms/InstCombine/freeze.ll
@@ -1107,7 +1107,7 @@ define i32 @freeze_ctpop(i32 %x) {
; CHECK-LABEL: @freeze_ctpop(
; CHECK-NEXT: [[Y:%.*]] = lshr i32 2047, [[X:%.*]]
; CHECK-NEXT: [[Y_FR:%.*]] = freeze i32 [[Y]]
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y_FR]]), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y_FR]])
; CHECK-NEXT: ret i32 [[CTPOP]]
;
%y = lshr i32 2047, %x
@@ -1209,5 +1209,4 @@ define ptr @freeze_ptrmask_nonnull(ptr %p, i64 noundef %m) {
; CHECK: [[META0]] = !{}
; CHECK: [[META1]] = !{i64 4}
; CHECK: [[RNG2]] = !{i32 0, i32 100}
-; CHECK: [[RNG3]] = !{i32 0, i32 33}
;.
diff --git a/llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll b/llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
index 70a2b33d17dd7c..e9ec6b415d4621 100644
--- a/llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-ne-pow2.ll
@@ -284,7 +284,7 @@ False:
define i32 @pow2_32_nonconst_assume(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_32_nonconst_assume(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
@@ -306,7 +306,7 @@ define i32 @pow2_32_nonconst_assume(i32 %x, i32 %y) {
define i32 @pow2_32_gtnonconst_assume(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_32_gtnonconst_assume(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[YGT:%.*]] = icmp ugt i32 [[Y]], [[X:%.*]]
@@ -327,7 +327,7 @@ define i32 @pow2_32_gtnonconst_assume(i32 %x, i32 %y) {
define i32 @not_pow2_32_nonconst_assume(i32 %x, i32 %y) {
; CHECK-LABEL: @not_pow2_32_nonconst_assume(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp ne i32 [[CTPOP]], 1
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
@@ -349,7 +349,7 @@ define i32 @not_pow2_32_nonconst_assume(i32 %x, i32 %y) {
define i32 @pow2_or_zero_32_nonconst_assume(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_or_zero_32_nonconst_assume(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp ult i32 [[CTPOP]], 2
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
@@ -371,7 +371,7 @@ define i32 @pow2_or_zero_32_nonconst_assume(i32 %x, i32 %y) {
define i32 @pow2_32_nonconst_assume_br(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_32_nonconst_assume_br(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
@@ -398,7 +398,7 @@ False:
define i32 @not_pow2_32_nonconst_assume_br(i32 %x, i32 %y) {
; CHECK-LABEL: @not_pow2_32_nonconst_assume_br(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp ne i32 [[CTPOP]], 1
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
@@ -425,7 +425,7 @@ False:
define i32 @pow2_or_zero_32_nonconst_assume_br(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_or_zero_32_nonconst_assume_br(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp ult i32 [[CTPOP]], 2
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], [[Y]]
@@ -452,7 +452,7 @@ False:
define i32 @pow2_32_nonconst_br1_br(i32 %x, i32 %y) {
; CHECK-LABEL: @pow2_32_nonconst_br1_br(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: br i1 [[YP2]], label [[CONT:%.*]], label [[FALSE:%.*]]
; CHECK: Cont:
@@ -481,7 +481,7 @@ False:
define i32 @not_pow2_32_nonconst_br1_br(i32 %x, i32 %y) {
; CHECK-LABEL: @not_pow2_32_nonconst_br1_br(
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y:%.*]])
; CHECK-NEXT: [[YP2_NOT:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: br i1 [[YP2_NOT]], label [[FALSE:%.*]], label [[CONT:%.*]]
; CHECK: Cont:
@@ -513,7 +513,7 @@ define i32 @maybe_pow2_32_noncont(i32 %x, i32 %y) {
; CHECK-NEXT: [[YGT8:%.*]] = icmp ugt i32 [[Y:%.*]], 8
; CHECK-NEXT: br i1 [[YGT8]], label [[CONT1:%.*]], label [[CONT2:%.*]]
; CHECK: Cont1:
-; CHECK-NEXT: [[CTPOP:%.*]] = call i32 @llvm.ctpop.i32(i32 [[Y]]), !range [[RNG0]]
+; CHECK-NEXT: [[CTPOP:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[Y]])
; CHECK-NEXT: [[YP2:%.*]] = icmp eq i32 [[CTPOP]], 1
; CHECK-NEXT: call void @llvm.assume(i1 [[YP2]])
; CHECK-NEXT: br i1 true, label [[CONT2]], label [[FALSE:%.*]]
diff --git a/llvm/test/Transforms/InstCombine/intrinsic-select.ll b/llvm/test/Transforms/InstCombine/intrinsic-select.ll
index f37226bbd5b09c..e61cc29e4d9ac5 100644
--- a/llvm/test/Transforms/InstCombine/intrinsic-select.ll
+++ b/llvm/test/Transforms/InstCombine/intrinsic-select.ll
@@ -26,7 +26,7 @@ define i32 @ctlz_sel_const_true_false(i1 %b) {
define i32 @ctlz_sel_const_true(i1 %b, i32 %x) {
; CHECK-LABEL: @ctlz_sel_const_true(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i32 29, i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[C]]
;
@@ -37,7 +37,7 @@ define i32 @ctlz_sel_const_true(i1 %b, i32 %x) {
define <3 x i17> @ctlz_sel_const_false(<3 x i1> %b, <3 x i17> %x) {
; CHECK-LABEL: @ctlz_sel_const_false(
-; CHECK-NEXT: [[TMP1:%.*]] = call <3 x i17> @llvm.ctlz.v3i17(<3 x i17> [[X:%.*]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i17 0, 18) <3 x i17> @llvm.ctlz.v3i17(<3 x i17> [[X:%.*]], i1 true)
; CHECK-NEXT: [[C:%.*]] = select <3 x i1> [[B:%.*]], <3 x i17> [[TMP1]], <3 x i17> <i17 14, i17 0, i17 poison>
; CHECK-NEXT: ret <3 x i17> [[C]]
;
@@ -50,7 +50,7 @@ define i32 @ctlz_sel_const_true_false_extra_use(i1 %b) {
; CHECK-LABEL: @ctlz_sel_const_true_false_extra_use(
; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 -1, i32 7
; CHECK-NEXT: call void @use(i32 [[S]])
-; CHECK-NEXT: [[C:%.*]] = call i32 @llvm.ctlz.i32(i32 [[S]], i1 true), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[C:%.*]] = call range(i32 0, 30) i32 @llvm.ctlz.i32(i32 [[S]], i1 true)
; CHECK-NEXT: ret i32 [[C]]
;
%s = select i1 %b, i32 -1, i32 7
@@ -71,7 +71,7 @@ define i32 @cttz_sel_const_true_false(i1 %b) {
define i32 @cttz_sel_const_true(i1 %b, i32 %x) {
; CHECK-LABEL: @cttz_sel_const_true(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i32 0, i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[C]]
;
@@ -82,7 +82,7 @@ define i32 @cttz_sel_const_true(i1 %b, i32 %x) {
define <3 x i5> @cttz_sel_const_false(<3 x i1> %b, <3 x i5> %x) {
; CHECK-LABEL: @cttz_sel_const_false(
-; CHECK-NEXT: [[TMP1:%.*]] = call <3 x i5> @llvm.cttz.v3i5(<3 x i5> [[X:%.*]], i1 false), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i5 0, 6) <3 x i5> @llvm.cttz.v3i5(<3 x i5> [[X:%.*]], i1 false)
; CHECK-NEXT: [[C:%.*]] = select <3 x i1> [[B:%.*]], <3 x i5> [[TMP1]], <3 x i5> <i5 0, i5 0, i5 5>
; CHECK-NEXT: ret <3 x i5> [[C]]
;
@@ -95,7 +95,7 @@ define i32 @cttz_sel_const_true_false_extra_use(i1 %b) {
; CHECK-LABEL: @cttz_sel_const_true_false_extra_use(
; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 5, i32 -8
; CHECK-NEXT: call void @use(i32 [[S]])
-; CHECK-NEXT: [[C:%.*]] = call i32 @llvm.cttz.i32(i32 [[S]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[C:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[S]], i1 true)
; CHECK-NEXT: ret i32 [[C]]
;
%s = select i1 %b, i32 5, i32 -8
@@ -116,7 +116,7 @@ define i32 @ctpop_sel_const_true_false(i1 %b) {
define i32 @ctpop_sel_const_true(i1 %b, i32 %x) {
; CHECK-LABEL: @ctpop_sel_const_true(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[C:%.*]] = select i1 [[B:%.*]], i32 2, i32 [[TMP1]]
; CHECK-NEXT: ret i32 [[C]]
;
@@ -127,7 +127,7 @@ define i32 @ctpop_sel_const_true(i1 %b, i32 %x) {
define <3 x i7> @ctpop_sel_const_false(<3 x i1> %b, <3 x i7> %x) {
; CHECK-LABEL: @ctpop_sel_const_false(
-; CHECK-NEXT: [[TMP1:%.*]] = call <3 x i7> @llvm.ctpop.v3i7(<3 x i7> [[X:%.*]]), !range [[RNG4:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i7 0, 8) <3 x i7> @llvm.ctpop.v3i7(<3 x i7> [[X:%.*]])
; CHECK-NEXT: [[C:%.*]] = select <3 x i1> [[B:%.*]], <3 x i7> [[TMP1]], <3 x i7> <i7 3, i7 7, i7 0>
; CHECK-NEXT: ret <3 x i7> [[C]]
;
@@ -140,7 +140,7 @@ define i32 @ctpop_sel_const_true_false_extra_use(i1 %b) {
; CHECK-LABEL: @ctpop_sel_const_true_false_extra_use(
; CHECK-NEXT: [[S:%.*]] = select i1 [[B:%.*]], i32 5, i32 7
; CHECK-NEXT: call void @use(i32 [[S]])
-; CHECK-NEXT: [[C:%.*]] = call i32 @llvm.ctpop.i32(i32 [[S]]), !range [[RNG5:![0-9]+]]
+; CHECK-NEXT: [[C:%.*]] = call range(i32 2, 4) i32 @llvm.ctpop.i32(i32 [[S]])
; CHECK-NEXT: ret i32 [[C]]
;
%s = select i1 %b, i32 5, i32 7
diff --git a/llvm/test/Transforms/InstCombine/intrinsics.ll b/llvm/test/Transforms/InstCombine/intrinsics.ll
index d90b0ebd400c72..c8d70e17cd3921 100644
--- a/llvm/test/Transforms/InstCombine/intrinsics.ll
+++ b/llvm/test/Transforms/InstCombine/intrinsics.ll
@@ -139,7 +139,7 @@ define <vscale x 1 x i1> @cttz_knownbits_scalable_vec(<vscale x 1 x i32> %arg) {
define i32 @cttz_knownbits2(i32 %arg) {
; CHECK-LABEL: @cttz_knownbits2(
; CHECK-NEXT: [[OR:%.*]] = or i32 [[ARG:%.*]], 4
-; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #[[ATTR2:[0-9]+]], !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 3) i32 @llvm.cttz.i32(i32 [[OR]], i1 true) #[[ATTR2:[0-9]+]]
; CHECK-NEXT: ret i32 [[CNT]]
;
%or = or i32 %arg, 4
@@ -150,7 +150,7 @@ define i32 @cttz_knownbits2(i32 %arg) {
define <2 x i32> @cttz_knownbits2_vec(<2 x i32> %arg) {
; CHECK-LABEL: @cttz_knownbits2_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[ARG:%.*]], <i32 4, i32 4>
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) #[[ATTR2]], !range [[RNG0]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 0, 3) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true) #[[ATTR2]]
; CHECK-NEXT: ret <2 x i32> [[CNT]]
;
%or = or <2 x i32> %arg, <i32 4, i32 4>
@@ -256,7 +256,7 @@ define <2 x i1> @ctlz_knownbits_vec(<2 x i8> %arg) {
define i8 @ctlz_knownbits2(i8 %arg) {
; CHECK-LABEL: @ctlz_knownbits2(
; CHECK-NEXT: [[OR:%.*]] = or i8 [[ARG:%.*]], 32
-; CHECK-NEXT: [[CNT:%.*]] = call i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #[[ATTR2]], !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 3) i8 @llvm.ctlz.i8(i8 [[OR]], i1 true) #[[ATTR2]]
; CHECK-NEXT: ret i8 [[CNT]]
;
%or = or i8 %arg, 32
@@ -267,7 +267,7 @@ define i8 @ctlz_knownbits2(i8 %arg) {
define <2 x i8> @ctlz_knownbits2_vec(<2 x i8> %arg) {
; CHECK-LABEL: @ctlz_knownbits2_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[ARG:%.*]], <i8 32, i8 32>
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true) #[[ATTR2]], !range [[RNG1]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i8 0, 3) <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[OR]], i1 true) #[[ATTR2]]
; CHECK-NEXT: ret <2 x i8> [[CNT]]
;
%or = or <2 x i8> %arg, <i8 32, i8 32>
@@ -314,7 +314,7 @@ define <2 x i32> @ctlz_poison_vec(<2 x i32> %Value) {
define i32 @ctlz_no_zero(i32 %a) {
; CHECK-LABEL: @ctlz_no_zero(
; CHECK-NEXT: [[OR:%.*]] = or i32 [[A:%.*]], 8
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[OR]], i1 true), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 29) i32 @llvm.ctlz.i32(i32 [[OR]], i1 true)
; CHECK-NEXT: ret i32 [[CTLZ]]
;
%or = or i32 %a, 8
@@ -325,7 +325,7 @@ define i32 @ctlz_no_zero(i32 %a) {
define <2 x i32> @ctlz_no_zero_vec(<2 x i32> %a) {
; CHECK-LABEL: @ctlz_no_zero_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
-; CHECK-NEXT: [[CTLZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 true), !range [[RNG2]]
+; CHECK-NEXT: [[CTLZ:%.*]] = tail call range(i32 0, 29) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[OR]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
;
%or = or <2 x i32> %a, <i32 8, i32 8>
@@ -352,7 +352,7 @@ define <2 x i32> @cttz_poison_vec(<2 x i32> %Value) {
define i32 @cttz_no_zero(i32 %a) {
; CHECK-LABEL: @cttz_no_zero(
; CHECK-NEXT: [[OR:%.*]] = or i32 [[A:%.*]], 8
-; CHECK-NEXT: [[CTTZ:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[OR]], i1 true), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[CTTZ:%.*]] = tail call range(i32 0, 4) i32 @llvm.cttz.i32(i32 [[OR]], i1 true)
; CHECK-NEXT: ret i32 [[CTTZ]]
;
%or = or i32 %a, 8
@@ -363,7 +363,7 @@ define i32 @cttz_no_zero(i32 %a) {
define <2 x i32> @cttz_no_zero_vec(<2 x i32> %a) {
; CHECK-LABEL: @cttz_no_zero_vec(
; CHECK-NEXT: [[OR:%.*]] = or <2 x i32> [[A:%.*]], <i32 8, i32 8>
-; CHECK-NEXT: [[CTTZ:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true), !range [[RNG3]]
+; CHECK-NEXT: [[CTTZ:%.*]] = tail call range(i32 0, 4) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[OR]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
;
%or = or <2 x i32> %a, <i32 8, i32 8>
@@ -373,7 +373,7 @@ define <2 x i32> @cttz_no_zero_vec(<2 x i32> %a) {
define i32 @ctlz_select(i32 %Value) nounwind {
; CHECK-LABEL: @ctlz_select(
-; CHECK-NEXT: [[CTLZ:%.*]] = call i32 @llvm.ctlz.i32(i32 [[VALUE:%.*]], i1 false), !range [[RNG4:![0-9]+]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[VALUE:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[CTLZ]]
;
%tobool = icmp ne i32 %Value, 0
@@ -384,7 +384,7 @@ define i32 @ctlz_select(i32 %Value) nounwind {
define <2 x i32> @ctlz_select_vec(<2 x i32> %Value) nounwind {
; CHECK-LABEL: @ctlz_select_vec(
-; CHECK-NEXT: [[CTLZ:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false), !range [[RNG4]]
+; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CTLZ]]
;
%tobool = icmp ne <2 x i32> %Value, zeroinitializer
@@ -395,7 +395,7 @@ define <2 x i32> @ctlz_select_vec(<2 x i32> %Value) nounwind {
define i32 @cttz_select(i32 %Value) nounwind {
; CHECK-LABEL: @cttz_select(
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[VALUE:%.*]], i1 false), !range [[RNG4]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[VALUE:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[CTTZ]]
;
%tobool = icmp ne i32 %Value, 0
@@ -406,7 +406,7 @@ define i32 @cttz_select(i32 %Value) nounwind {
define <2 x i32> @cttz_select_vec(<2 x i32> %Value) nounwind {
; CHECK-LABEL: @cttz_select_vec(
-; CHECK-NEXT: [[CTTZ:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false), !range [[RNG4]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[VALUE:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CTTZ]]
;
%tobool = icmp ne <2 x i32> %Value, zeroinitializer
diff --git a/llvm/test/Transforms/InstCombine/ispow2.ll b/llvm/test/Transforms/InstCombine/ispow2.ll
index cc50c5cd1e6680..a143b1347ccee5 100644
--- a/llvm/test/Transforms/InstCombine/ispow2.ll
+++ b/llvm/test/Transforms/InstCombine/ispow2.ll
@@ -3,7 +3,7 @@
define i1 @is_pow2or0_negate_op(i32 %x) {
; CHECK-LABEL: @is_pow2or0_negate_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -15,7 +15,7 @@ define i1 @is_pow2or0_negate_op(i32 %x) {
define <2 x i1> @is_pow2or0_negate_op_vec(<2 x i32> %x) {
; CHECK-LABEL: @is_pow2or0_negate_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i32> [[TMP1]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -27,7 +27,7 @@ define <2 x i1> @is_pow2or0_negate_op_vec(<2 x i32> %x) {
define i1 @is_pow2or0_decrement_op(i8 %x) {
; CHECK-LABEL: @is_pow2or0_decrement_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i8 [[TMP1]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -39,7 +39,7 @@ define i1 @is_pow2or0_decrement_op(i8 %x) {
define <2 x i1> @is_pow2or0_decrement_op_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2or0_decrement_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult <2 x i8> [[TMP1]], <i8 2, i8 2>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -51,7 +51,7 @@ define <2 x i1> @is_pow2or0_decrement_op_vec(<2 x i8> %x) {
define i1 @isnot_pow2or0_negate_op(i32 %x) {
; CHECK-LABEL: @isnot_pow2or0_negate_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -63,7 +63,7 @@ define i1 @isnot_pow2or0_negate_op(i32 %x) {
define <2 x i1> @isnot_pow2or0_negate_op_vec(<2 x i32> %x) {
; CHECK-LABEL: @isnot_pow2or0_negate_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -75,7 +75,7 @@ define <2 x i1> @isnot_pow2or0_negate_op_vec(<2 x i32> %x) {
define i1 @isnot_pow2or0_decrement_op(i8 %x) {
; CHECK-LABEL: @isnot_pow2or0_decrement_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -87,7 +87,7 @@ define i1 @isnot_pow2or0_decrement_op(i8 %x) {
define <2 x i1> @isnot_pow2or0_decrement_op_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2or0_decrement_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt <2 x i8> [[TMP1]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[CMP]]
;
@@ -100,7 +100,7 @@ define <2 x i1> @isnot_pow2or0_decrement_op_vec(<2 x i8> %x) {
define i1 @is_pow2or0_negate_op_commute1(i32 %p) {
; CHECK-LABEL: @is_pow2or0_negate_op_commute1(
; CHECK-NEXT: [[X:%.*]] = srem i32 42, [[P:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 7) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -116,7 +116,7 @@ define i1 @is_pow2or0_negate_op_commute1(i32 %p) {
define i1 @isnot_pow2or0_negate_op_commute2(i32 %p) {
; CHECK-LABEL: @isnot_pow2or0_negate_op_commute2(
; CHECK-NEXT: [[X:%.*]] = urem i32 42, [[P:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG2]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 7) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -130,7 +130,7 @@ define i1 @isnot_pow2or0_negate_op_commute2(i32 %p) {
define i1 @isnot_pow2or0_negate_op_commute3(i32 %p) {
; CHECK-LABEL: @isnot_pow2or0_negate_op_commute3(
; CHECK-NEXT: [[X:%.*]] = urem i32 42, [[P:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG2]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 7) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -147,7 +147,7 @@ define i1 @is_pow2or0_negate_op_extra_use1(i32 %x) {
; CHECK-LABEL: @is_pow2or0_negate_op_extra_use1(
; CHECK-NEXT: [[NEG:%.*]] = sub i32 0, [[X:%.*]]
; CHECK-NEXT: call void @use(i32 [[NEG]])
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[TMP1]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -181,7 +181,7 @@ declare void @llvm.assume(i1)
define i1 @is_pow2_ctpop(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -197,7 +197,7 @@ define i1 @is_pow2_non_zero_ult_2(i32 %x) {
; CHECK-LABEL: @is_pow2_non_zero_ult_2(
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[NOTZERO]])
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -212,7 +212,7 @@ define i1 @is_pow2_non_zero_eq_1(i32 %x) {
; CHECK-LABEL: @is_pow2_non_zero_eq_1(
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[NOTZERO]])
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -227,7 +227,7 @@ define i1 @is_pow2_non_zero_ugt_1(i32 %x) {
; CHECK-LABEL: @is_pow2_non_zero_ugt_1(
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[NOTZERO]])
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -242,7 +242,7 @@ define i1 @is_pow2_non_zero_ne_1(i32 %x) {
; CHECK-LABEL: @is_pow2_non_zero_ne_1(
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X:%.*]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[NOTZERO]])
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -255,7 +255,7 @@ define i1 @is_pow2_non_zero_ne_1(i32 %x) {
define i1 @is_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -271,7 +271,7 @@ declare void @use_i1(i1)
define i1 @is_pow2_ctpop_extra_uses(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_extra_uses(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
@@ -290,7 +290,7 @@ define i1 @is_pow2_ctpop_extra_uses(i32 %x) {
define i1 @is_pow2_ctpop_extra_uses_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_extra_uses_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
@@ -311,7 +311,7 @@ define i1 @is_pow2_ctpop_extra_uses_logical(i32 %x) {
define <2 x i1> @is_pow2_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2_ctpop_commute_vec(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[T0]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -326,7 +326,7 @@ define <2 x i1> @is_pow2_ctpop_commute_vec(<2 x i8> %x) {
define i1 @is_pow2_ctpop_wrong_cmp_op1(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_cmp_op1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 3
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
@@ -341,7 +341,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op1(i32 %x) {
define i1 @is_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_cmp_op1_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 3
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
@@ -358,7 +358,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
define i1 @is_pow2_ctpop_wrong_cmp_op2(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_cmp_op2(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 1
; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
@@ -373,7 +373,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op2(i32 %x) {
define i1 @is_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_cmp_op2_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 1
; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
@@ -390,7 +390,7 @@ define i1 @is_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
define i1 @is_pow2_ctpop_wrong_pred1(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_pred1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -403,7 +403,7 @@ define i1 @is_pow2_ctpop_wrong_pred1(i32 %x) {
define i1 @is_pow2_ctpop_wrong_pred1_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_pred1_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -418,7 +418,7 @@ define i1 @is_pow2_ctpop_wrong_pred1_logical(i32 %x) {
define i1 @is_pow2_ctpop_wrong_pred2(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_pred2(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = and i1 [[CMP2]], [[CMP]]
@@ -433,7 +433,7 @@ define i1 @is_pow2_ctpop_wrong_pred2(i32 %x) {
define i1 @is_pow2_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_ctpop_wrong_pred2_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP2]], i1 [[CMP]], i1 false
@@ -450,7 +450,7 @@ define i1 @is_pow2_ctpop_wrong_pred2_logical(i32 %x) {
define i1 @isnot_pow2_ctpop(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -463,7 +463,7 @@ define i1 @isnot_pow2_ctpop(i32 %x) {
define i1 @isnot_pow2_ctpop_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -478,7 +478,7 @@ define i1 @isnot_pow2_ctpop_logical(i32 %x) {
define i1 @isnot_pow2_ctpop_extra_uses(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_extra_uses(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
@@ -497,7 +497,7 @@ define i1 @isnot_pow2_ctpop_extra_uses(i32 %x) {
define i1 @isnot_pow2_ctpop_extra_uses_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_extra_uses_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
@@ -518,7 +518,7 @@ define i1 @isnot_pow2_ctpop_extra_uses_logical(i32 %x) {
define <2 x i1> @isnot_pow2_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_commute_vec(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[T0]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -533,7 +533,7 @@ define <2 x i1> @isnot_pow2_ctpop_commute_vec(<2 x i8> %x) {
define i1 @isnot_pow2_ctpop_wrong_cmp_op1(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_wrong_cmp_op1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
@@ -548,7 +548,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op1(i32 %x) {
define i1 @isnot_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_wrong_cmp_op1_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 2
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
@@ -565,7 +565,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op1_logical(i32 %x) {
define i1 @isnot_pow2_ctpop_wrong_cmp_op2(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_wrong_cmp_op2(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 1
; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
@@ -580,7 +580,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op2(i32 %x) {
define i1 @isnot_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_wrong_cmp_op2_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 1
; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
@@ -597,7 +597,7 @@ define i1 @isnot_pow2_ctpop_wrong_cmp_op2_logical(i32 %x) {
define i1 @isnot_pow2_ctpop_wrong_pred2(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_wrong_pred2(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = or i1 [[CMP2]], [[CMP]]
@@ -612,7 +612,7 @@ define i1 @isnot_pow2_ctpop_wrong_pred2(i32 %x) {
define i1 @isnot_pow2_ctpop_wrong_pred2_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_ctpop_wrong_pred2_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP2]], i1 true, i1 [[CMP]]
@@ -627,7 +627,7 @@ define i1 @isnot_pow2_ctpop_wrong_pred2_logical(i32 %x) {
define i1 @is_pow2_negate_op(i32 %x) {
; CHECK-LABEL: @is_pow2_negate_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -641,7 +641,7 @@ define i1 @is_pow2_negate_op(i32 %x) {
define i1 @is_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @is_pow2_negate_op_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -655,7 +655,7 @@ define i1 @is_pow2_negate_op_logical(i32 %x) {
define <2 x i1> @is_pow2_negate_op_vec(<2 x i32> %x) {
; CHECK-LABEL: @is_pow2_negate_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -669,7 +669,7 @@ define <2 x i1> @is_pow2_negate_op_vec(<2 x i32> %x) {
define i1 @is_pow2_decrement_op(i8 %x) {
; CHECK-LABEL: @is_pow2_decrement_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -683,7 +683,7 @@ define i1 @is_pow2_decrement_op(i8 %x) {
define i1 @is_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @is_pow2_decrement_op_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -697,7 +697,7 @@ define i1 @is_pow2_decrement_op_logical(i8 %x) {
define <2 x i1> @is_pow2_decrement_op_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2_decrement_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp eq <2 x i8> [[TMP1]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -711,7 +711,7 @@ define <2 x i1> @is_pow2_decrement_op_vec(<2 x i8> %x) {
define i1 @isnot_pow2_negate_op(i32 %x) {
; CHECK-LABEL: @isnot_pow2_negate_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -725,7 +725,7 @@ define i1 @isnot_pow2_negate_op(i32 %x) {
define i1 @isnot_pow2_negate_op_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2_negate_op_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -739,7 +739,7 @@ define i1 @isnot_pow2_negate_op_logical(i32 %x) {
define <2 x i1> @isnot_pow2_negate_op_vec(<2 x i32> %x) {
; CHECK-LABEL: @isnot_pow2_negate_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i32> [[TMP1]], <i32 1, i32 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -753,7 +753,7 @@ define <2 x i1> @isnot_pow2_negate_op_vec(<2 x i32> %x) {
define i1 @isnot_pow2_decrement_op(i8 %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -767,7 +767,7 @@ define i1 @isnot_pow2_decrement_op(i8 %x) {
define i1 @isnot_pow2_decrement_op_logical(i8 %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op_logical(
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -781,7 +781,7 @@ define i1 @isnot_pow2_decrement_op_logical(i8 %x) {
define <2 x i1> @isnot_pow2_decrement_op_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2_decrement_op_vec(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ne <2 x i8> [[TMP1]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -797,7 +797,7 @@ define <2 x i1> @isnot_pow2_decrement_op_vec(<2 x i8> %x) {
define i1 @is_pow2or0_ctpop(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: ret i1 [[R]]
;
@@ -810,7 +810,7 @@ define i1 @is_pow2or0_ctpop(i32 %x) {
define i1 @is_pow2or0_ctpop_swap_cmp(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_swap_cmp(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: ret i1 [[R]]
;
@@ -823,7 +823,7 @@ define i1 @is_pow2or0_ctpop_swap_cmp(i32 %x) {
define i1 @is_pow2or0_ctpop_logical(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i32 [[T0]], 2
; CHECK-NEXT: ret i1 [[R]]
;
@@ -836,7 +836,7 @@ define i1 @is_pow2or0_ctpop_logical(i32 %x) {
define <2 x i1> @is_pow2or0_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_commute_vec(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ult <2 x i8> [[T0]], <i8 2, i8 2>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -851,7 +851,7 @@ define <2 x i1> @is_pow2or0_ctpop_commute_vec(<2 x i8> %x) {
define i1 @is_pow2or0_ctpop_extra_uses(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_extra_uses(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: call void @use(i32 [[T0]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
@@ -872,7 +872,7 @@ define i1 @is_pow2or0_ctpop_extra_uses(i32 %x) {
define i1 @is_pow2or0_ctpop_logical_extra_uses(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_logical_extra_uses(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: call void @use(i32 [[T0]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
@@ -895,7 +895,7 @@ define i1 @is_pow2or0_ctpop_logical_extra_uses(i32 %x) {
define i1 @is_pow2or0_ctpop_wrong_cmp_op1(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_wrong_cmp_op1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 2
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = or i1 [[ISZERO]], [[CMP]]
@@ -910,7 +910,7 @@ define i1 @is_pow2or0_ctpop_wrong_cmp_op1(i32 %x) {
define i1 @is_pow2or0_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_wrong_cmp_op1_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 3
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[ISZERO]], i1 true, i1 [[CMP]]
@@ -925,7 +925,7 @@ define i1 @is_pow2or0_ctpop_wrong_cmp_op1_logical(i32 %x) {
define <2 x i1> @is_pow2or0_ctpop_commute_vec_wrong_cmp_op1(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_commute_vec_wrong_cmp_op1(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[T0]], <i8 -1, i8 1>
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq <2 x i8> [[X]], zeroinitializer
; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[CMP]], [[ISZERO]]
@@ -942,7 +942,7 @@ define <2 x i1> @is_pow2or0_ctpop_commute_vec_wrong_cmp_op1(<2 x i8> %x) {
define i1 @is_pow2or0_ctpop_wrong_pred1(i32 %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_wrong_pred1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -977,7 +977,7 @@ define i1 @is_pow2or0_ctpop_wrong_pred2_logical(i32 %x) {
define <2 x i1> @is_pow2or0_ctpop_commute_vec_wrong_pred3(<2 x i8> %x) {
; CHECK-LABEL: @is_pow2or0_ctpop_commute_vec_wrong_pred3(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[T0]], <i8 1, i8 1>
; CHECK-NEXT: [[ISZERO:%.*]] = icmp eq <2 x i8> [[X]], zeroinitializer
; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[CMP]], [[ISZERO]]
@@ -994,7 +994,7 @@ define <2 x i1> @is_pow2or0_ctpop_commute_vec_wrong_pred3(<2 x i8> %x) {
define i1 @isnot_pow2nor0_ctpop(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1007,7 +1007,7 @@ define i1 @isnot_pow2nor0_ctpop(i32 %x) {
define i1 @isnot_pow2nor0_ctpop_swap_cmp(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_swap_cmp(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1020,7 +1020,7 @@ define i1 @isnot_pow2nor0_ctpop_swap_cmp(i32 %x) {
define i1 @isnot_pow2nor0_ctpop_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1033,7 +1033,7 @@ define i1 @isnot_pow2nor0_ctpop_logical(i32 %x) {
define <2 x i1> @isnot_pow2nor0_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_commute_vec(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i8> [[T0]], <i8 1, i8 1>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
@@ -1048,7 +1048,7 @@ define <2 x i1> @isnot_pow2nor0_ctpop_commute_vec(<2 x i8> %x) {
define i1 @isnot_pow2nor0_ctpop_extra_uses(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_extra_uses(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: call void @use(i32 [[T0]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
@@ -1069,7 +1069,7 @@ define i1 @isnot_pow2nor0_ctpop_extra_uses(i32 %x) {
define i1 @isnot_pow2nor0_ctpop_logical_extra_uses(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_logical_extra_uses(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: call void @use(i32 [[T0]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 1
; CHECK-NEXT: call void @use_i1(i1 [[CMP]])
@@ -1092,7 +1092,7 @@ define i1 @isnot_pow2nor0_ctpop_logical_extra_uses(i32 %x) {
define i1 @isnot_pow2nor0_ctpop_wrong_cmp_op1(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_wrong_cmp_op1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 4
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = and i1 [[NOTZERO]], [[CMP]]
@@ -1107,7 +1107,7 @@ define i1 @isnot_pow2nor0_ctpop_wrong_cmp_op1(i32 %x) {
define i1 @isnot_pow2nor0_ctpop_wrong_cmp_op1_logical(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_wrong_cmp_op1_logical(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[T0]], 5
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne i32 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[NOTZERO]], i1 [[CMP]], i1 false
@@ -1122,7 +1122,7 @@ define i1 @isnot_pow2nor0_ctpop_wrong_cmp_op1_logical(i32 %x) {
define <2 x i1> @isnot_pow2nor0_ctpop_commute_vec_wrong_cmp_op1(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_commute_vec_wrong_cmp_op1(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i8> [[T0]], <i8 0, i8 -1>
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne <2 x i8> [[X]], zeroinitializer
; CHECK-NEXT: [[R:%.*]] = and <2 x i1> [[CMP]], [[NOTZERO]]
@@ -1139,7 +1139,7 @@ define <2 x i1> @isnot_pow2nor0_ctpop_commute_vec_wrong_cmp_op1(<2 x i8> %x) {
define i1 @isnot_pow2nor0_ctpop_wrong_pred1(i32 %x) {
; CHECK-LABEL: @isnot_pow2nor0_ctpop_wrong_pred1(
-; CHECK-NEXT: [[T0:%.*]] = tail call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[T0]], 1
; CHECK-NEXT: ret i1 [[CMP]]
;
@@ -1174,7 +1174,7 @@ define i1 @isnot_pow2nor0_ctpop_wrong_pred2_logical(i32 %x) {
define <2 x i1> @isnot_pow2nor0_wrong_pred3_ctpop_commute_vec(<2 x i8> %x) {
; CHECK-LABEL: @isnot_pow2nor0_wrong_pred3_ctpop_commute_vec(
-; CHECK-NEXT: [[T0:%.*]] = tail call <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]]), !range [[RNG1]]
+; CHECK-NEXT: [[T0:%.*]] = tail call range(i8 0, 9) <2 x i8> @llvm.ctpop.v2i8(<2 x i8> [[X:%.*]])
; CHECK-NEXT: [[CMP:%.*]] = icmp ne <2 x i8> [[T0]], <i8 1, i8 1>
; CHECK-NEXT: [[NOTZERO:%.*]] = icmp ne <2 x i8> [[X]], zeroinitializer
; CHECK-NEXT: [[R:%.*]] = or <2 x i1> [[CMP]], [[NOTZERO]]
@@ -1217,7 +1217,7 @@ define i1 @blsmsk_is_p2_or_z(i32 %xx, i32 %yy) {
define i1 @blsmsk_isnt_p2_or_z(i32 %x) {
; CHECK-LABEL: @blsmsk_isnt_p2_or_z(
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1230,7 +1230,7 @@ define i1 @blsmsk_isnt_p2_or_z(i32 %x) {
define i1 @blsmsk_is_p2_or_z_fail(i32 %xx, i32 %yy) {
; CHECK-LABEL: @blsmsk_is_p2_or_z_fail(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XX:%.*]], [[YY:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i32 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1315,7 +1315,7 @@ define i1 @blsmsk_is_p2_or_z_fail_bad_cmp(i32 %x, i32 %z) {
define i1 @blsmsk_is_p2_or_z_ule_xy(i8 %xx, i8 %yy) {
; CHECK-LABEL: @blsmsk_is_p2_or_z_ule_xy(
; CHECK-NEXT: [[X:%.*]] = or i8 [[XX:%.*]], [[YY:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[TMP1]], 2
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1346,7 +1346,7 @@ define i1 @blsmsk_is_p2_or_z_ule_yx_fail(i8 %xx, i8 %yy) {
define i1 @blsmsk_is_p2_or_z_uge_yx(i8 %xx, i8 %yy) {
; CHECK-LABEL: @blsmsk_is_p2_or_z_uge_yx(
; CHECK-NEXT: [[X:%.*]] = or i8 [[XX:%.*]], [[YY:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ult i8 [[TMP1]], 2
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1376,7 +1376,7 @@ define i1 @blsmsk_is_p2_or_z_uge_xy_fail(i8 %xx, i8 %yy) {
define i1 @blsmsk_isnt_p2_or_z_ugt_xy(i8 %xx, i8 %yy) {
; CHECK-LABEL: @blsmsk_isnt_p2_or_z_ugt_xy(
; CHECK-NEXT: [[X:%.*]] = or i8 [[XX:%.*]], [[YY:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1407,7 +1407,7 @@ define i1 @blsmsk_isnt_p2_or_z_ugt_yx_fail(i8 %xx, i8 %yy) {
define i1 @blsmsk_isnt_p2_or_z_ult_yx(i8 %xx, i8 %yy) {
; CHECK-LABEL: @blsmsk_isnt_p2_or_z_ult_yx(
; CHECK-NEXT: [[X:%.*]] = or i8 [[XX:%.*]], [[YY:%.*]]
-; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.ctpop.i8(i8 [[X]]), !range [[RNG1]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt i8 [[TMP1]], 1
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1450,7 +1450,7 @@ define i1 @is_pow2_nz_known_bits(i32 %xin) {
define i1 @is_pow2_nz_known_bits_fail_multiuse(i32 %xin) {
; CHECK-LABEL: @is_pow2_nz_known_bits_fail_multiuse(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], 64
-; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: call void @use.i32(i32 [[CNT]])
; CHECK-NEXT: [[R:%.*]] = icmp eq i32 [[CNT]], 1
; CHECK-NEXT: ret i1 [[R]]
@@ -1476,7 +1476,7 @@ define i1 @not_pow2_nz_known_bits(i32 %xin) {
define i1 @not_pow2_nz_known_bits_fail_not_p2_test(i32 %xin) {
; CHECK-LABEL: @not_pow2_nz_known_bits_fail_not_p2_test(
; CHECK-NEXT: [[X:%.*]] = or i32 [[XIN:%.*]], 1
-; CHECK-NEXT: [[CNT:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X]]), !range [[RNG3]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ne i32 [[CNT]], 2
; CHECK-NEXT: ret i1 [[R]]
;
@@ -1513,7 +1513,7 @@ define <2 x i1> @not_pow2_or_z_known_bits(<2 x i32> %xin) {
define <2 x i1> @not_pow2_or_z_known_bits_fail_wrong_cmp(<2 x i32> %xin) {
; CHECK-LABEL: @not_pow2_or_z_known_bits_fail_wrong_cmp(
; CHECK-NEXT: [[X:%.*]] = or <2 x i32> [[XIN:%.*]], <i32 64, i32 64>
-; CHECK-NEXT: [[CNT:%.*]] = call <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X]]), !range [[RNG3]]
+; CHECK-NEXT: [[CNT:%.*]] = call range(i32 1, 33) <2 x i32> @llvm.ctpop.v2i32(<2 x i32> [[X]])
; CHECK-NEXT: [[R:%.*]] = icmp ugt <2 x i32> [[CNT]], <i32 2, i32 2>
; CHECK-NEXT: ret <2 x i1> [[R]]
;
diff --git a/llvm/test/Transforms/InstCombine/known-non-zero.ll b/llvm/test/Transforms/InstCombine/known-non-zero.ll
index f1c757cafefb0f..b77c04eb81475a 100644
--- a/llvm/test/Transforms/InstCombine/known-non-zero.ll
+++ b/llvm/test/Transforms/InstCombine/known-non-zero.ll
@@ -13,7 +13,7 @@ define i32 @test0(i64 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp eq i64 [[X:%.*]], 0
; CHECK-NEXT: br i1 [[C]], label [[EXIT:%.*]], label [[NON_ZERO:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.cttz.i64(i64 [[X]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X]], i1 true)
; CHECK-NEXT: [[CTZ32:%.*]] = trunc nuw nsw i64 [[CTZ]] to i32
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
@@ -40,7 +40,7 @@ define i32 @test1(i64 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp eq i64 [[X:%.*]], 0
; CHECK-NEXT: br i1 [[C]], label [[EXIT:%.*]], label [[NON_ZERO:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 true)
; CHECK-NEXT: [[CTZ32:%.*]] = trunc nuw nsw i64 [[CTZ]] to i32
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
@@ -69,7 +69,7 @@ define <8 x i64> @test2(<8 x i64> %x) {
; CHECK-NEXT: [[C:%.*]] = icmp eq i8 [[B]], 0
; CHECK-NEXT: br i1 [[C]], label [[EXIT:%.*]], label [[NON_ZERO:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call <8 x i64> @llvm.cttz.v8i64(<8 x i64> [[X]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) <8 x i64> @llvm.cttz.v8i64(<8 x i64> [[X]], i1 false)
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
; CHECK-NEXT: [[RES:%.*]] = phi <8 x i64> [ [[CTZ]], [[NON_ZERO]] ], [ zeroinitializer, [[START:%.*]] ]
@@ -140,7 +140,7 @@ define i64 @test_sgt_zero(i64 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp sgt i64 [[X:%.*]], 0
; CHECK-NEXT: br i1 [[C]], label [[NON_ZERO:%.*]], label [[EXIT:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 1, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 true)
; CHECK-NEXT: ret i64 [[CTZ]]
; CHECK: exit:
; CHECK-NEXT: ret i64 -1
@@ -185,7 +185,7 @@ define i64 @test_slt_ten(i64 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt i64 [[X:%.*]], 10
; CHECK-NEXT: br i1 [[C]], label [[MAYBE_ZERO:%.*]], label [[EXIT:%.*]]
; CHECK: maybe_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 false)
; CHECK-NEXT: ret i64 [[CTZ]]
; CHECK: exit:
; CHECK-NEXT: ret i64 -1
@@ -208,7 +208,7 @@ define i64 @test_ugt_unknown(i64 %x, i64 %y) {
; CHECK-NEXT: [[C:%.*]] = icmp ugt i64 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[C]], label [[NON_ZERO:%.*]], label [[EXIT:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 true)
; CHECK-NEXT: ret i64 [[CTZ]]
; CHECK: exit:
; CHECK-NEXT: ret i64 -1
@@ -231,7 +231,7 @@ define i64 @test_sle_zero(i64 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp slt i64 [[X:%.*]], 1
; CHECK-NEXT: br i1 [[C]], label [[EXIT:%.*]], label [[NON_ZERO:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 1, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 true)
; CHECK-NEXT: ret i64 [[CTZ]]
; CHECK: exit:
; CHECK-NEXT: ret i64 -1
@@ -276,7 +276,7 @@ define i64 @test_sge_ten(i64 %x) {
; CHECK-NEXT: [[C:%.*]] = icmp sgt i64 [[X:%.*]], 9
; CHECK-NEXT: br i1 [[C]], label [[EXIT:%.*]], label [[MAYBE_ZERO:%.*]]
; CHECK: maybe_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 false)
; CHECK-NEXT: ret i64 [[CTZ]]
; CHECK: exit:
; CHECK-NEXT: ret i64 -1
@@ -299,7 +299,7 @@ define i64 @test_ule_unknown(i64 %x, i64 %y) {
; CHECK-NEXT: [[C_NOT:%.*]] = icmp ugt i64 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: br i1 [[C_NOT]], label [[NON_ZERO:%.*]], label [[EXIT:%.*]]
; CHECK: non_zero:
-; CHECK-NEXT: [[CTZ:%.*]] = call i64 @llvm.ctlz.i64(i64 [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTZ:%.*]] = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X]], i1 true)
; CHECK-NEXT: ret i64 [[CTZ]]
; CHECK: exit:
; CHECK-NEXT: ret i64 -1
diff --git a/llvm/test/Transforms/InstCombine/known-phi-recurse.ll b/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
index d33e08ffaf9b77..c2007d16ae93be 100644
--- a/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
+++ b/llvm/test/Transforms/InstCombine/known-phi-recurse.ll
@@ -16,7 +16,7 @@ define i32 @single_entry_phi(i64 %x, i1 %c) {
; CHECK: body:
; CHECK-NEXT: br i1 [[C:%.*]], label [[END:%.*]], label [[BODY]]
; CHECK: end:
-; CHECK-NEXT: [[Y:%.*]] = call i64 @llvm.ctpop.i64(i64 [[X:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[Y:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[X:%.*]])
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw nsw i64 [[Y]] to i32
; CHECK-NEXT: ret i32 [[TRUNC]]
;
@@ -36,7 +36,7 @@ end:
define i32 @two_entry_phi_with_constant(i64 %x, i1 %c) {
; CHECK-LABEL: @two_entry_phi_with_constant(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Y:%.*]] = call i64 @llvm.ctpop.i64(i64 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[Y:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[X:%.*]])
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw nsw i64 [[Y]] to i32
; CHECK-NEXT: br i1 [[C:%.*]], label [[END:%.*]], label [[BODY:%.*]]
; CHECK: body:
@@ -61,11 +61,11 @@ end:
define i32 @two_entry_phi_non_constant(i64 %x, i64 %x2, i1 %c) {
; CHECK-LABEL: @two_entry_phi_non_constant(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Y:%.*]] = call i64 @llvm.ctpop.i64(i64 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[Y:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[X:%.*]])
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw nsw i64 [[Y]] to i32
; CHECK-NEXT: br i1 [[C:%.*]], label [[END:%.*]], label [[BODY:%.*]]
; CHECK: body:
-; CHECK-NEXT: [[Y2:%.*]] = call i64 @llvm.ctpop.i64(i64 [[X2:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[Y2:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[X2:%.*]])
; CHECK-NEXT: [[TRUNC2:%.*]] = trunc nuw nsw i64 [[Y2]] to i32
; CHECK-NEXT: br label [[END]]
; CHECK: end:
@@ -90,7 +90,7 @@ end:
define i32 @neg_many_branches(i64 %x) {
; CHECK-LABEL: @neg_many_branches(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[Y:%.*]] = call i64 @llvm.ctpop.i64(i64 [[X:%.*]]), !range [[RNG0]]
+; CHECK-NEXT: [[Y:%.*]] = call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 [[X:%.*]])
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw nsw i64 [[Y]] to i32
; CHECK-NEXT: switch i32 [[TRUNC]], label [[END:%.*]] [
; CHECK-NEXT: i32 1, label [[ONE:%.*]]
diff --git a/llvm/test/Transforms/InstCombine/minmax-fold.ll b/llvm/test/Transforms/InstCombine/minmax-fold.ll
index 8b47dc7a28079e..3e870c695cf1a5 100644
--- a/llvm/test/Transforms/InstCombine/minmax-fold.ll
+++ b/llvm/test/Transforms/InstCombine/minmax-fold.ll
@@ -1524,7 +1524,7 @@ define i32 @test_smin_umin4(i32 %x) {
define i32 @test_umax_nonminmax(i32 %x) {
; CHECK-LABEL: @test_umax_nonminmax(
-; CHECK-NEXT: [[Y:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[Y:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[UMAX:%.*]] = call i32 @llvm.umax.i32(i32 [[Y]], i32 1)
; CHECK-NEXT: ret i32 [[UMAX]]
;
diff --git a/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll
index b94be990199bf5..ca586a71b42c8c 100644
--- a/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll
+++ b/llvm/test/Transforms/InstCombine/reduction-add-sext-zext-i1.ll
@@ -4,7 +4,7 @@
define i1 @reduce_add_self(<8 x i1> %x) {
; CHECK-LABEL: @reduce_add_self(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
-; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: [[RES:%.*]] = trunc i8 [[TMP2]] to i1
; CHECK-NEXT: ret i1 [[RES]]
;
@@ -15,7 +15,7 @@ define i1 @reduce_add_self(<8 x i1> %x) {
define i32 @reduce_add_sext(<4 x i1> %x) {
; CHECK-LABEL: @reduce_add_sext(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[X:%.*]] to i4
-; CHECK-NEXT: [[TMP2:%.*]] = call i4 @llvm.ctpop.i4(i4 [[TMP1]]), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i4 0, 5) i4 @llvm.ctpop.i4(i4 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = zext nneg i4 [[TMP2]] to i32
; CHECK-NEXT: [[RES:%.*]] = sub nsw i32 0, [[TMP3]]
; CHECK-NEXT: ret i32 [[RES]]
@@ -28,7 +28,7 @@ define i32 @reduce_add_sext(<4 x i1> %x) {
define i64 @reduce_add_zext(<8 x i1> %x) {
; CHECK-LABEL: @reduce_add_zext(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
-; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: [[RES:%.*]] = zext nneg i8 [[TMP2]] to i64
; CHECK-NEXT: ret i64 [[RES]]
;
@@ -40,7 +40,7 @@ define i64 @reduce_add_zext(<8 x i1> %x) {
define i16 @reduce_add_sext_same(<16 x i1> %x) {
; CHECK-LABEL: @reduce_add_sext_same(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i1> [[X:%.*]] to i16
-; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.ctpop.i16(i16 [[TMP1]]), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i16 0, 17) i16 @llvm.ctpop.i16(i16 [[TMP1]])
; CHECK-NEXT: [[RES:%.*]] = sub nsw i16 0, [[TMP2]]
; CHECK-NEXT: ret i16 [[RES]]
;
@@ -52,7 +52,7 @@ define i16 @reduce_add_sext_same(<16 x i1> %x) {
define i8 @reduce_add_zext_long(<128 x i1> %x) {
; CHECK-LABEL: @reduce_add_zext_long(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128
-; CHECK-NEXT: [[TMP2:%.*]] = call i128 @llvm.ctpop.i128(i128 [[TMP1]]), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i128 0, 129) i128 @llvm.ctpop.i128(i128 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = trunc nuw i128 [[TMP2]] to i8
; CHECK-NEXT: [[RES:%.*]] = sub i8 0, [[TMP3]]
; CHECK-NEXT: ret i8 [[RES]]
@@ -66,7 +66,7 @@ define i8 @reduce_add_zext_long(<128 x i1> %x) {
define i8 @reduce_add_zext_long_external_use(<128 x i1> %x) {
; CHECK-LABEL: @reduce_add_zext_long_external_use(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128
-; CHECK-NEXT: [[TMP2:%.*]] = call i128 @llvm.ctpop.i128(i128 [[TMP1]]), !range [[RNG3]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i128 0, 129) i128 @llvm.ctpop.i128(i128 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = trunc nuw i128 [[TMP2]] to i8
; CHECK-NEXT: [[RES:%.*]] = sub i8 0, [[TMP3]]
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <128 x i1> [[X]], i64 0
@@ -85,7 +85,7 @@ define i8 @reduce_add_zext_long_external_use(<128 x i1> %x) {
define i64 @reduce_add_zext_external_use(<8 x i1> %x) {
; CHECK-LABEL: @reduce_add_zext_external_use(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
-; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: [[RES:%.*]] = zext nneg i8 [[TMP2]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = extractelement <8 x i1> [[X]], i64 0
; CHECK-NEXT: [[EXT:%.*]] = zext i1 [[TMP3]] to i64
diff --git a/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll b/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll
index 84ac9369b5ff06..b5baf8ec71a489 100644
--- a/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll
+++ b/llvm/test/Transforms/InstCombine/reduction-xor-sext-zext-i1.ll
@@ -4,7 +4,7 @@
define i1 @reduce_xor_self(<8 x i1> %x) {
; CHECK-LABEL: @reduce_xor_self(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
-; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: [[RES:%.*]] = trunc i8 [[TMP2]] to i1
; CHECK-NEXT: ret i1 [[RES]]
;
@@ -15,7 +15,7 @@ define i1 @reduce_xor_self(<8 x i1> %x) {
define i32 @reduce_xor_sext(<4 x i1> %x) {
; CHECK-LABEL: @reduce_xor_sext(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i1> [[X:%.*]] to i4
-; CHECK-NEXT: [[TMP2:%.*]] = call i4 @llvm.ctpop.i4(i4 [[TMP1]]), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i4 0, 5) i4 @llvm.ctpop.i4(i4 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = trunc i4 [[TMP2]] to i1
; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP3]] to i32
; CHECK-NEXT: ret i32 [[RES]]
@@ -28,7 +28,7 @@ define i32 @reduce_xor_sext(<4 x i1> %x) {
define i64 @reduce_xor_zext(<8 x i1> %x) {
; CHECK-LABEL: @reduce_xor_zext(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
-; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
; CHECK-NEXT: [[RES:%.*]] = zext nneg i8 [[TMP3]] to i64
; CHECK-NEXT: ret i64 [[RES]]
@@ -41,7 +41,7 @@ define i64 @reduce_xor_zext(<8 x i1> %x) {
define i16 @reduce_xor_sext_same(<16 x i1> %x) {
; CHECK-LABEL: @reduce_xor_sext_same(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i1> [[X:%.*]] to i16
-; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.ctpop.i16(i16 [[TMP1]]), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i16 0, 17) i16 @llvm.ctpop.i16(i16 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = and i16 [[TMP2]], 1
; CHECK-NEXT: [[SEXT:%.*]] = sub nsw i16 0, [[TMP3]]
; CHECK-NEXT: ret i16 [[SEXT]]
@@ -54,7 +54,7 @@ define i16 @reduce_xor_sext_same(<16 x i1> %x) {
define i8 @reduce_xor_zext_long(<128 x i1> %x) {
; CHECK-LABEL: @reduce_xor_zext_long(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128
-; CHECK-NEXT: [[TMP2:%.*]] = call i128 @llvm.ctpop.i128(i128 [[TMP1]]), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i128 0, 129) i128 @llvm.ctpop.i128(i128 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i1
; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP3]] to i8
; CHECK-NEXT: ret i8 [[RES]]
@@ -68,7 +68,7 @@ define i8 @reduce_xor_zext_long(<128 x i1> %x) {
define i8 @reduce_xor_zext_long_external_use(<128 x i1> %x) {
; CHECK-LABEL: @reduce_xor_zext_long_external_use(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <128 x i1> [[X:%.*]] to i128
-; CHECK-NEXT: [[TMP2:%.*]] = call i128 @llvm.ctpop.i128(i128 [[TMP1]]), !range [[RNG3]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i128 0, 129) i128 @llvm.ctpop.i128(i128 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i1
; CHECK-NEXT: [[RES:%.*]] = sext i1 [[TMP3]] to i8
; CHECK-NEXT: [[TMP5:%.*]] = extractelement <128 x i1> [[X]], i64 0
@@ -87,7 +87,7 @@ define i8 @reduce_xor_zext_long_external_use(<128 x i1> %x) {
define i64 @reduce_xor_zext_external_use(<8 x i1> %x) {
; CHECK-LABEL: @reduce_xor_zext_external_use(
; CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i1> [[X:%.*]] to i8
-; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.ctpop.i8(i8 [[TMP1]]), !range [[RNG0]]
+; CHECK-NEXT: [[TMP2:%.*]] = call range(i8 0, 9) i8 @llvm.ctpop.i8(i8 [[TMP1]])
; CHECK-NEXT: [[TMP3:%.*]] = and i8 [[TMP2]], 1
; CHECK-NEXT: [[RES:%.*]] = zext nneg i8 [[TMP3]] to i64
; CHECK-NEXT: [[TMP4:%.*]] = extractelement <8 x i1> [[X]], i64 0
diff --git a/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll b/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
index 69896f855f5f16..3d5f2c209edf3b 100644
--- a/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
+++ b/llvm/test/Transforms/InstCombine/select-cmp-cttz-ctlz.ll
@@ -7,7 +7,7 @@
define i16 @test1(i16 %x) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i16 [[CT]]
;
%ct = tail call i16 @llvm.ctlz.i16(i16 %x, i1 true)
@@ -18,7 +18,7 @@ define i16 @test1(i16 %x) {
define i32 @test2(i32 %x) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[CT]]
;
%ct = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
@@ -29,7 +29,7 @@ define i32 @test2(i32 %x) {
define i64 @test3(i64 %x) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[CT]]
;
%ct = tail call i64 @llvm.ctlz.i64(i64 %x, i1 true)
@@ -40,7 +40,7 @@ define i64 @test3(i64 %x) {
define i16 @test4(i16 %x) {
; CHECK-LABEL: @test4(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i16 [[CT]]
;
%ct = tail call i16 @llvm.ctlz.i16(i16 %x, i1 true)
@@ -51,7 +51,7 @@ define i16 @test4(i16 %x) {
define i32 @test5(i32 %x) {
; CHECK-LABEL: @test5(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[CT]]
;
%ct = tail call i32 @llvm.ctlz.i32(i32 %x, i1 true)
@@ -62,7 +62,7 @@ define i32 @test5(i32 %x) {
define i64 @test6(i64 %x) {
; CHECK-LABEL: @test6(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[CT]]
;
%ct = tail call i64 @llvm.ctlz.i64(i64 %x, i1 true)
@@ -73,7 +73,7 @@ define i64 @test6(i64 %x) {
define i16 @test1b(i16 %x) {
; CHECK-LABEL: @test1b(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i16 [[CT]]
;
%ct = tail call i16 @llvm.cttz.i16(i16 %x, i1 true)
@@ -84,7 +84,7 @@ define i16 @test1b(i16 %x) {
define i32 @test2b(i32 %x) {
; CHECK-LABEL: @test2b(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[CT]]
;
%ct = tail call i32 @llvm.cttz.i32(i32 %x, i1 true)
@@ -95,7 +95,7 @@ define i32 @test2b(i32 %x) {
define i64 @test3b(i64 %x) {
; CHECK-LABEL: @test3b(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[CT]]
;
%ct = tail call i64 @llvm.cttz.i64(i64 %x, i1 true)
@@ -106,7 +106,7 @@ define i64 @test3b(i64 %x) {
define i16 @test4b(i16 %x) {
; CHECK-LABEL: @test4b(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i16 [[CT]]
;
%ct = tail call i16 @llvm.cttz.i16(i16 %x, i1 true)
@@ -118,7 +118,7 @@ define i16 @test4b(i16 %x) {
define i32 @test5b(i32 %x) {
; CHECK-LABEL: @test5b(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[CT]]
;
entry:
@@ -130,7 +130,7 @@ entry:
define i64 @test6b(i64 %x) {
; CHECK-LABEL: @test6b(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i64 [[CT]]
;
%ct = tail call i64 @llvm.cttz.i64(i64 %x, i1 true)
@@ -141,7 +141,7 @@ define i64 @test6b(i64 %x) {
define i32 @test1c(i16 %x) {
; CHECK-LABEL: @test1c(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST2:%.*]] = zext nneg i16 [[CT]] to i32
; CHECK-NEXT: ret i32 [[CAST2]]
;
@@ -154,7 +154,7 @@ define i32 @test1c(i16 %x) {
define i64 @test2c(i16 %x) {
; CHECK-LABEL: @test2c(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.cttz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i16 [[CT]] to i64
; CHECK-NEXT: ret i64 [[CONV]]
;
@@ -167,7 +167,7 @@ define i64 @test2c(i16 %x) {
define i64 @test3c(i32 %x) {
; CHECK-LABEL: @test3c(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i32 [[CT]] to i64
; CHECK-NEXT: ret i64 [[CONV]]
;
@@ -180,7 +180,7 @@ define i64 @test3c(i32 %x) {
define i32 @test4c(i16 %x) {
; CHECK-LABEL: @test4c(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = zext nneg i16 [[CT]] to i32
; CHECK-NEXT: ret i32 [[CAST]]
;
@@ -193,7 +193,7 @@ define i32 @test4c(i16 %x) {
define i64 @test5c(i16 %x) {
; CHECK-LABEL: @test5c(
-; CHECK-NEXT: [[CT:%.*]] = tail call i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = zext nneg i16 [[CT]] to i64
; CHECK-NEXT: ret i64 [[CAST]]
;
@@ -206,7 +206,7 @@ define i64 @test5c(i16 %x) {
define i64 @test6c(i32 %x) {
; CHECK-LABEL: @test6c(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = zext nneg i32 [[CT]] to i64
; CHECK-NEXT: ret i64 [[CAST]]
;
@@ -219,7 +219,7 @@ define i64 @test6c(i32 %x) {
define i16 @test1d(i64 %x) {
; CHECK-LABEL: @test1d(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = trunc nuw nsw i64 [[CT]] to i16
; CHECK-NEXT: ret i16 [[CONV]]
;
@@ -232,7 +232,7 @@ define i16 @test1d(i64 %x) {
define i32 @test2d(i64 %x) {
; CHECK-LABEL: @test2d(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: ret i32 [[CAST]]
;
@@ -245,7 +245,7 @@ define i32 @test2d(i64 %x) {
define i16 @test3d(i32 %x) {
; CHECK-LABEL: @test3d(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i32 [[CT]] to i16
; CHECK-NEXT: ret i16 [[CAST]]
;
@@ -258,7 +258,7 @@ define i16 @test3d(i32 %x) {
define i16 @test4d(i64 %x) {
; CHECK-LABEL: @test4d(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i16
; CHECK-NEXT: ret i16 [[CAST]]
;
@@ -271,7 +271,7 @@ define i16 @test4d(i64 %x) {
define i32 @test5d(i64 %x) {
; CHECK-LABEL: @test5d(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: ret i32 [[CAST]]
;
@@ -287,7 +287,7 @@ define i32 @test5d(i64 %x) {
define i32 @not_op_ctlz(i64 %x) {
; CHECK-LABEL: @not_op_ctlz(
; CHECK-NEXT: [[N:%.*]] = xor i64 [[X:%.*]], -1
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[N]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[N]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: ret i32 [[CAST]]
;
@@ -302,7 +302,7 @@ define i32 @not_op_ctlz(i64 %x) {
define i32 @not_op_cttz(i64 %x) {
; CHECK-LABEL: @not_op_cttz(
; CHECK-NEXT: [[N:%.*]] = xor i64 [[X:%.*]], -1
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[N]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[N]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: ret i32 [[CAST]]
;
@@ -319,7 +319,7 @@ define i32 @not_op_cttz(i64 %x) {
define i32 @not_op_ctlz_wrong_xor_op1(i64 %x) {
; CHECK-LABEL: @not_op_ctlz_wrong_xor_op1(
; CHECK-NEXT: [[N:%.*]] = xor i64 [[X:%.*]], -2
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[N]], i1 true), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[N]], i1 true)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[X]], -1
; CHECK-NEXT: [[R:%.*]] = select i1 [[TOBOOL]], i32 64, i32 [[CAST]]
@@ -338,7 +338,7 @@ define i32 @not_op_ctlz_wrong_xor_op1(i64 %x) {
define i32 @not_op_ctlz_wrong_xor_op0(i64 %x, i64 %y) {
; CHECK-LABEL: @not_op_ctlz_wrong_xor_op0(
; CHECK-NEXT: [[N:%.*]] = xor i64 [[Y:%.*]], -1
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[N]], i1 true), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[N]], i1 true)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[X:%.*]], -1
; CHECK-NEXT: [[R:%.*]] = select i1 [[TOBOOL]], i32 64, i32 [[CAST]]
@@ -357,7 +357,7 @@ define i32 @not_op_ctlz_wrong_xor_op0(i64 %x, i64 %y) {
define i32 @not_op_cttz_wrong_cmp(i64 %x) {
; CHECK-LABEL: @not_op_cttz_wrong_cmp(
; CHECK-NEXT: [[N:%.*]] = xor i64 [[X:%.*]], -1
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[N]], i1 true), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[N]], i1 true)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i64 [[CT]] to i32
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[X]], 0
; CHECK-NEXT: [[R:%.*]] = select i1 [[TOBOOL]], i32 64, i32 [[CAST]]
@@ -373,7 +373,7 @@ define i32 @not_op_cttz_wrong_cmp(i64 %x) {
define i16 @test6d(i32 %x) {
; CHECK-LABEL: @test6d(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CAST:%.*]] = trunc nuw nsw i32 [[CT]] to i16
; CHECK-NEXT: ret i16 [[CAST]]
;
@@ -386,7 +386,7 @@ define i16 @test6d(i32 %x) {
define i64 @select_bug1(i32 %x) {
; CHECK-LABEL: @select_bug1(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i32 [[CT]] to i64
; CHECK-NEXT: ret i64 [[CONV]]
;
@@ -399,7 +399,7 @@ define i64 @select_bug1(i32 %x) {
define i16 @select_bug2(i32 %x) {
; CHECK-LABEL: @select_bug2(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = trunc nuw nsw i32 [[CT]] to i16
; CHECK-NEXT: ret i16 [[CONV]]
;
@@ -412,7 +412,7 @@ define i16 @select_bug2(i32 %x) {
define i128 @test7(i128 %x) {
; CHECK-LABEL: @test7(
-; CHECK-NEXT: [[CT:%.*]] = tail call i128 @llvm.ctlz.i128(i128 [[X:%.*]], i1 false), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i128 0, 129) i128 @llvm.ctlz.i128(i128 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i128 [[CT]]
;
%ct = tail call i128 @llvm.ctlz.i128(i128 %x, i1 true)
@@ -423,7 +423,7 @@ define i128 @test7(i128 %x) {
define i128 @test8(i128 %x) {
; CHECK-LABEL: @test8(
-; CHECK-NEXT: [[CT:%.*]] = tail call i128 @llvm.cttz.i128(i128 [[X:%.*]], i1 false), !range [[RNG3]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i128 0, 129) i128 @llvm.cttz.i128(i128 [[X:%.*]], i1 false)
; CHECK-NEXT: ret i128 [[CT]]
;
%ct = tail call i128 @llvm.cttz.i128(i128 %x, i1 true)
@@ -434,7 +434,7 @@ define i128 @test8(i128 %x) {
define i32 @test_ctlz_not_bw(i32 %x) {
; CHECK-LABEL: @test_ctlz_not_bw(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP_NOT]], i32 123, i32 [[CT]]
; CHECK-NEXT: ret i32 [[RES]]
@@ -447,7 +447,7 @@ define i32 @test_ctlz_not_bw(i32 %x) {
define i32 @test_ctlz_not_bw_multiuse(i32 %x) {
; CHECK-LABEL: @test_ctlz_not_bw_multiuse(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], i32 123, i32 [[CT]]
; CHECK-NEXT: [[RES:%.*]] = or i32 [[SEL]], [[CT]]
@@ -462,7 +462,7 @@ define i32 @test_ctlz_not_bw_multiuse(i32 %x) {
define i32 @test_cttz_not_bw(i32 %x) {
; CHECK-LABEL: @test_cttz_not_bw(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[RES:%.*]] = select i1 [[CMP_NOT]], i32 123, i32 [[CT]]
; CHECK-NEXT: ret i32 [[RES]]
@@ -475,7 +475,7 @@ define i32 @test_cttz_not_bw(i32 %x) {
define i32 @test_cttz_not_bw_multiuse(i32 %x) {
; CHECK-LABEL: @test_cttz_not_bw_multiuse(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i32 [[X]], 0
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP_NOT]], i32 123, i32 [[CT]]
; CHECK-NEXT: [[RES:%.*]] = or i32 [[SEL]], [[CT]]
@@ -490,7 +490,7 @@ define i32 @test_cttz_not_bw_multiuse(i32 %x) {
define <2 x i32> @test_ctlz_bw_vec(<2 x i32> %x) {
; CHECK-LABEL: @test_ctlz_bw_vec(
-; CHECK-NEXT: [[CT:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CT]]
;
%ct = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 true)
@@ -501,7 +501,7 @@ define <2 x i32> @test_ctlz_bw_vec(<2 x i32> %x) {
define <2 x i32> @test_ctlz_not_bw_vec(<2 x i32> %x) {
; CHECK-LABEL: @test_ctlz_not_bw_vec(
-; CHECK-NEXT: [[CT:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[X:%.*]], i1 true)
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[RES:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i32> zeroinitializer, <2 x i32> [[CT]]
; CHECK-NEXT: ret <2 x i32> [[RES]]
@@ -514,7 +514,7 @@ define <2 x i32> @test_ctlz_not_bw_vec(<2 x i32> %x) {
define <2 x i32> @test_cttz_bw_vec(<2 x i32> %x) {
; CHECK-LABEL: @test_cttz_bw_vec(
-; CHECK-NEXT: [[CT:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 false)
; CHECK-NEXT: ret <2 x i32> [[CT]]
;
%ct = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> %x, i1 true)
@@ -525,7 +525,7 @@ define <2 x i32> @test_cttz_bw_vec(<2 x i32> %x) {
define <2 x i32> @test_cttz_not_bw_vec(<2 x i32> %x) {
; CHECK-LABEL: @test_cttz_not_bw_vec(
-; CHECK-NEXT: [[CT:%.*]] = tail call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[X:%.*]], i1 true)
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i32> [[X]], zeroinitializer
; CHECK-NEXT: [[RES:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i32> zeroinitializer, <2 x i32> [[CT]]
; CHECK-NEXT: ret <2 x i32> [[RES]]
@@ -538,7 +538,7 @@ define <2 x i32> @test_cttz_not_bw_vec(<2 x i32> %x) {
define i32 @test_multiuse_def(i32 %x, ptr %p) {
; CHECK-LABEL: @test_multiuse_def(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: store i32 [[CT]], ptr [[P:%.*]], align 4
; CHECK-NEXT: ret i32 [[CT]]
;
@@ -551,7 +551,7 @@ define i32 @test_multiuse_def(i32 %x, ptr %p) {
define i32 @test_multiuse_undef(i32 %x, ptr %p) {
; CHECK-LABEL: @test_multiuse_undef(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: store i32 [[CT]], ptr [[P:%.*]], align 4
; CHECK-NEXT: ret i32 [[CT]]
;
@@ -564,7 +564,7 @@ define i32 @test_multiuse_undef(i32 %x, ptr %p) {
define i64 @test_multiuse_zext_def(i32 %x, ptr %p) {
; CHECK-LABEL: @test_multiuse_zext_def(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i32 [[CT]] to i64
; CHECK-NEXT: store i64 [[CONV]], ptr [[P:%.*]], align 4
; CHECK-NEXT: ret i64 [[CONV]]
@@ -579,7 +579,7 @@ define i64 @test_multiuse_zext_def(i32 %x, ptr %p) {
define i64 @test_multiuse_zext_undef(i32 %x, ptr %p) {
; CHECK-LABEL: @test_multiuse_zext_undef(
-; CHECK-NEXT: [[CT:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG1]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = zext nneg i32 [[CT]] to i64
; CHECK-NEXT: store i64 [[CONV]], ptr [[P:%.*]], align 4
; CHECK-NEXT: ret i64 [[CONV]]
@@ -594,7 +594,7 @@ define i64 @test_multiuse_zext_undef(i32 %x, ptr %p) {
define i16 @test_multiuse_trunc_def(i64 %x, ptr %p) {
; CHECK-LABEL: @test_multiuse_trunc_def(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = trunc nuw nsw i64 [[CT]] to i16
; CHECK-NEXT: store i16 [[CONV]], ptr [[P:%.*]], align 2
; CHECK-NEXT: ret i16 [[CONV]]
@@ -609,7 +609,7 @@ define i16 @test_multiuse_trunc_def(i64 %x, ptr %p) {
define i16 @test_multiuse_trunc_undef(i64 %x, ptr %p) {
; CHECK-LABEL: @test_multiuse_trunc_undef(
-; CHECK-NEXT: [[CT:%.*]] = tail call i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[CT:%.*]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[X:%.*]], i1 false)
; CHECK-NEXT: [[CONV:%.*]] = trunc nuw nsw i64 [[CT]] to i16
; CHECK-NEXT: store i16 [[CONV]], ptr [[P:%.*]], align 2
; CHECK-NEXT: ret i16 [[CONV]]
diff --git a/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll b/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
index fa8443d4c9578e..59d33ee3b39df5 100644
--- a/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
+++ b/llvm/test/Transforms/InstCombine/select-ctlz-to-cttz.ll
@@ -16,7 +16,7 @@ declare void @use2(i1)
define i32 @select_clz_to_ctz(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz(
-; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[SUB1:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[SUB1]]
;
%sub = sub i32 0, %a
@@ -30,7 +30,7 @@ define i32 @select_clz_to_ctz(i32 %a) {
define i32 @select_clz_to_ctz_preserve_flag(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_preserve_flag(
-; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[COND:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[COND]]
;
%sub = sub i32 0, %a
@@ -44,7 +44,7 @@ define i32 @select_clz_to_ctz_preserve_flag(i32 %a) {
define i32 @select_clz_to_ctz_constant_for_zero(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_constant_for_zero(
-; CHECK-NEXT: [[COND:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[COND:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 false)
; CHECK-NEXT: ret i32 [[COND]]
;
%sub = sub i32 0, %a
@@ -58,7 +58,7 @@ define i32 @select_clz_to_ctz_constant_for_zero(i32 %a) {
define <2 x i32> @select_clz_to_ctz_vec(<2 x i32> %a) {
; CHECK-LABEL: @select_clz_to_ctz_vec(
-; CHECK-NEXT: [[COND:%.*]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[A:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[COND:%.*]] = call range(i32 0, 33) <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[A:%.*]], i1 true)
; CHECK-NEXT: ret <2 x i32> [[COND]]
;
%sub = sub <2 x i32> zeroinitializer, %a
@@ -72,7 +72,7 @@ define <2 x i32> @select_clz_to_ctz_vec(<2 x i32> %a) {
define i32 @select_clz_to_ctz_extra_use(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_extra_use(
-; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[SUB1:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true)
; CHECK-NEXT: call void @use(i32 [[SUB1]])
; CHECK-NEXT: ret i32 [[SUB1]]
;
@@ -88,7 +88,7 @@ define i32 @select_clz_to_ctz_extra_use(i32 %a) {
define i32 @select_clz_to_ctz_and_commuted(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_and_commuted(
-; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[SUB1:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[SUB1]]
;
%sub = sub i32 0, %a
@@ -104,7 +104,7 @@ define i32 @select_clz_to_ctz_icmp_ne(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_icmp_ne(
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[A:%.*]], 0
; CHECK-NEXT: call void @use2(i1 [[TOBOOL]])
-; CHECK-NEXT: [[SUB1:%.*]] = call i32 @llvm.cttz.i32(i32 [[A]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[SUB1:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[A]], i1 true)
; CHECK-NEXT: ret i32 [[SUB1]]
;
%sub = sub i32 0, %a
@@ -119,7 +119,7 @@ define i32 @select_clz_to_ctz_icmp_ne(i32 %a) {
define i64 @select_clz_to_ctz_i64(i64 %a) {
; CHECK-LABEL: @select_clz_to_ctz_i64(
-; CHECK-NEXT: [[SUB1:%.*]] = call i64 @llvm.cttz.i64(i64 [[A:%.*]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[SUB1:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[A:%.*]], i1 true)
; CHECK-NEXT: ret i64 [[SUB1]]
;
%sub = sub i64 0, %a
@@ -137,7 +137,7 @@ define i32 @select_clz_to_ctz_wrong_sub(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_wrong_sub(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 1, [[A:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[SUB]], [[A]]
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[AND]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[AND]], i1 true)
; CHECK-NEXT: [[SUB1:%.*]] = xor i32 [[LZ]], 31
; CHECK-NEXT: ret i32 [[SUB1]]
;
@@ -155,7 +155,7 @@ define i64 @select_clz_to_ctz_i64_wrong_xor(i64 %a) {
; CHECK-LABEL: @select_clz_to_ctz_i64_wrong_xor(
; CHECK-NEXT: [[SUB:%.*]] = sub i64 0, [[A:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i64 [[SUB]], [[A]]
-; CHECK-NEXT: [[LZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[AND]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[AND]], i1 true)
; CHECK-NEXT: [[SUB11:%.*]] = or disjoint i64 [[LZ]], 64
; CHECK-NEXT: ret i64 [[SUB11]]
;
@@ -171,7 +171,7 @@ define i64 @select_clz_to_ctz_i64_wrong_xor(i64 %a) {
define i64 @select_clz_to_ctz_i64_wrong_icmp_cst(i64 %a) {
; CHECK-LABEL: @select_clz_to_ctz_i64_wrong_icmp_cst(
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i64 [[A:%.*]], 1
-; CHECK-NEXT: [[SUB1:%.*]] = call i64 @llvm.cttz.i64(i64 [[A]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[SUB1:%.*]] = call range(i64 0, 65) i64 @llvm.cttz.i64(i64 [[A]], i1 true)
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i64 63, i64 [[SUB1]]
; CHECK-NEXT: ret i64 [[COND]]
;
@@ -188,7 +188,7 @@ define i64 @select_clz_to_ctz_i64_wrong_icmp_pred(i64 %a) {
; CHECK-LABEL: @select_clz_to_ctz_i64_wrong_icmp_pred(
; CHECK-NEXT: [[SUB:%.*]] = sub i64 0, [[A:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i64 [[SUB]], [[A]]
-; CHECK-NEXT: [[LZ:%.*]] = tail call i64 @llvm.ctlz.i64(i64 [[AND]], i1 true), !range [[RNG1]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 [[AND]], i1 true)
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp slt i64 [[A]], 0
; CHECK-NEXT: [[SUB1:%.*]] = xor i64 [[LZ]], 63
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i64 [[LZ]], i64 [[SUB1]]
@@ -207,7 +207,7 @@ define <2 x i32> @select_clz_to_ctz_vec_with_undef(<2 x i32> %a) {
; CHECK-LABEL: @select_clz_to_ctz_vec_with_undef(
; CHECK-NEXT: [[SUB:%.*]] = sub <2 x i32> zeroinitializer, [[A:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and <2 x i32> [[SUB]], [[A]]
-; CHECK-NEXT: [[LZ:%.*]] = tail call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[AND]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[AND]], i1 true)
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq <2 x i32> [[A]], zeroinitializer
; CHECK-NEXT: [[SUB1:%.*]] = xor <2 x i32> [[LZ]], <i32 31, i32 undef>
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[TOBOOL]], <2 x i32> [[LZ]], <2 x i32> [[SUB1]]
@@ -226,7 +226,7 @@ define i32 @select_clz_to_ctz_wrong_constant_for_zero(i32 %a) {
; CHECK-LABEL: @select_clz_to_ctz_wrong_constant_for_zero(
; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[A:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i32 [[SUB]], [[A]]
-; CHECK-NEXT: [[LZ:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[AND]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[LZ:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[AND]], i1 false)
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[A]], 0
; CHECK-NEXT: [[SUB1:%.*]] = xor i32 [[LZ]], 31
; CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 31, i32 [[SUB1]]
@@ -243,7 +243,7 @@ define i32 @select_clz_to_ctz_wrong_constant_for_zero(i32 %a) {
define i4 @PR45762(i3 %x4) {
; CHECK-LABEL: @PR45762(
-; CHECK-NEXT: [[T4:%.*]] = call i3 @llvm.cttz.i3(i3 [[X4:%.*]], i1 false), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[T4:%.*]] = call range(i3 0, -4) i3 @llvm.cttz.i3(i3 [[X4:%.*]], i1 false)
; CHECK-NEXT: [[T7:%.*]] = zext nneg i3 [[T4]] to i4
; CHECK-NEXT: [[ONE_HOT_16:%.*]] = shl nuw i4 1, [[T7]]
; CHECK-NEXT: [[OR_69_NOT:%.*]] = icmp eq i3 [[X4]], 0
@@ -272,7 +272,7 @@ define i4 @PR45762(i3 %x4) {
define i4 @PR45762_logical(i3 %x4) {
; CHECK-LABEL: @PR45762_logical(
-; CHECK-NEXT: [[T4:%.*]] = call i3 @llvm.cttz.i3(i3 [[X4:%.*]], i1 false), !range [[RNG2]]
+; CHECK-NEXT: [[T4:%.*]] = call range(i3 0, -4) i3 @llvm.cttz.i3(i3 [[X4:%.*]], i1 false)
; CHECK-NEXT: [[T7:%.*]] = zext nneg i3 [[T4]] to i4
; CHECK-NEXT: [[ONE_HOT_16:%.*]] = shl nuw i4 1, [[T7]]
; CHECK-NEXT: [[OR_69_NOT:%.*]] = icmp eq i3 [[X4]], 0
diff --git a/llvm/test/Transforms/InstCombine/select.ll b/llvm/test/Transforms/InstCombine/select.ll
index 8776ec6a29b43a..270f32a8d40b96 100644
--- a/llvm/test/Transforms/InstCombine/select.ll
+++ b/llvm/test/Transforms/InstCombine/select.ll
@@ -2736,7 +2736,7 @@ define void @select_freeze_icmp_multuses(i32 %x, i32 %y) {
define i32 @pr47322_more_poisonous_replacement(i32 %arg) {
; CHECK-LABEL: @pr47322_more_poisonous_replacement(
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ARG:%.*]], 0
-; CHECK-NEXT: [[TRAILING:%.*]] = call i32 @llvm.cttz.i32(i32 [[ARG]], i1 immarg true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TRAILING:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[ARG]], i1 immarg true)
; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[ARG]], [[TRAILING]]
; CHECK-NEXT: [[R1_SROA_0_1:%.*]] = select i1 [[CMP]], i32 0, i32 [[SHIFTED]]
; CHECK-NEXT: ret i32 [[R1_SROA_0_1]]
diff --git a/llvm/test/Transforms/InstCombine/sext.ll b/llvm/test/Transforms/InstCombine/sext.ll
index 6d263cfcda0577..a554f2b28d6f29 100644
--- a/llvm/test/Transforms/InstCombine/sext.ll
+++ b/llvm/test/Transforms/InstCombine/sext.ll
@@ -11,7 +11,7 @@ declare void @use_vec(<2 x i5>)
define i64 @test1(i32 %x) {
; CHECK-LABEL: @test1(
-; CHECK-NEXT: [[T:%.*]] = call i32 @llvm.ctpop.i32(i32 [[X:%.*]]), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[T:%.*]] = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 [[X:%.*]])
; CHECK-NEXT: [[S:%.*]] = zext nneg i32 [[T]] to i64
; CHECK-NEXT: ret i64 [[S]]
;
@@ -22,7 +22,7 @@ define i64 @test1(i32 %x) {
define i64 @test2(i32 %x) {
; CHECK-LABEL: @test2(
-; CHECK-NEXT: [[T:%.*]] = call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[T:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[S:%.*]] = zext nneg i32 [[T]] to i64
; CHECK-NEXT: ret i64 [[S]]
;
@@ -33,7 +33,7 @@ define i64 @test2(i32 %x) {
define i64 @test3(i32 %x) {
; CHECK-LABEL: @test3(
-; CHECK-NEXT: [[T:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[T:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[S:%.*]] = zext nneg i32 [[T]] to i64
; CHECK-NEXT: ret i64 [[S]]
;
diff --git a/llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll b/llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
index 2b2f820c9a0956..1c381d08390715 100644
--- a/llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
+++ b/llvm/test/Transforms/InstCombine/shift-cttz-ctlz.ll
@@ -5,7 +5,7 @@ define i32 @shl_cttz_false(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @shl_cttz_false(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Y]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Y]], i1 true)
; CHECK-NEXT: [[RES:%.*]] = shl i32 [[X]], [[CTTZ]]
; CHECK-NEXT: ret i32 [[RES]]
;
@@ -19,7 +19,7 @@ define i32 @shl_ctlz_false(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @shl_ctlz_false(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.ctlz.i32(i32 [[Y]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[Y]], i1 true)
; CHECK-NEXT: [[RES:%.*]] = shl i32 [[X]], [[CTTZ]]
; CHECK-NEXT: ret i32 [[RES]]
;
@@ -33,7 +33,7 @@ define i32 @lshr_cttz_false(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @lshr_cttz_false(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Y]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Y]], i1 true)
; CHECK-NEXT: [[RES:%.*]] = lshr i32 [[X]], [[CTTZ]]
; CHECK-NEXT: ret i32 [[RES]]
;
@@ -47,7 +47,7 @@ define i32 @ashr_cttz_false(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @ashr_cttz_false(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Y]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Y]], i1 true)
; CHECK-NEXT: [[RES:%.*]] = ashr i32 [[X]], [[CTTZ]]
; CHECK-NEXT: ret i32 [[RES]]
;
@@ -61,7 +61,7 @@ define i32 @shl_cttz_false_multiuse(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @shl_cttz_false_multiuse(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Y]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Y]], i1 false)
; CHECK-NEXT: call void @use(i32 [[CTTZ]])
; CHECK-NEXT: [[RES:%.*]] = shl i32 [[X]], [[CTTZ]]
; CHECK-NEXT: ret i32 [[RES]]
@@ -77,7 +77,7 @@ define i32 @shl_cttz_as_lhs(i32 %x, i32 %y) {
; CHECK-LABEL: define i32 @shl_cttz_as_lhs(
; CHECK-SAME: i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CTTZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[Y]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[CTTZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[Y]], i1 false)
; CHECK-NEXT: [[RES:%.*]] = shl i32 [[CTTZ]], [[X]]
; CHECK-NEXT: ret i32 [[RES]]
;
@@ -88,6 +88,3 @@ entry:
}
declare void @use(i32)
-;.
-; CHECK: [[RNG0]] = !{i32 0, i32 33}
-;.
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index bb8661919c89f5..5692202fcb4c76 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -2055,7 +2055,7 @@ define <2 x i8> @shl1_cttz_vec_poison(<2 x i8> %x) {
define i32 @shl1_cttz_extra_use(i32 %x) {
; CHECK-LABEL: @shl1_cttz_extra_use(
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: call void @use_i32(i32 [[TZ]])
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 1, [[TZ]]
; CHECK-NEXT: ret i32 [[SHL]]
@@ -2070,7 +2070,7 @@ define i32 @shl1_cttz_extra_use(i32 %x) {
define i32 @shl2_cttz(i32 %x) {
; CHECK-LABEL: @shl2_cttz(
-; CHECK-NEXT: [[TZ:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[TZ:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: [[SHL:%.*]] = shl i32 2, [[TZ]]
; CHECK-NEXT: ret i32 [[SHL]]
;
diff --git a/llvm/test/Transforms/InstCombine/sub-xor.ll b/llvm/test/Transforms/InstCombine/sub-xor.ll
index 2976598e043fee..b4add9698b1609 100644
--- a/llvm/test/Transforms/InstCombine/sub-xor.ll
+++ b/llvm/test/Transforms/InstCombine/sub-xor.ll
@@ -97,7 +97,7 @@ declare i32 @llvm.ctlz.i32(i32, i1)
define i32 @range_masked_sub(i32 %x) {
; CHECK-LABEL: @range_masked_sub(
-; CHECK-NEXT: [[COUNT:%.*]] = tail call i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[COUNT:%.*]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 true) #[[ATTR1:[0-9]+]]
; CHECK-NEXT: [[SUB:%.*]] = xor i32 [[COUNT]], 31
; CHECK-NEXT: ret i32 [[SUB]]
;
diff --git a/llvm/test/Transforms/InstCombine/xor.ll b/llvm/test/Transforms/InstCombine/xor.ll
index ba9e992a9443c9..9a59db40ef8b1e 100644
--- a/llvm/test/Transforms/InstCombine/xor.ll
+++ b/llvm/test/Transforms/InstCombine/xor.ll
@@ -1336,7 +1336,7 @@ define i32 @xor_orn_2use(i32 %a, i32 %b, ptr %s1, ptr %s2) {
define i32 @ctlz_pow2(i32 %x) {
; CHECK-LABEL: @ctlz_pow2(
-; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[R:%.*]] = call range(i32 0, 33) i32 @llvm.cttz.i32(i32 [[X:%.*]], i1 true)
; CHECK-NEXT: ret i32 [[R]]
;
%n = sub i32 0, %x
@@ -1352,7 +1352,7 @@ define <2 x i8> @cttz_pow2(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @cttz_pow2(
; CHECK-NEXT: [[S:%.*]] = shl nuw <2 x i8> <i8 1, i8 1>, [[X:%.*]]
; CHECK-NEXT: [[D:%.*]] = udiv exact <2 x i8> [[S]], [[Y:%.*]]
-; CHECK-NEXT: [[R:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[D]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[R:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[D]], i1 true)
; CHECK-NEXT: ret <2 x i8> [[R]]
;
%s = shl <2 x i8> <i8 1, i8 1>, %x
@@ -1368,7 +1368,7 @@ define i32 @ctlz_pow2_or_zero(i32 %x) {
; CHECK-LABEL: @ctlz_pow2_or_zero(
; CHECK-NEXT: [[N:%.*]] = sub i32 0, [[X:%.*]]
; CHECK-NEXT: [[A:%.*]] = and i32 [[N]], [[X]]
-; CHECK-NEXT: [[Z:%.*]] = call i32 @llvm.ctlz.i32(i32 [[A]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[Z:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[A]], i1 false)
; CHECK-NEXT: [[R:%.*]] = xor i32 [[Z]], 31
; CHECK-NEXT: ret i32 [[R]]
;
@@ -1385,7 +1385,7 @@ define i32 @ctlz_pow2_wrong_const(i32 %x) {
; CHECK-LABEL: @ctlz_pow2_wrong_const(
; CHECK-NEXT: [[N:%.*]] = sub i32 0, [[X:%.*]]
; CHECK-NEXT: [[A:%.*]] = and i32 [[N]], [[X]]
-; CHECK-NEXT: [[Z:%.*]] = call i32 @llvm.ctlz.i32(i32 [[A]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[Z:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[A]], i1 true)
; CHECK-NEXT: [[R:%.*]] = xor i32 [[Z]], 30
; CHECK-NEXT: ret i32 [[R]]
;
diff --git a/llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll b/llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
index c8eb513a8440b4..384ff8d2b7a3a3 100644
--- a/llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
+++ b/llvm/test/Transforms/InstCombine/zext-ctlz-trunc-to-ctlz-add.ll
@@ -13,7 +13,7 @@ declare void @use1(<vscale x 2 x i63>)
define i16 @trunc_ctlz_zext_i16_i32(i16 %x) {
; CHECK-LABEL: @trunc_ctlz_zext_i16_i32(
-; CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false), !range [[RNG0:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 [[X:%.*]], i1 false)
; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw i16 [[TMP1]], 16
; CHECK-NEXT: ret i16 [[ZZ]]
;
@@ -27,7 +27,7 @@ define i16 @trunc_ctlz_zext_i16_i32(i16 %x) {
define <2 x i8> @trunc_ctlz_zext_v2i8_v2i33(<2 x i8> %x) {
; CHECK-LABEL: @trunc_ctlz_zext_v2i8_v2i33(
-; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[X:%.*]], i1 true), !range [[RNG1:![0-9]+]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i8 0, 9) <2 x i8> @llvm.ctlz.v2i8(<2 x i8> [[X:%.*]], i1 true)
; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw <2 x i8> [[TMP1]], <i8 25, i8 25>
; CHECK-NEXT: ret <2 x i8> [[ZZ]]
;
@@ -41,7 +41,7 @@ define <2 x i8> @trunc_ctlz_zext_v2i8_v2i33(<2 x i8> %x) {
define <vscale x 2 x i16> @trunc_ctlz_zext_nxv2i16_nxv2i64(<vscale x 2 x i16> %x) {
; CHECK-LABEL: @trunc_ctlz_zext_nxv2i16_nxv2i64(
-; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> [[X:%.*]], i1 false), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> [[X:%.*]], i1 false)
; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw <vscale x 2 x i16> [[TMP1]], shufflevector (<vscale x 2 x i16> insertelement (<vscale x 2 x i16> poison, i16 48, i64 0), <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer)
; CHECK-NEXT: ret <vscale x 2 x i16> [[ZZ]]
;
@@ -56,7 +56,7 @@ define <vscale x 2 x i16> @trunc_ctlz_zext_nxv2i16_nxv2i64(<vscale x 2 x i16> %x
define <2 x i17> @trunc_ctlz_zext_v2i17_v2i32_multiple_uses(<2 x i17> %x) {
; CHECK-LABEL: @trunc_ctlz_zext_v2i17_v2i32_multiple_uses(
; CHECK-NEXT: [[Z:%.*]] = zext <2 x i17> [[X:%.*]] to <2 x i32>
-; CHECK-NEXT: [[P:%.*]] = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[Z]], i1 false), !range [[RNG2:![0-9]+]]
+; CHECK-NEXT: [[P:%.*]] = call range(i32 15, 33) <2 x i32> @llvm.ctlz.v2i32(<2 x i32> [[Z]], i1 false)
; CHECK-NEXT: [[ZZ:%.*]] = trunc nuw nsw <2 x i32> [[P]] to <2 x i17>
; CHECK-NEXT: call void @use(<2 x i32> [[P]])
; CHECK-NEXT: ret <2 x i17> [[ZZ]]
@@ -73,7 +73,7 @@ define <2 x i17> @trunc_ctlz_zext_v2i17_v2i32_multiple_uses(<2 x i17> %x) {
define <vscale x 2 x i16> @trunc_ctlz_zext_nxv2i16_nxv2i63_multiple_uses(<vscale x 2 x i16> %x) {
; CHECK-LABEL: @trunc_ctlz_zext_nxv2i16_nxv2i63_multiple_uses(
; CHECK-NEXT: [[Z:%.*]] = zext <vscale x 2 x i16> [[X:%.*]] to <vscale x 2 x i63>
-; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> [[X]], i1 true), !range [[RNG0]]
+; CHECK-NEXT: [[TMP1:%.*]] = call range(i16 0, 17) <vscale x 2 x i16> @llvm.ctlz.nxv2i16(<vscale x 2 x i16> [[X]], i1 true)
; CHECK-NEXT: [[ZZ:%.*]] = add nuw nsw <vscale x 2 x i16> [[TMP1]], shufflevector (<vscale x 2 x i16> insertelement (<vscale x 2 x i16> poison, i16 47, i64 0), <vscale x 2 x i16> poison, <vscale x 2 x i32> zeroinitializer)
; CHECK-NEXT: call void @use1(<vscale x 2 x i63> [[Z]])
; CHECK-NEXT: ret <vscale x 2 x i16> [[ZZ]]
@@ -90,7 +90,7 @@ define <vscale x 2 x i16> @trunc_ctlz_zext_nxv2i16_nxv2i63_multiple_uses(<vscale
define i16 @trunc_ctlz_zext_i10_i32(i10 %x) {
; CHECK-LABEL: @trunc_ctlz_zext_i10_i32(
; CHECK-NEXT: [[Z:%.*]] = zext i10 [[X:%.*]] to i32
-; CHECK-NEXT: [[P:%.*]] = call i32 @llvm.ctlz.i32(i32 [[Z]], i1 false), !range [[RNG3:![0-9]+]]
+; CHECK-NEXT: [[P:%.*]] = call range(i32 22, 33) i32 @llvm.ctlz.i32(i32 [[Z]], i1 false)
; CHECK-NEXT: [[ZZ:%.*]] = trunc nuw nsw i32 [[P]] to i16
; CHECK-NEXT: ret i16 [[ZZ]]
;
@@ -108,7 +108,7 @@ define i16 @trunc_ctlz_zext_i10_i32(i10 %x) {
define i3 @trunc_ctlz_zext_i3_i34(i3 %x) {
; CHECK-LABEL: @trunc_ctlz_zext_i3_i34(
; CHECK-NEXT: [[Z:%.*]] = zext i3 [[X:%.*]] to i34
-; CHECK-NEXT: [[P:%.*]] = call i34 @llvm.ctlz.i34(i34 [[Z]], i1 false), !range [[RNG4:![0-9]+]]
+; CHECK-NEXT: [[P:%.*]] = call range(i34 31, 35) i34 @llvm.ctlz.i34(i34 [[Z]], i1 false)
; CHECK-NEXT: [[T:%.*]] = trunc i34 [[P]] to i3
; CHECK-NEXT: ret i3 [[T]]
;
diff --git a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
index 204d021f06571b..e6936b19415d0c 100644
--- a/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
+++ b/llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
@@ -1357,12 +1357,12 @@ define i32 @predicated_or_dominates_reduction(ptr %b) {
; CHECK-NEXT: [[TMP46:%.*]] = xor <4 x i1> [[TMP19]], <i1 true, i1 true, i1 true, i1 true>
; CHECK-NEXT: [[TMP47:%.*]] = select <4 x i1> [[TMP46]], <4 x i1> <i1 true, i1 true, i1 true, i1 true>, <4 x i1> [[TMP44]]
; CHECK-NEXT: [[TMP48:%.*]] = bitcast <4 x i1> [[TMP47]] to i4
-; CHECK-NEXT: [[TMP49:%.*]] = call i4 @llvm.ctpop.i4(i4 [[TMP48]]), !range [[RNG42:![0-9]+]]
+; CHECK-NEXT: [[TMP49:%.*]] = call range(i4 0, 5) i4 @llvm.ctpop.i4(i4 [[TMP48]])
; CHECK-NEXT: [[TMP50:%.*]] = zext nneg i4 [[TMP49]] to i32
; CHECK-NEXT: [[TMP51]] = add i32 [[VEC_PHI]], [[TMP50]]
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
; CHECK-NEXT: [[TMP52:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1000
-; CHECK-NEXT: br i1 [[TMP52]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP43:![0-9]+]]
+; CHECK-NEXT: br i1 [[TMP52]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP42:![0-9]+]]
; CHECK: middle.block:
; CHECK-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]]
; CHECK: scalar.ph:
@@ -1377,7 +1377,7 @@ define i32 @predicated_or_dominates_reduction(ptr %b) {
; CHECK: if.then:
; CHECK-NEXT: br label [[FOR_INC]]
; CHECK: for.inc:
-; CHECK-NEXT: br i1 poison, label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP44:![0-9]+]]
+; CHECK-NEXT: br i1 poison, label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP43:![0-9]+]]
;
entry:
br label %for.body
diff --git a/llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll b/llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
index 4b5f3107466c8b..7382c3c80d4273 100644
--- a/llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
+++ b/llvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
@@ -12,7 +12,7 @@ define i32 @cttz(i32 %n, ptr %p1) {
; ALL-LABEL: @cttz(
; ALL-NEXT: entry:
; ALL-NEXT: [[TMP0:%.*]] = shl i32 [[N:%.*]], 1
-; ALL-NEXT: [[TMP1:%.*]] = tail call i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false), !range [[RNG0:![0-9]+]]
+; ALL-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.cttz.i32(i32 [[TMP0]], i1 false)
; ALL-NEXT: [[TMP2:%.*]] = sub nuw nsw i32 32, [[TMP1]]
; ALL-NEXT: [[TMP3:%.*]] = sub nuw nsw i32 75, [[TMP1]]
; ALL-NEXT: store i32 [[TMP3]], ptr [[P1:%.*]], align 4
diff --git a/llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll b/llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
index 284873a9737624..19fbc1f1ae64e3 100644
--- a/llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
+++ b/llvm/test/Transforms/PhaseOrdering/lower-table-based-cttz.ll
@@ -15,7 +15,7 @@
; RUN: opt -O3 -S < %s | FileCheck %s
-; CHECK: call i32 @llvm.cttz.i32
+; CHECK: call range(i32 0, 33) i32 @llvm.cttz.i32
@ctz1.table = internal constant [32 x i8] c"\00\01\1C\02\1D\0E\18\03\1E\16\14\0F\19\11\04\08\1F\1B\0D\17\15\13\10\07\1A\0C\12\06\0B\05\0A\09", align 16
>From ac3b0a5decf0ce479822747672dc49191c375d28 Mon Sep 17 00:00:00 2001
From: Andreas Jonson <andjo403 at hotmail.com>
Date: Fri, 19 Apr 2024 12:08:20 +0200
Subject: [PATCH 2/2] fixup! [InstCombine] Swap out range metadata to range
attribute for cttz/ctlz/ctpop
---
.../SystemZ/builtins-systemz-zvector.c | 48 +++++++++----------
.../SystemZ/builtins-systemz-zvector2.c | 16 +++----
clang/test/CodeGen/builtins-wasm.c | 2 +-
clang/test/CodeGen/ms-intrinsics-other.c | 20 ++++----
clang/test/CodeGen/ms-intrinsics.c | 8 ++--
.../CodeGenOpenCL/builtins-generic-amdgcn.cl | 4 +-
clang/test/Headers/wasm.c | 2 +-
7 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
index 48d775b8887864..33f3dce73baea4 100644
--- a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
+++ b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector.c
@@ -2489,78 +2489,78 @@ void test_integer(void) {
// CHECK-ASM: vno
vuc = vec_cntlz(vsc);
- // CHECK: call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.*}}, i1 false)
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.*}}, i1 false)
// CHECK-ASM: vclzb
vuc = vec_cntlz(vuc);
- // CHECK: call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.*}}, i1 false)
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %{{.*}}, i1 false)
// CHECK-ASM: vclzb
vus = vec_cntlz(vss);
- // CHECK: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.*}}, i1 false)
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.*}}, i1 false)
// CHECK-ASM: vclzh
vus = vec_cntlz(vus);
- // CHECK: call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.*}}, i1 false)
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %{{.*}}, i1 false)
// CHECK-ASM: vclzh
vui = vec_cntlz(vsi);
- // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
// CHECK-ASM: vclzf
vui = vec_cntlz(vui);
- // CHECK: call <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.ctlz.v4i32(<4 x i32> %{{.*}}, i1 false)
// CHECK-ASM: vclzf
vul = vec_cntlz(vsl);
- // CHECK: call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
// CHECK-ASM: vclzg
vul = vec_cntlz(vul);
- // CHECK: call <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.ctlz.v2i64(<2 x i64> %{{.*}}, i1 false)
// CHECK-ASM: vclzg
vuc = vec_cnttz(vsc);
- // CHECK: call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %{{.*}}, i1 false)
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.cttz.v16i8(<16 x i8> %{{.*}}, i1 false)
// CHECK-ASM: vctzb
vuc = vec_cnttz(vuc);
- // CHECK: call <16 x i8> @llvm.cttz.v16i8(<16 x i8> %{{.*}}, i1 false)
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.cttz.v16i8(<16 x i8> %{{.*}}, i1 false)
// CHECK-ASM: vctzb
vus = vec_cnttz(vss);
- // CHECK: call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %{{.*}}, i1 false)
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.cttz.v8i16(<8 x i16> %{{.*}}, i1 false)
// CHECK-ASM: vctzh
vus = vec_cnttz(vus);
- // CHECK: call <8 x i16> @llvm.cttz.v8i16(<8 x i16> %{{.*}}, i1 false)
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.cttz.v8i16(<8 x i16> %{{.*}}, i1 false)
// CHECK-ASM: vctzh
vui = vec_cnttz(vsi);
- // CHECK: call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.cttz.v4i32(<4 x i32> %{{.*}}, i1 false)
// CHECK-ASM: vctzf
vui = vec_cnttz(vui);
- // CHECK: call <4 x i32> @llvm.cttz.v4i32(<4 x i32> %{{.*}}, i1 false)
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.cttz.v4i32(<4 x i32> %{{.*}}, i1 false)
// CHECK-ASM: vctzf
vul = vec_cnttz(vsl);
- // CHECK: call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> %{{.*}}, i1 false)
// CHECK-ASM: vctzg
vul = vec_cnttz(vul);
- // CHECK: call <2 x i64> @llvm.cttz.v2i64(<2 x i64> %{{.*}}, i1 false)
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.cttz.v2i64(<2 x i64> %{{.*}}, i1 false)
// CHECK-ASM: vctzg
vuc = vec_popcnt(vsc);
- // CHECK: call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
// CHECK-ASM: vpopct
vuc = vec_popcnt(vuc);
- // CHECK: call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
// CHECK-ASM: vpopct
vus = vec_popcnt(vss);
- // CHECK: call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
// (emulated)
vus = vec_popcnt(vus);
- // CHECK: call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
// (emulated)
vui = vec_popcnt(vsi);
- // CHECK: call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
// (emulated)
vui = vec_popcnt(vui);
- // CHECK: call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
// (emulated)
vul = vec_popcnt(vsl);
- // CHECK: call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
// (emulated)
vul = vec_popcnt(vul);
- // CHECK: call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
// (emulated)
vsc = vec_rl(vsc, vuc);
diff --git a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
index 6c26b51c542e5d..15e72ecf51dac1 100644
--- a/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
+++ b/clang/test/CodeGen/SystemZ/builtins-systemz-zvector2.c
@@ -577,28 +577,28 @@ void test_integer(void) {
// CHECK-ASM: vnx
vuc = vec_popcnt(vsc);
- // CHECK: call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
// CHECK-ASM: vpopctb
vuc = vec_popcnt(vuc);
- // CHECK: call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
+ // CHECK: call range(i8 0, 9) <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %{{.*}})
// CHECK-ASM: vpopctb
vus = vec_popcnt(vss);
- // CHECK: call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
// CHECK-ASM: vpopcth
vus = vec_popcnt(vus);
- // CHECK: call <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
+ // CHECK: call range(i16 0, 17) <8 x i16> @llvm.ctpop.v8i16(<8 x i16> %{{.*}})
// CHECK-ASM: vpopcth
vui = vec_popcnt(vsi);
- // CHECK: call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
// CHECK-ASM: vpopctf
vui = vec_popcnt(vui);
- // CHECK: call <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
+ // CHECK: call range(i32 0, 33) <4 x i32> @llvm.ctpop.v4i32(<4 x i32> %{{.*}})
// CHECK-ASM: vpopctf
vul = vec_popcnt(vsl);
- // CHECK: call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
// CHECK-ASM: vpopctg
vul = vec_popcnt(vul);
- // CHECK: call <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
+ // CHECK: call range(i64 0, 65) <2 x i64> @llvm.ctpop.v2i64(<2 x i64> %{{.*}})
// CHECK-ASM: vpopctg
vf = vec_slb(vf, vsi);
diff --git a/clang/test/CodeGen/builtins-wasm.c b/clang/test/CodeGen/builtins-wasm.c
index d486d12085f9fc..9a323da9a8e846 100644
--- a/clang/test/CodeGen/builtins-wasm.c
+++ b/clang/test/CodeGen/builtins-wasm.c
@@ -406,7 +406,7 @@ i32x4 bitselect(i32x4 x, i32x4 y, i32x4 c) {
i8x16 popcnt(i8x16 x) {
return __builtin_wasm_popcnt_i8x16(x);
- // WEBASSEMBLY: call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %x)
+ // WEBASSEMBLY: call range(i8 0, 9) <16 x i8> @llvm.ctpop.v16i8(<16 x i8> %x)
// WEBASSEMBLY-NEXT: ret
}
diff --git a/clang/test/CodeGen/ms-intrinsics-other.c b/clang/test/CodeGen/ms-intrinsics-other.c
index 0e9dfe34b84cc7..fa8422e5bf19fb 100644
--- a/clang/test/CodeGen/ms-intrinsics-other.c
+++ b/clang/test/CodeGen/ms-intrinsics-other.c
@@ -56,7 +56,7 @@ unsigned char test_BitScanForward(unsigned LONG *Index, unsigned LONG Mask) {
// CHECK: [[RESULT:%[a-z0-9._]+]] = phi i8 [ 0, %[[ISZERO_LABEL:[a-z0-9._]+]] ], [ 1, %[[ISNOTZERO_LABEL]] ]
// CHECK: ret i8 [[RESULT]]
// CHECK: [[ISNOTZERO_LABEL]]:
-// CHECK: [[INDEX:%[0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %Mask, i1 true)
+// CHECK: [[INDEX:%[0-9]+]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %Mask, i1 true)
// CHECK: store i32 [[INDEX]], ptr %Index, align 4
// CHECK: br label %[[END_LABEL]]
@@ -70,7 +70,7 @@ unsigned char test_BitScanReverse(unsigned LONG *Index, unsigned LONG Mask) {
// CHECK: [[RESULT:%[a-z0-9._]+]] = phi i8 [ 0, %[[ISZERO_LABEL:[a-z0-9._]+]] ], [ 1, %[[ISNOTZERO_LABEL]] ]
// CHECK: ret i8 [[RESULT]]
// CHECK: [[ISNOTZERO_LABEL]]:
-// CHECK: [[REVINDEX:%[0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %Mask, i1 true)
+// CHECK: [[REVINDEX:%[0-9]+]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 %Mask, i1 true)
// CHECK: [[INDEX:%[0-9]+]] = xor i32 [[REVINDEX]], 31
// CHECK: store i32 [[INDEX]], ptr %Index, align 4
// CHECK: br label %[[END_LABEL]]
@@ -86,7 +86,7 @@ unsigned char test_BitScanForward64(unsigned LONG *Index, unsigned __int64 Mask)
// CHECK: [[RESULT:%[a-z0-9._]+]] = phi i8 [ 0, %[[ISZERO_LABEL:[a-z0-9._]+]] ], [ 1, %[[ISNOTZERO_LABEL]] ]
// CHECK: ret i8 [[RESULT]]
// CHECK: [[ISNOTZERO_LABEL]]:
-// CHECK: [[INDEX:%[0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %Mask, i1 true)
+// CHECK: [[INDEX:%[0-9]+]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %Mask, i1 true)
// CHECK: [[TRUNC_INDEX:%[0-9]+]] = trunc nuw nsw i64 [[INDEX]] to i32
// CHECK: store i32 [[TRUNC_INDEX]], ptr %Index, align 4
// CHECK: br label %[[END_LABEL]]
@@ -101,7 +101,7 @@ unsigned char test_BitScanReverse64(unsigned LONG *Index, unsigned __int64 Mask)
// CHECK: [[RESULT:%[a-z0-9._]+]] = phi i8 [ 0, %[[ISZERO_LABEL:[a-z0-9._]+]] ], [ 1, %[[ISNOTZERO_LABEL]] ]
// CHECK: ret i8 [[RESULT]]
// CHECK: [[ISNOTZERO_LABEL]]:
-// CHECK: [[REVINDEX:%[0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %Mask, i1 true)
+// CHECK: [[REVINDEX:%[0-9]+]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %Mask, i1 true)
// CHECK: [[TRUNC_REVINDEX:%[0-9]+]] = trunc nuw nsw i64 [[REVINDEX]] to i32
// CHECK: [[INDEX:%[0-9]+]] = xor i32 [[TRUNC_REVINDEX]], 63
// CHECK: store i32 [[INDEX]], ptr %Index, align 4
@@ -187,7 +187,7 @@ unsigned short test__lzcnt16(unsigned short x) {
return __lzcnt16(x);
}
// CHECK: i16 @test__lzcnt16
-// CHECK: [[RESULT:%[0-9]+]] = tail call i16 @llvm.ctlz.i16(i16 %x, i1 false)
+// CHECK: [[RESULT:%[0-9]+]] = tail call range(i16 0, 17) i16 @llvm.ctlz.i16(i16 %x, i1 false)
// CHECK: ret i16 [[RESULT]]
// CHECK: }
@@ -195,7 +195,7 @@ unsigned int test__lzcnt(unsigned int x) {
return __lzcnt(x);
}
// CHECK: i32 @test__lzcnt
-// CHECK: [[RESULT:%[0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
+// CHECK: [[RESULT:%[0-9]+]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 %x, i1 false)
// CHECK: ret i32 [[RESULT]]
// CHECK: }
@@ -203,7 +203,7 @@ unsigned __int64 test__lzcnt64(unsigned __int64 x) {
return __lzcnt64(x);
}
// CHECK: i64 @test__lzcnt64
-// CHECK: [[RESULT:%[0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %x, i1 false)
+// CHECK: [[RESULT:%[0-9]+]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %x, i1 false)
// CHECK: ret i64 [[RESULT]]
// CHECK: }
@@ -211,7 +211,7 @@ unsigned short test__popcnt16(unsigned short x) {
return __popcnt16(x);
}
// CHECK: i16 @test__popcnt16
-// CHECK: [[RESULT:%[0-9]+]] = tail call i16 @llvm.ctpop.i16(i16 %x)
+// CHECK: [[RESULT:%[0-9]+]] = tail call range(i16 0, 17) i16 @llvm.ctpop.i16(i16 %x)
// CHECK: ret i16 [[RESULT]]
// CHECK: }
@@ -219,7 +219,7 @@ unsigned int test__popcnt(unsigned int x) {
return __popcnt(x);
}
// CHECK: i32 @test__popcnt
-// CHECK: [[RESULT:%[0-9]+]] = tail call i32 @llvm.ctpop.i32(i32 %x)
+// CHECK: [[RESULT:%[0-9]+]] = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %x)
// CHECK: ret i32 [[RESULT]]
// CHECK: }
@@ -227,7 +227,7 @@ unsigned __int64 test__popcnt64(unsigned __int64 x) {
return __popcnt64(x);
}
// CHECK: i64 @test__popcnt64
-// CHECK: [[RESULT:%[0-9]+]] = tail call i64 @llvm.ctpop.i64(i64 %x)
+// CHECK: [[RESULT:%[0-9]+]] = tail call range(i64 0, 65) i64 @llvm.ctpop.i64(i64 %x)
// CHECK: ret i64 [[RESULT]]
// CHECK: }
diff --git a/clang/test/CodeGen/ms-intrinsics.c b/clang/test/CodeGen/ms-intrinsics.c
index 6eabd725e2f7c6..c3d64fda0b901f 100644
--- a/clang/test/CodeGen/ms-intrinsics.c
+++ b/clang/test/CodeGen/ms-intrinsics.c
@@ -157,7 +157,7 @@ unsigned char test_BitScanForward(unsigned long *Index, unsigned long Mask) {
// CHECK: ret i8 [[RESULT]]
// CHECK: [[ISNOTZERO_LABEL]]:
// CHECK: [[IDXGEP:%[a-z0-9._]+]] = getelementptr inbounds i8, ptr %Index, {{i64|i32}} 4
-// CHECK: [[INDEX:%[0-9]+]] = tail call i32 @llvm.cttz.i32(i32 %Mask, i1 true)
+// CHECK: [[INDEX:%[0-9]+]] = tail call range(i32 0, 33) i32 @llvm.cttz.i32(i32 %Mask, i1 true)
// CHECK: store i32 [[INDEX]], ptr [[IDXGEP]], align 4
// CHECK: br label %[[END_LABEL]]
@@ -172,7 +172,7 @@ unsigned char test_BitScanReverse(unsigned long *Index, unsigned long Mask) {
// CHECK: ret i8 [[RESULT]]
// CHECK: [[ISNOTZERO_LABEL]]:
// CHECK: [[IDXGEP:%[a-z0-9._]+]] = getelementptr inbounds i8, ptr %Index, {{i64|i32}} 4
-// CHECK: [[REVINDEX:%[0-9]+]] = tail call i32 @llvm.ctlz.i32(i32 %Mask, i1 true)
+// CHECK: [[REVINDEX:%[0-9]+]] = tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 %Mask, i1 true)
// CHECK: [[INDEX:%[0-9]+]] = xor i32 [[REVINDEX]], 31
// CHECK: store i32 [[INDEX]], ptr [[IDXGEP]], align 4
// CHECK: br label %[[END_LABEL]]
@@ -188,7 +188,7 @@ unsigned char test_BitScanForward64(unsigned long *Index, unsigned __int64 Mask)
// CHECK-ARM-X64: [[RESULT:%[a-z0-9._]+]] = phi i8 [ 0, %[[ISZERO_LABEL:[a-z0-9._]+]] ], [ 1, %[[ISNOTZERO_LABEL]] ]
// CHECK-ARM-X64: ret i8 [[RESULT]]
// CHECK-ARM-X64: [[ISNOTZERO_LABEL]]:
-// CHECK-ARM-X64: [[INDEX:%[0-9]+]] = tail call i64 @llvm.cttz.i64(i64 %Mask, i1 true)
+// CHECK-ARM-X64: [[INDEX:%[0-9]+]] = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %Mask, i1 true)
// CHECK-ARM-X64: [[TRUNC_INDEX:%[0-9]+]] = trunc nuw nsw i64 [[INDEX]] to i32
// CHECK-ARM-X64: store i32 [[TRUNC_INDEX]], ptr %Index, align 4
// CHECK-ARM-X64: br label %[[END_LABEL]]
@@ -203,7 +203,7 @@ unsigned char test_BitScanReverse64(unsigned long *Index, unsigned __int64 Mask)
// CHECK-ARM-X64: [[RESULT:%[a-z0-9._]+]] = phi i8 [ 0, %[[ISZERO_LABEL:[a-z0-9._]+]] ], [ 1, %[[ISNOTZERO_LABEL]] ]
// CHECK-ARM-X64: ret i8 [[RESULT]]
// CHECK-ARM-X64: [[ISNOTZERO_LABEL]]:
-// CHECK-ARM-X64: [[REVINDEX:%[0-9]+]] = tail call i64 @llvm.ctlz.i64(i64 %Mask, i1 true)
+// CHECK-ARM-X64: [[REVINDEX:%[0-9]+]] = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %Mask, i1 true)
// CHECK-ARM-X64: [[TRUNC_REVINDEX:%[0-9]+]] = trunc nuw nsw i64 [[REVINDEX]] to i32
// CHECK-ARM-X64: [[INDEX:%[0-9]+]] = xor i32 [[TRUNC_REVINDEX]], 63
// CHECK-ARM-X64: store i32 [[INDEX]], ptr %Index, align 4
diff --git a/clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl b/clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
index b093fcbf7d9894..37bea1ff933039 100644
--- a/clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
+++ b/clang/test/CodeGenOpenCL/builtins-generic-amdgcn.cl
@@ -4,14 +4,14 @@
#pragma OPENCL EXTENSION cl_khr_fp16 : enable
// CHECK-LABEL: @test_builtin_clz(
-// CHECK: tail call i32 @llvm.ctlz.i32(i32 %a, i1 true)
+// CHECK: tail call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 %a, i1 true)
void test_builtin_clz(global int* out, int a)
{
*out = __builtin_clz(a);
}
// CHECK-LABEL: @test_builtin_clzl(
-// CHECK: tail call i64 @llvm.ctlz.i64(i64 %a, i1 true)
+// CHECK: tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %a, i1 true)
void test_builtin_clzl(global long* out, long a)
{
*out = __builtin_clzl(a);
diff --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c
index 57f8b6d0db176a..b22d87a5f8b700 100644
--- a/clang/test/Headers/wasm.c
+++ b/clang/test/Headers/wasm.c
@@ -1572,7 +1572,7 @@ uint32_t test_i8x16_bitmask(v128_t a) {
// CHECK-LABEL: @test_i8x16_popcnt(
// CHECK-NEXT: entry:
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[A:%.*]] to <16 x i8>
-// CHECK-NEXT: [[TMP1:%.*]] = tail call <16 x i8> @llvm.ctpop.v16i8(<16 x i8> [[TMP0]]), !range [[RNG5:![0-9]+]]
+// CHECK-NEXT: [[TMP1:%.*]] = tail call range(i8 0, 9) <16 x i8> @llvm.ctpop.v16i8(<16 x i8> [[TMP0]])
// CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32>
// CHECK-NEXT: ret <4 x i32> [[TMP2]]
//
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